1. No category

Objectives: Introduction to the PeANUt Illustrative Computer
ref: [PeANUt Spec, sect 1–2.7] (online), old PeANUt lecture (P1)
l to understand the basic elements of the PeANUt architecture
n CPU
n registers
n memory
and how they interact during the execution cycle
l to be familiar with its basic instruction set design, including addressing modes
COMP2300: Introduction to the PeANUt
2015 JJ J • I II ×
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The PeANUt Architecture
0
MEMORY
MAR
MDR
SP
XR
AC
ALU
CONTROL UNIT
CC
...
CI
PC
EXCEPTION UNIT
...
I/O
UNIT
TABLE
1023
Data Pathways
Control Pathways
Exception Pathways
Address Pathways
User
The PeANUt Computer
COMP2300: Introduction to the PeANUt
2015 JJ J • I II ×
2
PeANUt Memory
l 1024 cells (= 1 word)
n cell addresses 0 . . . 1023
n need 10 address lines (210 = 1024)
l each cell has 16 bits (2 bytes)
l there are 3 pathways:
n address lines (10 bits, input only)
n data lines (16 bits, input and output)
n control lines (2 bits, Read/Write, Enable)
l address lines connected to MAR (Memory Address Register) in the CPU
l data lines connected to MDR (Memory Data Register) in the CPU
l control lines connected to the control unit in the CPU
COMP2300: Introduction to the PeANUt
2015 JJ J • I II ×
3
Memory Access
l memory contains both programs and data (strings, variables, etc.)
l to read: (from memory to CPU)
1. CPU puts the address in MAR
2. CPU signals Read, Enable
3. memory puts the data from the specified address into the MDR
l to write: (from CPU to memory)
1. CPU puts the address in MAR
2. CPU puts the data in MDR
3. CPU signals Write, Enable
4. memory puts MDR contents into the specified address
COMP2300: Introduction to the PeANUt
2015 JJ J • I II ×
4
CPU (Central Processing Unit)
l contains:
n control unit: the circuits that supervise
n registers (16 bits each)
n ALU (Arithmetic and Logic Unit)
l PeANUt is a von Neumann architecture (C = A op B, or B = A)
ALU
B
MEMORY
...
A, C
...
COMP2300: Introduction to the PeANUt
2015 JJ J • I II ×
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Registers
l PSW: Program Status Word. Contains CC and PC
n CC (Condition Codes): (bits 15-10 of PSW) holds the ALU status information
n PC (Program Counter): (bits 9-0 of PSW) holds the address of the next
instruction
l AC: Accumulator
l SP: Stack Pointer
l XR: Index Register
l CI: Current Instruction
l MAR: Memory Address Register
l MDR: Memory Data Register
l the ALU is capable of arithmetic (2’s complement) and logic operations
COMP2300: Introduction to the PeANUt
2015 JJ J • I II ×
6
Execution Cycle
l the control unit decodes the current instruction and controls the execution by
controlling the individual components of the CPU
l execution cycle: REPEAT
PC ← PC + 1
CI ← mem[PC-1] (instruction Fetch)
Evaluate Operand
Execute Instruction (’s operation)
Service Exceptions (if any)
FOREVER
l the instruction fetch sequence:
MAR ← PC-1
(memory) Read, Enable
MDR ← mem[MAR]
CI ← MDR
Control Unit decodes CI
l data flow varies with different instructions
COMP2300: Introduction to the PeANUt
consider LOAD 18 (at address 108)
2015 JJ J • I II ×
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The PeANUt Instruction Set
l all instructions are 16 bits long (1 memory cell)
l each instruction has up to three components:
n an opcode, identifying the instruction (’s operation)
([PeANUt Spec, Table 1])
u e.g. 011 identifies an add instruction
n an operand specifier (opspec)
n an (addressing) mode
(may be implicit (and fixed), or N/A)
l the opspec and mode determine the operand:
the data upon which the instruction operates
(also may be implicit)
n e.g. an operand of 1 may result in 1 being added to AC
l all instr’ns may be classified according to their instruction format ([PeANUt Spec, p. 3]):
format
One
Two
fields
15
13 12
mode opcode
15
COMP2300: Introduction to the PeANUt
0
opspec
10 9
opcode
15
Three
10 9
0
opspec
9 8
opcode
0
unused
2015 JJ J • I II ×
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Instruction Addressing Modes
l (Q: why don’t PeANUt instructions just have a single format?)
l the mode determines how the operand specifier (opspec) is interpreted
l every arithmetic and load/store instruction has one of the following modes:
code
000
001
010
011
100
name
immediate (#)
direct
indirect (@)
indexed (∗)
stack (!)
value (for a load)
opspec
mem[opspec]
mem[mem[opspec]]
mem[opspec + XR]
mem[opspec + SP]
COMP2300: Introduction to the PeANUt
use
(small) constants
(normal) variables
pointer variables
arrays
function calls/locals
2015 JJ J • I II ×
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