1. No category

TQP7M9102
½W High Linearity Amplifier
Applications




Repeaters
Mobile Infrastructure
CDMA / WCDMA / LTE
General Purpose Wireless
3-pin SOT-89 Package
Product Features









Functional Block Diagram
400-4000 MHz
+27.5 dBm P1dB
+44 dBm Output IP3
17.8 dB Gain @ 2140 MHz
+5V Single Supply, 135 mA Current
Internal RF overdrive protection
Internal DC overvoltage protection
On chip ESD protection
SOT-89 Package
GND
4
General Description
1
2
3
RF IN
GND
RF OUT
Pin Configuration
The TQP7M9102 is a high linearity driver amplifier in a
low-cost, RoHS compliant, surface mount package. This
InGaP/GaAs HBT delivers high performance across a
broad range of frequencies with +44 dBm OIP3 and +27.5
dBm P1dB while only consuming 135 mA quiescent
current. All devices are 100% RF and DC tested.
Pin #
Symbol
1
3
2, 4
RF Input
RF Output / Vcc
Ground
The TQP7M9102 incorporates on-chip features that
differentiate it from other products in the market. The
amplifier integrates an on-chip DC over-voltage and RF
over-drive protection. This protects the amplifier from
electrical DC voltage surges and high input RF input
power levels that may occur in a system. On-chip ESD
protection allows the amplifier to have a very robust Class
2 HBM ESD rating.
The TQP7M9102 is targeted for use as a driver amplifier
in wireless infrastructure where high linearity, medium
power, and high efficiency are required. The device an
excellent candidate for transceiver line cards in current
and next generation multi-carrier 3G / 4G base stations.
Ordering Information
Part No.
Description
TQP7M9102
TQP7M9102-PCB900
TQP7M9102-PCB2140
0.5 W High Linearity Amplifier
TQP7M9102 869-960MHz EVB
TQP7M9102 2.11-2.17GHz EVB
Standard T/R size = 1000 pieces on a 7” reel.
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 1 of 10 -
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
Specifications
Absolute Maximum Ratings
Recommended Operating Conditions
Parameter
Rating
Parameter
Min
Storage Temperature
Device Voltage, Vcc
Maximum Input Power, CW
-65 to +150 oC
+8 V
+27 dBm
Vcc
Tcase
Tj (for>106 hours MTTF)
+4.75
-40
Operation of this device outside the parameter ranges given
above may cause permanent damage.
Typ Max Units
+5
+5.25
85
160
V
o
C
o
C
Electrical specifications are measured at specified test conditions.
Specifications are not guaranteed over all recommended operating
conditions.
Electrical Specifications
Test conditions unless otherwise noted: +25ºC, +5V Vsupply, 50 Ω system, tuned application circuit
Parameter
Conditions
Operational Frequency Range
Test Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3
WCDMA Pout @ -50 dBc ACLR
Noise Figure
Vcc
Quiescent Current, Icq
Thermal Resistance (jnc to case) θjc
Min
Typical
400
15.5
+26.4
See Note 1.
See Note 2.
+41
115
Max
Units
4000
MHz
MHz
dB
dB
dB
dBm
2140
17.8
12
10
+27.5
+43.8
+18.5
3.9
5
137
155
50
dBm
dBm
dB
V
mA
o
C/W
Notes
1. OIP3 measured with two tones at an output power of +9 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is
used to calculate the OIP3 using 2:1 rule.
2. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Prob.
Device Characterization Data
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 2 of 10 -
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
Gain and Maximum Stable Gain
30
Output Smith Chart
Input Smith Chart
1
Gain (Max)
0.8
4 GHz
25
4 GHz
Gain (dB)
0.6
20
0.4
0.01 GHz
15
Gain (S21)
0.2
0
-1 -0.75-0.5-0.25
-0.2 0 0.25 0.5 0.75 1
10
0.01 GHz
-0.4
5
-0.6
0
-0.8
0
0.5
1
1.5
2
2.5
3
3.5
4
-1
Frequency (GHz)
Note: The gain for the unmatched device in 50 ohm system is shown as the trace in red color, [gain (S(21)]. For a tuned circuit for a particular
frequency, it is expected that actual gain will be higher, up to the maximum stable gain. The maximum stable gain is shown in the black [Gain (MAX)].
The impedance plots are shown from 0.01 – 4 GHz.
S-Parameter Data
°
Vcc = +5 V, Icq = 135 mA, T = +25 C, unmatched 50 ohm system, calibrated to device leads
Freq
S11 (dB)
S11 (ang)
S21 (dB)
S21 (ang)
S12 (dB)
S12 (ang)
(MHz)
50
100
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
3200
3400
3600
3800
4000
-2.55
-2.91
-5.79
-1.41
-0.52
-0.45
-0.49
-0.60
-0.60
-0.67
-0.74
-0.72
-0.78
-0.71
-0.74
-0.75
-0.80
-0.75
-0.81
-0.82
-0.71
-0.68
176.64
172.21
172.18
-163.37
179.77
171.80
165.43
160.30
157.51
152.76
148.28
143.55
139.03
135.24
131.98
128.79
126.32
122.75
118.06
113.62
108.88
105.86
20.38
18.15
14.52
19.80
18.56
16.85
15.28
13.79
12.55
11.49
10.53
9.75
8.88
7.99
7.23
6.58
6.09
5.69
5.30
4.59
4.07
3.64
156.15
151.53
160.74
154.97
125.67
108.86
95.36
85.52
77.70
69.57
62.39
54.69
48.56
42.25
36.47
31.19
26.41
20.73
14.38
7.77
1.73
-2.85
-35.04
-35.97
-41.94
-34.61
-33.11
-32.96
-32.92
-33.15
-33.23
-33.03
-32.96
-33.03
-32.96
-32.88
-33.43
-33.15
-33.23
-33.43
-33.39
-33.03
-32.92
-33.15
-9.37
-20.12
-60.14
49.55
19.10
8.46
-1.08
-4.65
-9.05
-15.12
-19.02
-20.90
-25.51
-27.98
-30.45
-33.43
-36.48
-37.86
-44.57
-43.44
-50.92
-54.00
S22 (dB)
-5.88
-4.45
-3.20
-7.14
-6.55
-5.41
-4.76
-4.38
-4.24
-4.15
-4.00
-3.89
-3.77
-3.40
-3.38
-3.44
-3.50
-3.39
-3.48
-3.34
-3.04
-2.92
S22 (ang)
-159.98
-167.94
177.62
165.58
178.58
178.08
174.13
171.06
167.58
163.37
159.18
155.31
150.66
146.69
144.96
142.02
139.73
137.14
130.99
124.40
120.16
118.44
Application Circuit 869-960 MHz (TQP7M9102-PCB900)
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 3 of 10 -
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
1071363AW REV - 1071363PC REV +VCC
C4
R4
J3
J3 Vcc
0
R4
J4
GND
1.0 uF
C3
J4 GND
C4
C3
R2
R1
L1
33 nH
C2
C6
C5
C1
L1
100 pF
U1
C1
J1
R1
1
SOT89 EVAL. BRD., 1/2 WATT
RF
Input
5.6 pF
1.5 
2,4
C5
C2
R2
U1
TQP7M9102
5.6 pF
J2
3
2.2 nH
C6
100 pF
RF
Output
2.7 pF
Notes:
1. See PC Board Layout, page 7 for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. 0 Ω resistor (R4) may be replaced with copper trace in the target application layout.
4. The recommended component values are dependent upon the frequency of operation.
5. All components are of 0603 size unless stated on the schematic.
6. Critical component placement locations:
Distance from U1 Pin 1 (left edge) to C5 (right edge): 255 mils (12.1 deg. at 920 MHz)
Distance from U1 Pin 1 (left edge) to C1 (right edge): 460 mils (21.9 deg. at 920 MHz)
Distance from U1 Pin 3 (right edge) to R2 (left edge): 290 mils (13.8 deg. at 920 MHz)
Distance from U1 Pin 3 (right edge) to C6 (left edge): 370 mils (17.6 deg. at 920 MHz)
Bill of Material
Ref Des
n/a
U1
R4
R1
R2
L1
C1, C5
C6
C2, C3
C4
Value
n/a
n/a
0Ω
1.5 Ω
2.2 nH
33 nH
5.6 pF
2.7 pF
100 pF
1.0 uF
Description
Manuf.
Part Number
Printed Circuit Board
TQP7M9102 Amplifier, SOT-89 pkg.
Resistor, Chip, 0603, 5%, 1/16W
Resistor, Chip, 0603, 5%, 1/16W
Inductor, 0603, +/-0.3 nH
Inductor, 0805, 5%, Coilcraft CS Series
Cap., Chip, 0603, +/-0.1pF. 200V. NPO/COG
Cap., Chip, 0603, +/-0.1pF. 200V. NPO/COG
Cap., Chip, 5%, 50V, NPO/COG
Cap., Chip, 10%, 10V, X5R
TriQuint
TriQuint
various
various
Toko
Coilcraft
AVX
AVX
various
various
1071363
TQP7M9102
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 4 of 10 -
LL1608-FSL2N2S
0805CS-330XJLB
06032U5R6BAT2A
06032U2R7BAT2A
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
Typical Performance 869-960 MHz
Frequency
MHz
869
920
960
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3 (+19 dBm/tone, ∆f = 1 MHz)
WCDMA Channel Power (at -50 dBc ACLR) [1]
Noise Figure
Supply Voltage, Vcc
Quiescent Collector Current, Icq
dB
dB
dB
dBm
dBm
dBm
dB
V
mA
21.8
-10
-12
+27.3
+42.7
+18.0
5.9
21.9
-16
-10
+27.4
+43.4
+18.2
5.9
+5
137
21.7
-17
-9
+27.4
+43.9
+18.1
5.9
Notes:
1. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Prob.
RF Performance Plots 869-960 MHz
Gain vs. Frequency
22
21
20
−40°C
+25°C
+85°C
-10
-15
900
920
940
960
880
900
Freq (MHz)
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
-65
14
15
16
17
18
19
42
+85°C
+25°C
−40°C
40
20
-40
13
15
17
19
OIP3 (dBm)
-65
16
17
18
19
Pout (dBm)
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
20
920
940
960
Freq.= 920 MHz
27
42
960 MHz
920 MHz
869 MHz
40
25
−40°C
+25°C
+85°C
23
21
36
15
900
Output Power vs. Input Power
29
38
-60
14
880
Frequency (MHz)
44
-55
13
860
1 MHz Tone Spacing
Temp.=+25°C
-50
12
27
21
OIP3 Vs. Pout/Tone
46
Temp.=+25°C
960 MHz
920 MHz
869 MHz
-45
28
25
11
ACLR Vs. Output Power
960
−40°C
+25°C
+85°C
Pout/Tone (dBm)
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
940
26
Pout (dBm)
-35
920
29
Pout (dBm)
13
900
P1dB vs. Frequency
30
36
12
880
Freq (MHz)
38
-60
ACLR (dBc)
860
44
+85°C
+25°C
−40°C
-55
960
Freq.=920 MHz
1 MHz Tone Spacing
-45
-50
940
OIP3 Vs. Pout/Tone
46
Freq.=920 MHz
OIP3 (dBm)
ACLR (dBc)
-40
920
Freq (MHz)
ACLR Vs. Output Power
-35
-15
-25
860
P1dB (dBm)
880
-10
-20
-25
860
−40°C
+25°C
+85°C
-5
-20
19
Output Return Loss vs. Frequency
0
-5
Return Loss (dB)
23
Gain (dB)
Input Return Loss vs. Frequency
0
−40°C
+25°C
+85°C
Return Loss (dB)
24
19
11
13
15
17
Pout/Tone (dBm)
- 5 of 10 -
19
21
-3
-1
1
3
5
7
Pin (dBm)
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
Application Circuit 2110-2170 MHz (TQP7M9102-PCB2140)
1071363AW REV - 1071363PC REV +VCC
C4
R4
J3 Vcc
J3
0
1.0 uF
R4
J4
GND
C3
J4 GND
C4
22 pF
C3
L1
C6
R8
U1
R1
C1
L1
18 nH
R2
C2
J1
R1
C1
1
U1
TQP7M9102
RF
Input
0
1.5 pF
SOT89 EVAL. BRD., 1/2 WATT
R8
2,4
1.5 pF
R2
3
0
C6
C2
3.3 pF
J2
RF
Output
0.8 pF
Notes:
1. See PC Board Layout, page 7 for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. 0 Ω resistors (C1, R2) may be replaced with copper trace in the target application layout.
4. The recommended component values are dependent upon the frequency of operation.
5. All components are of 0603 size unless stated on the schematic.
6. Critical component placement locations:
Distance from U1 Pin 1 (left edge) to R8 (right edge): 40 mils (4.4 deg. at 2140 MHz)
Distance from U1 Pin 1 (left edge) to R1 (right edge): 115 mils (12.7 deg. at 2140 MHz)
Distance from U1 Pin 3 (right edge) to C6 (left edge): 180 mils (19.9 deg. at 2140 MHz)
Distance from U1 Pin 3 (right edge) to C2 (left edge): 450 mils (49.8 deg. at 2140 MHz)
Bill of Material
Ref Des
n/a
U1
C1, R2, R4
L1
R1, R8
C2
C3
C4
C6
Value
n/a
n/a
0Ω
18 nH
1.5 pF
3.3 pF
22 pF
1.0 uF
0.8 pF
Description
Manuf.
Part Number
Printed Circuit Board
TQP7M9102 Amplifier, SOT-89 pkg.
Resistor, Chip, 0603, 5%, 1/16W
Inductor, 0805, Coilcraft CS Series
Cap., Chip, 0603, +/-0.1pF. 200V. NPO/COG
Cap., Chip, 0603, +/-0.1pF. 200V NPO/COG
Cap., Chip, 5%, 50V, NPO/COG
Cap., Chip, 10%, 10V, X5R
Cap., Chip, 0603, +/-0.1pF. 200V NPO/COG
TriQuint
TriQuint
various
Coilcraft
AVX
AVX
various
various
AVX
1071363
TQP7M9102
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 6 of 10 -
0805CS-180XJLB
06032U1R5BAT2A
06032U3R3BAT2A
06032U0R8BAT2A
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
Typical Performance 2110-2170 MHz
Frequency
MHz
2110
2140
2170
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3 (+9 dBm/tone, ∆f = 1 MHz)
WCDMA Channel Power (at -50 dBc ACLR) [1]
Noise Figure
Supply Voltage, Vcc
Quiescent Collector Current, Icq
dB
dB
dB
dBm
dBm
dBm
dB
V
mA
17.9
-12
-12
+27.8
+43.6
+18.5
3.8
17.8
-12
-11
+27.6
+43.5
+18.4
3.9
5
137
17.7
-11
-10
+27.4
+43.6
+18.3
4.0
Notes:
1. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 10.2 dB at 0.01% Prob.
RF Performance Plots 2110-2170 MHz
-5
Retun Loss (dB)
Gain (dB)
19
18
17
16
15
2110
2120
2130
2140
Input Return Loss vs. Frequency
0
−40°C
+25°C
+85°C
2150
2160
-15
-20
2110
2170
2120
Freq (MHz)
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
-40
2140
2150
2160
OIP3 Vs. Pout/Tone
46
-55
42
+85°C
+25°C
−40°C
40
-65
20
7
9
Pout (dBm)
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
-40
11
13
15
W-CDMA 3GPP Test Model 1+64 DPCH
PAR = 10.2 dB @ 0.01% Probability
3.84 MHz BW
2170 MHz
2140 MHz
2110 MHz
-55
2170 MHz
2140 MHz
2110 MHz
19
Pout (dBm)
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
20
2150
2160
2170
−40°C
+25°C
+85°C
25
23
21
38
18
2140
27
42
40
-65
17
2130
Freq.=2140 MHz
Temp.=+25°C
-60
16
2120
Output Power vs. Input Power
29
1 MHz Tone Spacing
Pout (dBm)
OIP3 (dBm)
ACLR (dBc)
-50
15
27
Frequency (MHz)
44
14
28
25
2110
17
OIP3 Vs. Pout/Tone
46
Temp.=+25°C
-45
2170
−40°C
+25°C
+85°C
Pout/Tone (dBm)
ACLR Vs. Output Power
-35
2160
26
38
19
2150
29
-60
18
2140
P1dB vs. Frequency
30
P1dB (dBm)
+85°C
+25°C
−40°C
17
2130
Freq.=2140 MHz
1 MHz Tone Spacing
OIP3 (dBm)
ACLR (dBc)
-50
16
2120
Freq (MHz)
Freq.= 2140 MHz
-45
15
-15
-20
2110
2170
44
14
-10
Freq (MHz)
ACLR Vs. Output Power
-35
2130
−40°C
+25°C
+85°C
-5
−40°C
+25°C
+85°C
-10
Output Return Loss vs. Frequency
0
Retun Loss (dB)
Gain vs. Frequency
20
19
7
9
11
13
Pout/Tone (dBm)
- 7 of 10 -
15
17
2
4
6
8
10
12
Pin (dBm)
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TQP7M9102
½W High Linearity Amplifier
Pin Configuration and Description
GND
4
Pin
Symbol
1
RF IN
2, 4
GND
3
RFout / Vcc
1
2
3
RF IN
GND
RF OUT
Description
RF Input. Requires external match for optimal performance. External DC Block
required.
RF/DC Ground Connection
RF Output. Requires external match for optimal performance. External DC Block
and supply voltage is required.
Applications Information
PC Board Layout
1071363AW REV - 1071363PC REV -
PCB Material (stackup):
1 oz. Cu top layer
0.014 inch Nelco N-4000-13, εr=3.7
1 oz. Cu MIDDLE layer 1
Core Nelco N-4000-13
1 oz. Cu middle layer 2
0.014 inch Nelco N-4000-13
1 oz. Cu bottom layer
Finished board thickness is 0.062±.006
+VCC
GND
50 ohm line dimensions: width = .031”, spacing = .035”.
The pad pattern shown has been developed and tested for
optimized assembly at TriQuint Semiconductor. The PCB
land pattern has been developed to accommodate lead and
package tolerances. Since surface mount processes vary
from supplier to supplier, careful process development is
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 8 of 10 -
SOT89 EVAL. BRD., 1/2 WATT
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TQP7M9102
½W High Linearity Amplifier
recommended.
Mechanical Information
Package Information and Dimensions
This package is lead-free/RoHScompliant. The plating material on the
leads is NiPdAu. It is compatible with
both lead-free (maximum 260 °C reflow
temperature) and lead (maximum 245 °C
reflow temperature) soldering processes.
7M9102
The component will be marked with a
“7M9102”
designator
with
an
alphanumeric lot code on the top surface
of package.
Mounting Configuration
All dimensions are in millimeters (inches). Angles are in degrees.
Notes:
1. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 / .0135”) diameter drill and
have a final plated thru diameter of .25 mm (.010”).
2. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance.
3. RF trace width depends upon the PC board material and construction.
4. Use 1 oz. Copper minimum.
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
- 9 of 10 -
Disclaimer: Subject to change without notice
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TQP7M9102
½W High Linearity Amplifier
Product Compliance Information
ESD Information
Solderability
Compatible with the latest version of J-STD-020, Lead
free solder, 260°
ESD Rating:
Value:
Test:
Standard:
Class 2
≥ 2000 V and < 4000 V
Human Body Model (HBM)
JEDEC Standard JESD22-A114
ESD Rating:
Value:
Test:
Standard:
Class IV
>2000 V
Charged Device Model (CDM)
JEDEC Standard JESD22-C101
This part is compliant with EU 2002/95/EC RoHS
directive (Restrictions on the Use of Certain Hazardous
Substances in Electrical and Electronic Equipment).
This product also has the following attributes:
 Lead Free
 Halogen Free (Chlorine, Bromine)
 Antimony Free
 TBBP-A (C15H12Br402) Free
 PFOS Free
 SVHC Free
MSL Rating
Level 3 at +260 °C convection reflow
The part is rated Moisture Sensitivity Level 3 at 260°C per
JEDEC standard IPC/JEDEC J-STD-020.
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations, and information about
TriQuint:
Web: www.triquint.com
Email: [email protected]
Tel:
Fax:
+1.503.615.9000
+1.503.615.8902
For technical questions and application information:
Email: [email protected]
Important Notice
The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information
contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein.
TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information
contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is
entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and
verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any
use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other
intellectual property rights, whether with regard to such information itself or anything described by such information.
TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining
applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.
Data Sheet: Rev E 01/04/12
© 2011 TriQuint Semiconductor, Inc.
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Disclaimer: Subject to change without notice
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