Intel® System Debugger
Intel® Processor Trace on 5th generation Intel® Core™ Processor
Robert Mueller-Albrecht, TCE, SSG DPD ECDL
Agenda
1) What is XDB? Intel® System Debugger Overview
2) Intel® Processor Trace
3) Using Intel® PT support in the Intel® System Debugger
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
2
Intel® System Debugger for the Internet of Things
Key Features
•
•
•
•
•
•
•
•
Linux* and Windows* host
JTAG debug for Intel® Core™, Xeon® & Quark SoC-based platforms
EFI/UEFI Firmware, bootloader debug, Linux* OS awareness
UEFI debugging, optionally with debug agent
In depth visualization of memory configuration, system state and register sets
Dynamically loaded Linux kernel module debug
JTAG system debug with event tracing (SVEN)
LBR, IPT On-Chip instruction trace support, SMP run control support
OpenOCD*
Example: Intel® Galileo,
Intel® Quark SoC X1000
Dfx Abstraction Layer
TCI
3
Optimization Notice
Example: ,
Intel® Atom™ Processor E3825
Complete system debug solution provides
Deep Insights into memory and system configuration
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Low-overhead Processor Trace In New Intel® Core™ M Processor
Intel® System Studio low-overhead hardware-assisted tracing capabilities help developers isolate
non-deterministic errors
Program flow
Intel® System Debugger 2015 For
Program Execution History & Debugging
• Intel® Processor Trace - low-overhead
hardware based tracing capability on chip
• Now exposed with new Intel® Core™ M
processors
Isolate and resolve defects quickly
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Low intrusive
Instruction
Branch Trace
Recording
With Time
Stamps
4
Improved BIOS/EFI Debugging
Intel® System Studio enables BIOS/EFI developer to debug & trace for
robust and optimized system boot
Intel® System Debugger 2015
• Full visibility/access to EFI through
• JTAG
• USB (via EFI SW agent)
• Isolate non-deterministic errors
quicker through new Intel®
Processor Trace capability on Intel®
Core™ M processor
EFI debugging
with full trace
support
EFI modules in
the system
For more reliable and optimized system boot
covering all initialization phases
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
5
Intel® System Debugger for the Internet of Things
The only complete system debug solution for the Intel based Internet of Things
JTAG based bootloader, OS and device driver debug
Agent based UEFI debug
In depth visualization of memory configuration, system state and register sets
Common debugger front-end for all debug protocols
•
•
•
•
OpenOCD*
Dfx Abstraction Layer
6
Optimization Notice
Example: Galileo,
Intel® Quark SoC X1000
Example: Bayley Bay,
Intel® Atom™ Processor E3800
Deep Insights into memory and system configuration
Fast issue resolution with low-level system debuggers
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Intel® Processor Trace
Architectural Details:
http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64
-ia-32-architectures-software-developer-manual-325462.pdf
Chapter 36
Intel® Platform Analysis Library
https://software.intel.com/en-us/intel-platform-analysis-library
Decoder Library:
https://01.org/processor-trace-decoder-library
7
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Intel® Processor Trace – Decoder Flow
HW logs changes in execution flow.
 Jump addresses, conditional branch outcomes, asynchronous
execution transfers
Decoder SW reconstructs execution flow
 Consumes trace data.
 Needs code binaries to follow the indications in the trace.
IA CPU 1..n
Trace HW
BIOS, OS,
VMM
Intel® PT data
binaries
sideband data
Intel® PT
decoder
Intel® PTenabled
tools
HW-based low overhead code execution logging on instruction level.
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Intel® Processor Trace
Features & capabilities
• A new technology for future processors
• Offers exact control flow information
• Mode related information
 timing, paging, TSX state, execution mode, core-to-bus
clock ratio
• Highly compressed packet output Filtering
 Privilege level (CPL) / address space (CR3)
• Output to memory
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Intel® Processor Trace
Properties
• Doesn’t require any code modification
 Works with debug or production builds
• Can be used for system-wide tracing or JITted code
 Does require sideband information from the OS
• Context switches, address space modifications, etc
• Also requires object code to be able to decode traces
• Non-zero performance overhead
• Comes with it’s own public Trace Decoder Library
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Intel® Processor Trace
Operation Modes
Full trace mode
• User space keeps collecting trace data
• Kernel wakes it up
• Trace stops if buffer fills up
• Some data may get lost
Anomaly detection/snapshot mode
• Trace keeps running, but no data is collected from trace buffers
• Overwriting older data
• If an anomaly is detected, tracing is stopped briefly so that trace data can be
collected
• Otherwise tracing is stopped and trace data is discarded
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Execution Trace Methodology
Observe
Observe
 Run software while tracing …
 … until behavior departs from expectation
Fix
Survey
Survey
 In the trace navigate to the misbehavior
Inspect
Inspect
 Investigate how the software came to that point
 Navigate within trace
Fix
 Finding the root cause in the trace often means finding a potential
fix
 Change code, hence change SW behavior
Trace eases each step in the debug cycle by providing a
global view of SW states.
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
Execution Trace and Intel® System Debugger
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
13
Execution Trace
• Execution trace provides you with a trail of breadcrumbs…
• Open the trace window by clicking on the “Execution Trace” toolbar item
• Select the trace method from the trace window’s toolbar (Only the
methods that are supported by your target platform will be shown)
• Enable trace by clicking on the enable button in the trace window’s
toolbar
Intel Confidential
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
14
Execution Trace Features
Expand source lines
to reveal assembly
Jump to this line’s
source file or
instruction
Keep source and/or
assembler window
in-sync with trace
window
Clear trace buffers
Intel Confidential
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
15
Execution Trace Features (continued)
Colors indicating how recently
the instruction/line was executed
Intuitive
following of
execution flow
“+” indicates
multiple hits
Coloring can be configured in Options -> GUI Preferences
Intel Confidential
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
16
Execution Trace: Intel® Processor Trace
• Intel® PT and RTIT are supported on select recent Intel® processors, including
5th generation Intel® Core™ Processors
• If trace buffers were pre-configured (e.g. by the EFI BIOS), then you can just
enable trace and you’re set
• If trace buffers were not pre-configured, or if you’re not sure of the current
configuration, you can easily edit the configuration using the Trace
Configuration dialog. You can launch it by clicking on its icon in the trace
window’s toolbar
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
17
Trace Configuration Dialog (RTIT/PT)
Intel Confidential
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
18
Trace Configuration Dialog: Simple
“Simple Configuration” allows most users to easily configure trace buffers:
• Input the address of a memory region where it would be safe to place trace
data
• Input the size of that memory region
• Click “Create Configuration”
• The dialog will try to fit trace buffers into that region in order to fill it
completely
• If you are satisfied with the result, just press “Apply” and exit the dialog. If
not, proceed to “Advanced Configuration”
• You can now enable trace normally
Intel Confidential
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
19
Trace Configuration Dialog: Advanced
“Advanced Configuration” allows experienced users to finely tune the trace
buffer configuration:
• The buttons below the tree allow you to add/remove/move up/move down
buffers and tables
• Clicking on a buffer or table allows you to edit the specific parameters for that
node
• The interface will warn you if a table no longer has enough free space to
accommodate more buffers. Consider increasing the table size
• When you are satisfied with the configuration, just press “Apply” and exit the
dialog
• You can now enable trace normally
Intel Confidential
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
20
Summary
XDB – Intel® System Debugger is
• Intel’s system software debug solution for
UEFI BIOS, firmware, bootloader, OS and device driver debug.
• It supports JTAG via ITP-XDP3
• It supports UEFI BIOS debug via EDKII debug agent and JTAG
• It is available as part of Intel System Studio in public and NDA versions
It now also has full support for Intel® Processor Trace
Find out more at http://intel.ly/system-studio
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
21
Legal Disclaimer & Optimization Notice
INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO
ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND
INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors.
Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software,
operations and functions. Any change to any of those factors may cause the results to vary. You should consult other
information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of
that product when combined with other products.
Copyright © 2014, Intel Corporation. All rights reserved. Intel, Pentium, Xeon, Xeon Phi, Core, VTune, Cilk, and the Intel logo are
trademarks of Intel Corporation in the U.S. and other countries.
Optimization Notice
Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel
microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the
availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent
optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture
are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the
specific instruction sets covered by this notice.
Notice revision #20110804
Optimization Notice
Copyright © 2014, Intel Corporation. All rights reserved. *Other names and brands may be claimed as the property of others.
22