Solving the System-Level Design Riddle October 2014 What is the System Design Riddle? With no errors? Then marketing says they need it… Sooner Onbudget? With higher performance How do I complete my design ontime? In less area Sooner? Sorry, I meant early… …maybe you can drop a feature? Page 2 October 2014 Sonics, Inc. © 2014, all rights reserved How Sonics helps Sonics’ on-chip networks help leading SoC designers solve some of the most difficult challenges in SoC design 1333 MHz 1066 MHz 533 MHz CortexA15 Cluster 533 MHz CortexA7 Cluster MaliT658 Cluster 267 MHz M S I T 128 I 133 MHz Display Ctrl. CCI-400 M 128 HDMI 267 MHz 267 MHz Video Engine Video Encode M M M 64 32 128 I M 32 I 64 I I S On-die SRAM USB OTG 133 MHz 533 MHz USB 3 133 MHz S USB 2 133 MHz DRAM Ch. 1 USB 1 133 MHz I 64 C 2x3 I 64 M 533 MHz Audio 400 MHz J 3x1 M 533 MHz Cam 2 200 MHz 4x1 A 2x2 T DRAM Ch. 2 S 133 MHz On-die ROM S 5x2 I 4x1 T S 64 G I D 1x3 E 32 S 64 H SonicsGN Request Network T 4x1 I T I S M 32 32 64 64 64 M M PCIe E-net Security Engine DMA SATA 267 MHz 133 MHz 267 MHz 267 MHz 133 MHz M M Memory Throughput Physical Design Power Management Security Time-to-market Development costs Sonics System IP: On-chip Networks, Memory Subsystem, Power Partitioning & Management, Performance Monitor & Debug, Security Firewalls I I I I I I 32 64 F 4x1 T 64 64 I 64 M UFS SD/ CF/ MMC M HSI 133 MHz 133 MHz 133 MHz M M 133 MHz I 2x3 64 32 M IP Control B M 133 MHz T M Peripherals 128 High Frequency Sonics, Inc. © 2014, all rights reserved M I T 128 32 Page 3 October 2014 64 Cam 1 DDR3 2133 128 200 MHz I IP Integration DDR3 2133 Power Domain Boundary Sonics – The NoC Leader for 18 Years Sonics enables designers to integrate any IP from anywhere, anytime Easy IP re-use Connecting third party IP/subsystems Total System IP approach: Intelligent memory scheduling Optimal power-aware designs Data flow services: QoS, Security firewalls Software drivers Commanding presence in digital entertainment, mobile and wireless 200+ SoC tape-outs Results: 2.5B+ units shipped 138+ patent properties Improved TTM and quality Page 4 October 2014 Sonics, Inc. © 2014, all rights reserved Does Sonics Solve the Riddle? No, not entirely • Using Sonics and other high-quality IP will aid greatly • But there are limitations that good IP alone doesn’t solve - Your design methodology is probably wrong, though it may be the best you can do today 5 October 2014 Sonics, Inc. © 2014, all rights reserved What’s wrong? Waterfall Methodologies Specification Prototype Design Simulation Verification Emulation Physical Design 6 October 2014 Software Sequential operations • Little parallelism Changes in one phase may result in a reset of all downstream steps While design reuse (and use of purchased IP) is allowed, it cannot be fully exploited If one feature is causing a delay, it may be impossible to move forward with the rest of the design until it is resolved In general, the focus is on the process, rather than the desired outcome It’s easy to see the problems with the waterfall method. It assumes that every requirement can be identified before any design or coding occurs. Reasons for Changing IC Methodology Some drivers for change Consumer products • Short release cycle • Low power, but still always on • Security • Design costs IoT • Starting design without a complete spec Makimoto’s wave shifts emphasis from standardization to customization System companies are in best position to assume product risk 7 October 2014 Desired new attributes Ability to make reasonable progress with an incomplete specification To better solve modern design challenges: • Time-to-market • Power • Security Ability to easily ship “on-time”/early with a reduced feature set Improved relationship between architectural, logical, physical, and software design Why is Sonics leading this? 100% 250 90% 70% 60% 150 50% 40% 100 30% 20% 50 10% 0% Percent of Reuse Sonics, Inc. © 2014, all rights reserved 2018* 2017* 2016* 2015* 2014* 2013 2012 Avg. Number of IP Blocks Source: Semico Research Corp. Page 8 October 2014 2011 2010 2009 2008 2007 2006 2005 2004 2003 2002 2001 2000 1999 0 Avg, Number of IP Blocks 200 1998 Percent of Reuse 80% Why is Sonics leading this? $70 $120 $60 $100 M Dollars $80 $40 $60 $30 $40 $20 $20 $10 $0 $0 90nm 65nm 45nm / 40nm Silicon IP Integration Cost 32nm / 28nm 20nm Software IP Integration Cost Source: Semico Research Corp. Page 9 October 2014 Sonics, Inc. © 2014, all rights reserved 14nm* Total IP Integration Cost 10nm* Total M Dollars $50 SoC Architects Drive Both SW & HW SW Development of HWindependent SW Dev. of HWdependent SW and system architecture exploration Large (and growing) teams dependent upon architecture SoC architect responsible for many views of architecture • Normally disparate Increasing complexity of SW and HW results in increased costs and delays Performance analysis architecture validation and HW RTL verification and implementation Page 10 October 2014 Sonics, Inc. © 2014, all rights reserved Worth considering: Agile SW Development The Agile Manifesto was written in February of 2001, at a summit of seventeen independent-minded practitioners of several programming methodologies. The participants didn't agree about much, but they found consensus around four main values: • Individuals and interactions over processes and tools • Working software over comprehensive documentation • Customer collaboration over contract negotiation • Responding to change over following a plan Requirements Test & Feedback Architecture & Design Development “The Agile movement proposes alternatives to traditional project management. Agile approaches 11 are typically used in software development to help businesses respond to unpredictability.” October 2014 HW and IC Design Teams Must Evolve Yesterday Tomorrow Component-Level Aggregation System-Level Architecture One-time Usage Platform Reuse Hierarchical Requirements and Stepwise Design Management Concurrent Engineering and Agile IC Methodology Dedicated Resources Shared Resources 12 October 2014 What an Agile IC Methodology Might Look Like Waterfall Specification Prototype Design Simulation Verification Emulation Physical Design 13 October 2014 Time What an Agile IC Methodology Might Look Like Agile IC Methodology Specification Prototype Design Simulation Verification Emulation Physical Design Time Change the slope! The more vertical the better! 14 October 2014 Short term actions Sonics’ Plan Get the discussion started Create the communications links Gather the interested parties How you can help Join the LinkedIn group Participate in the conversation Invite others to get involved too Step 1: Join the “Agile IC Methodology” group on LinkedIn Step 2: Join the conversation – participate! 15 October 2014 Partnering to Win with Sonics Now, and in the Future Sonics has • The best technology • The strongest commitment • The largest team • The most experience • The best support • The strongest roadmap What can we do to help your team? Page 16 October 2014 Sonics, Inc. © 2014, all rights reserved
© Copyright 2024