Lutz Meinshausen

Lutz Meinshausen
POST-DOCTORAL RESEARCH ASSOCIATE
School of Mechanical and Materials Engineering
Washington State University, Pullman, Washington 99164, USA
I. Contact Information
Full Name:
Lutz Meinshausen
Mobile:
509 330 6879
E-Mail:
[email protected]
II. Research
Research fields:
Reliability of integrated circuits and ball grid arrays under consideration of
migration effects, thermal expansion mismatch and intermetallic compound
formation
Tin whisker growth mitigation in lead free solders
Tip based creation of nanostructures
Liquid electromigration
Electromigration and creep driven interfacial sliding of through silicon vias
01.01.201101.01.2014
Ph.D. student in France and Germany with binational doctoral advisers
(“cotutelle de thèse”). Financed by a grant from the French Ministry for
Higher Education & Science (MESR)
Dissertation: “Modelling the SAC microstructure evolution under thermal,
thermo mechanical and electrical constraints”
01.01.201331.12.2013
01.03.201031.12.2010
Ph.D. student, Information Technology Laboratory (LFI),
University of Hanover (Leibniz Universitaet Hannover).
01.09.201131.12.2012
Research working at the “Laboratoire de l'Intégration du
Matériau au Système“IMS („Laboratory for the integration
of materials into systems“), University of Bordeaux 1,
France.
01.01.201131.08.2011
Ph.D. student, Information Technology Laboratory (LFI),
University of Hanover (Leibniz UniversitätHannover).
Member of research staff, Information Technology Laboratory (LFI),
University of Hanover
 Preparing project proposals
 Presenting project results at international conferences
 Finite element analysis of reliability issues in package on package (PoP)
structures under consideration of electromigration, thermomigration
and CTE mismatch
01.01.201028.02.2010
Student Research Assistant, LFI, University of Hanover
 Finite element analysis of reliability issues in package on package (PoP)
structures under consideration of electromigration, thermomigration
and CTE mismatch.
III. Further professional training
01.09.2009 21.12.2009
Internship, Quality & Reliability Department (QRE), Global Foundries,
Dresden
Improvement of an existing fast waver level electromigration test (inline
measurements), to enable the reproduction of package level tests.
02.08.2004 24.09.2004
Internship, Department ofProfessional Education, Siemens, Hanover
Construction of a power supply unit.
IV. Education
01.10.2004 26.01.2010
University of Hanover
Diplom-Ingenieur (Dipl. Ing.):advanced academic degree in engineering
being equivalent to Master level.Specialization: Microelectronics
V. Additional Skills & Interests
Technical:
Preparation diamond polished cross sections with thin interfaces,
Scanning electron microscopy (BSE+ SE+EDS)
Physical Vapour Deposition: Evaporation
Electroplating
Optical Microscopy
IT skills:
LabView, ANSYS, MATLAB, C, Electronic Workbench (SPICE), VHDLAMS, Minitab, SiView (IBM), Microsoft Office
Languages:
German, English, French, Spanish
Memberships:
Association of German Engineers (VDI)
VII. Publication
Books

L. Meinshausen, “Modeling the SAC Microstructure Evolution under Thermal
Thermomechanical and Electrical Constraints”, Bibliothèque universitaire des sciences
et techniques, Université de Bordeaux, published in October 2014.
Peer-reviewed Journal Articles

L. Meinshausen, H. Frémont, K. Weide-Zaage et al.,“Electro- and Thermomigration
Induced Cu3Sn and Cu6Sn5 Formation in SnAg3.0Cu0.5 Bumps”, IEEE,
Microelectronics Reliability, to be published.

L. Meinshausen, H. Frémont, K. Weide-Zaage et al., “Electro- and Thermomigrationinduced IMC Formation in SnAg3.0Cu0.5 Solder Joints on Nickel Gold Pads”, IEEE,
Microelectronics Reliability, Vol. 53 No 9-11, 2013, pp. 1575-1580.

A. Moujbani, J. Kludt, K. Weide-Zaage, M. Ackermann, V. Hein, L. Meinshausen,
"Dynamic Simulation of Migration Induced Failure Mechanism in Integrated Circuit
Interconnects",IEEE, Microelectronics Reliability, Vol. 53 No 9-11, 2013, pp. 13651369.

L. Meinshausen, H. Frémont, K. Weide-Zaage, „Migration induced IMC formation in
SAC305 solder joints on Cu, NiAu and NiP metal layers“, IEEE, Microelectronics
Reliability, Vol. 52 No 9-10, 2012, pp. 1827-1832.

L. Meinshausen, K. Weide-Zaage, H. Frémont, “Electro- and Thermomigration induced
Failure Mechanisms in Package on Package“,IEEE, Microelectronics Reliability, Vol.
52 No 12, 2012, pp. 2889-2906.

K. Weide-Zaage, L. Meinshausen, H. Fremont, "Prediction of Electromigration Induced
Void Formation in TSV and SAC Contacts", IEEE Congress on Engineering and
Technology (CET), Shanghai 2011, IEEE Cat. Num.: CFP1148NCDR, ISBN: 978-161284-362-9, p. 376-382.

I. Bauer, K. Weide-Zaage, L. Meinshausen, „Influence of Air Gaps on the Thermal
Electrical Mechanical Behavior of a Copper Metallization“, IEEE, Microelectronics
Reliability, Vol. 51 No 9-11, 2011, pp. 1587-1591.

L. Meinshausen, K. Weide-Zaage, H. Frémont, „Migration induced material transport in
Cu-Sn IMC and SnAgCu micro bumps“,IEEE, Microelectronics Reliability, Vol. 51 No
9-11, 2011, pp. 1860-1864.
Conference Papers

L. Meinshausen, H. Frémont, K. Weide-Zaage et al., Electro- and Thermomigrationinduced IMC Formation in SnAg3.0Cu0.5 Solder Joints on Nickel Gold Pads, IEEE, 14th
Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and
Microsystems (EuroSimE), Wroclaw, Poland, 15-17 April, 2013, pp. 1-7.

L. Meinshausen, K. Weide-Zaage, H. Frémont, „Thermal Management for Stackable
Packages with Stacked ICs", IEEE, Mechanical & Multi-Physics Simulation, and
Experiments in Microelectronics and Microsystems (EuroSimE), April 2012, pp. 1-6.

L. Meinshausen, K. Weide-Zaage, M. Petzold, “Electro- and thermomigration in
microbump interconnects for 3D integration”, IEEE, Electronic Components and
Technology Conference (ECTC), June 2011, pp. 1444-1451.

L. Meinshausen, K. Weide-Zaage, “Exploration of Migration and Stress Effects in PoPs
Considering Inhomogeneous Temperature Distribution”, International Wafer-Level
Packaging Conference (IWLPC), October 2010, pp. 137-145.

K. Weide-Zaage, L. Meinshausen, H. Frémont, “Characterization of thermal-electrical
and mechanical behavior of PoP”, Surface Mount Technology Association, SMTAI
Orlando, October 2010, personal invited.

L. Meinshausen, K. Weide-Zaage, H. Frémont, “Underfill and Mold Compound
Influence on PoP Aging under High Current and High Temperature Stress”, IEEE,
Electronics System Integration Technology Conference (ESTC), September 2010.

L. Meinshausen, K. Weide-Zaage, H. Frémont, W. Feng: „PoP: ‘Prototyping by
determination of matter transport effect”, CPMT Symposium Japan, 2010 IEEE, p. 1-4.

L. Meinshausen, K. Weide-Zaage, H. Frémont, „Underfill and mold compound
influence on PoP ageing under high current and high temperature stresses”, Electronic
System-Integration Technology Conference (ESTC), 2010 3rd, p.1-6.

L. Meinshausen, K. Weide-Zaage, H. Frémont, W. Feng, „Virtual prototyping of PoP
interconnections regarding electrically activated mechanisms", IEEE, Mechanical &
Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems
(EuroSimE), April 2010, pp. 1-8.
VIII Presentations

L. Meinshausen, K. Weide-Zaage, H. Frémont, ”Application of Electromigration
Effects in microelectronics”, IEEE, Oregon Chapters CPMT/CAS & SMTA meeting,
October 2014, Hillsboro, Oregon, USA.

K. Weide-Zaage, J. Kludt, L. Meinshausen, A. Farajzadeh, “Synergiepotenzial von
finite Elemente Simulationen bei der Optimierung des Entwurfsprozesses von
Metallisierungen”, GMM CfP TuZ, February 2013, Dresden, Germany.

L. Meinshausen, H. Frémont, K. Weide-Zaage, „Preparation of reliability experiments
for three dimensional packaging”, Smart Failure Analysis for New Materials in
Electronic Devices (smart-FA), September 2012, Dresden, Germany.

L. Meinshausen, H. Frémont, „Influence of the fabrication process and the preparation
on electromigration induced IMC formation in PoP”, analyse de défaillance de
composants électroniques (anadef), June 2012, Seignosses, France.

K. Weide-Zaage, L. Meinshausen, J. Kludt: "Simulation von Phasenbildung in
Metallisierungen und Bumps", VDE-ITG Fachgruppe 8.5.6 fWLR/ Wafer Level
Reliability, Zuverlässigkeits- Simulation & Qualifikation, May 2012, München,
Germany.

L. Meinshausen, O. Aubel, H. Schmidt, "Ermittlung optimierter Ausfallkriterien für den
Vergleich zwischen PL-EM und Isothermal Tests", VDE ITG fWLR Workshop,
November 2009, Dresden, Germany.
IX Teaching
 Presentation at the Electrical and Computer Engineering Department Seminar,
Portland State University: ”Application
microelectronics”, October 2014.

of
Electromigration
Effects
in
Presentation at the Materials Science and Engineering Program seminar, Washington
State University: ” Modeling the Intermetallic Compound Formation in SnAgCu
under Thermal and Electrical Constraints”, March 2014.