MARX GENERATOR FOR THE NEW
HRR PULSE POWER SUPPLY
M.J. Barnes and L. Redondo (Lisbon
Superior Engineering Institute, Portugal)
13/05/2014
CLIC RF Breakdown Meeting
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Luís Redondo ([email protected])
Some highlights:
• PhD in Electric and Computing Engineering, from the Technical University of Lisbon,
Portugal;
• Master degree in Nuclear Physics, Faculty of Sciences from the University of Lisbon;
• Coordinator Professor, Lisbon Engineering Superior Institute;
• Currently supervising 4 PhD students and 6 Masters students;
• Elected member of the IEEE Nuclear and Plasma Sciences Society NPSS, Standing
Technical Committee for Pulsed Power Science and Technology, PPS&T, from 2011 to
2016;
• Five Technology and Science Portuguese Foundation grants, totalling €157k (Sept.
2008 till March 2014): main goal of this project was to develop a solid‐state
modulator with energy recovery for the CERN ISOLDE facility;
• Luis Redondo, Fernando A. Silva, in Muhammad Rashid et al, editors: Power
Electronics Handbook 3ed, 2010, Butterworth‐Hinemann Publishing, Elsevier, ISBN #
9780123820365, chapter 26, pp 669‐710;
• Considerable experience/expertise in Power Electronics and Marx Generators;
• Co‐founder, in 30 November 2011, of the company Energy Pulse Systems,
www.energypulsesystems.com, which develops, assembles and sells solid‐state
modulators for various (normally industrial) applications.
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CLIC RF Breakdown Meeting
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Present HRR System
Supply Section
d.c. spark
system
.
PFL:
Td=2000ns
Charging Resistor
Z0=50W
4k7 W
Pulse Generator Section
CT: Bergoz:
Fast Switch:
CT-D0.5-B Coax Cable:
Behlke:
Z0=50W
HTS-181-25-B
12kV
Matching
Resistor
50W
Diode
Filter
capacitor
4.7nF
Matching
resistor
50W
Sample voltage without BD (right) and measured
current following BD at 12 kV (left)
The measured voltage rise-time is
less than 55 ns (10% - 90%) and
the voltage reduces below 1% of
the applied voltage within 100 µs .
Bleed
resistor
80kW
tip
Sample
 Reliability issues: occasional failure of Behlke switch.
Probably due to turning off high current following a
BD [trigger to switch-on is increased in duration for
3 µs from the instant of a BD – but a turn-off
command can have been sent ≤200 ns before the BD
…..].
 Limitations – no active pull down at present (23 µs
fall time-constant  250 ns to 99%: 0.9930=0.74);
system could be modified to include active pulldown, but same reliability issues – so better to
explore other possibilities (e.g. Marx Generator)
The measured current has a 2 µs "flat top" of ~120A and a
rise time of 14 ns (10% - 90%). The estimated inductance,
based on the 14 ns rise-time, is approximately 320 nH.
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CLIC RF Breakdown Meeting
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Principle of Marx Generator (1)
A Marx generator is an electrical circuit first described by Erwin Otto Marx in 1924. Its
purpose is to generate a high-voltage pulse from a low-voltage DC supply.
The circuit generates a high-voltage pulse by charging a number of capacitors in
parallel, then subsequently connecting them in series. This is illustrated below for a 5
stage Marx.
1a) All the odd numbered MOSFETs/IGBTs (i.e. M1, M3, M5, …) are off.
1b) The capacitors (C1, C2 , … C5) are charged in parallel, from Vdc, by turning on all
the even numbered MOSFETs/IGBTs (i.e. M2, M4, M6, …) [Vmarx ≈ 0 V]:
Out+
D1
D2
D3
M1
+
Vdc
-
D4
M3
D5
M5
M7
M9
gate1
C1
C2
M2
C3
M4
C4
M6
VMarx
C5
M8
M10
gate2
Stored energy:
13/05/2014
1
nCnVdc2
2
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Principle of Marx Generator (2)
The circuit generates a high-voltage pulse by charging a number of capacitors in
parallel, then subsequently connecting them in series. This is illustrated below for a 5
stage Marx.
2a) Capacitors C1, C2 , … C5 have been charged to Vdc in step (1b). All the even
numbered MOSFETs/IGBTs (i.e. M2, M4, M6, …) are then turned off.
2b) All the odd numbered MOSFETs/IGBTs (i.e. M1, M3, M5, …) are then turned on, to
connect the capacitors in series. VMARX ≈ 5Vdc
Out+
D1
D2
D3
M1
+
Vdc
-
D4
M3
D5
M5
M7
M9
gate1
C1
C2
M2
C3
M4
C4
M6
VMarx
C5
M8
M10
gate2
Load voltage: VMarx   nVdc
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CLIC RF Breakdown Meeting
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Example of Each Stage
MC7805CDTG
ON Semiconductor
+15 V
The following circuit has been
implemented, by Luis Redondo,
using MOSFETs (in each charge
stage [M2] and pulse stage [M1]
two parallel MOSFETs are used).
1
7805
IN
OUT
+5 V
3
GND
2
330nF
330nF
GND2
In+
0.1uF
AVAGO
Technologies
+
4
DATA
Optic fibre 2 +5V 3
2
HFBR-2521Z GND 1
DATA
+
GND2
1
VDD
VDD
2
IN
OUT
TC1410 OUT
3
NC
4
GND
GND
8
7
6
5
VCC
IN
GND
IXRFD630
2
VCC
GND
gate1
OUT
Gate
GND
A
D1
M1
+
Microchip
K
GND
DE475102N21A
Out+
Drain
GND
GND
GND
GND
K
+
+
+
D
GND2
Gate
GND2
DE475102N21A
GND
A
Drain
GND
GND2
GND2
10uF
+
R10
+
K
A
D
Vcc=+15 V
4:20
+18 V
High
frequency
inverter
50 kHz
Dr
Dr
Dr
Dr
+
10uF
1
IN
R220
7815
OUT
GND2
MC7805CDTG
ON Semiconductor
MC7815CDTG
ON Semiconductor
3
1
IN
7805
GND
GND
2
2
OUT
3
+5 V
220nF
330nF
Out-
GND1
GND1
0.1uF
AVAGO
Technologies
DATA
Optic fibre 1 +5V
HFBR-2521Z GND
DATA
220nF
220nF
GND1
330nF
Z15 V
940C12P22K-F
CDE Cornell Dubilier
10uF
4
3
2
1
+
+
M2
+
Microchip
1
VDD
VDD
2
IN
OUT
TC1410 OUT
3
NC
4
GND
GND
8
7
6
5
VCC
IN
VCC
GND
IXRFD630
1
OUT
gate2
GND
GND
Gate
GND
DE475102N21A
Drain
GND
GND
GND
GND
K
+
GND1
+
+
D
GND1
Gate
GND
DE475102N21A
A
Drain
GND
GND1
In-
Vcc bank capacitor of IXRFD630:
- 2 tantalum capacitors of 4.7uF, MULTICOMP, CB1H475M2DCB;
- 2 ceramic capacitors of 0.47uF, KEMET, C322C474M5U5TA;
- 2 ceramic capacitors of 0.1uF, AVX, AR205F104K4R*;
- 2 ceramic capacitors of 0.01uF, AVX, AR205F103K4R*;
- 2 ceramic capacitors of 0.001uF, AVX, AR205F102K4R*.
Note: modular design so that, in case
of failure of a component, a card can
be replaced.
13/05/2014
Other capacitors in circuit:
- 10uF tantalum capacitors , AVX, TAP106M035CCS;
- 100pF ceramic capacitors , AVX, AR211A101K4R;
- 470pF ceramic capacitors , AVX,12067A471JAT2A.
All capacitors with the same capacitance have a same reference.
D - Power diodes of STMicroelectronics – STTH1512G-TR
Dr - ultra-fast diodes of Vishay – BYG22D-E3/TR
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1MΩ
Commercial unit: EPULSUS-PM1-10
Typical 10 kV / 62.5 A pulse
waveform on a 160 Ω resistor: 26 μs
width pulse and 100 Hz repetition
rate.
Commercial unit characteristics:
• Standard galvanised steel enclosure, 800x600x400 mm, 80 kg;
• Mains input 220-240 V cable supplied;
• Output cable;
• Output Ethernet plug for optional control available;
• BNC for monitoring the output voltage pulse available;
• Touch screen for programming output voltage, frequency and
pulse width, and for monitoring ;
• Safety interlocks and reset condition after power on
• Overcurrent protection;
• Series 2.2 Ω resistance for increasing overall output stability
and short-circuit protection.
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Example Waveforms.
Waveforms from: 1 kHz, IGBT based, modulator into a 250 pF load, using a 10 kV/180 A
(3.5 kW, single phase) commercial modulator at Energy Pulse Systems.
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CLIC RF Breakdown Meeting
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Estimate….
The estimated budget for a modulator, for the CLIC RF tests, is between 5000 € and
6000 €: to be confirmed when specifications are agreed upon.
For this project the modulators should be supplied via Energy Pulse Systems, as
materials and human capability are not available in the institute (only available for
small prototypes and concept validation).
With the specifications agreed and material ordered, in principle a (CE marked)
modulator would be delivered in 1-2 months.
Suggestion: Mike (et al.?) visit Luis, in Lisbon, for 1 day.
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CLIC RF Breakdown Meeting
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Questions….
For RF BD group:
a)
b)
c)
d)
e)
f)
g)
h)
Maximum capacitance to be driven ?
10 kV flattop ?
In the case of no BD, 1 kHz rep-rate,?
Importance of rise-fall time (given E30) ? [with such a strong dependency on
field strength (e.g. 0.9930 = 0.74, 0.9830 = 0.55 and 0.930=0.04), the rise and fall
times might not have a significant effect…. [But, given the same strong
dependency upon E, it is important to avoid overshoot (e.g. 1.0530=4.3 and
1.0130=1.35)]];
Acceptable voltage droop during flattop (capacitive load) ?;
Required “squareness” of current pulse following a breakdown ?
Requirements for pulse flattop duration and flatness (e.g. dark current
measurements?);
Others ??
From RF BD group…
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CLIC RF Breakdown Meeting
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