ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
5.4: Analysis of Sequential Circuits
Lecture Notes Set #09
Nov 11, 2014
[Important topic]
What we want: Given a logic circuit diagram, determine circuit behavior.
Goal: Given a sequential circuit, obtain its state diagram, or state table.
Procedure:
1) Derive flip-flop input equations; Derive output equations; Determine if
Mealy or Moore circuit.
2) Derive state equations
3) Derive transition table (may be skipped once skilled)
4) Derive state table and state diagram
Mealy: Output of circuit depends on internal flip-flops and external inputs.
Moore: Output of circuit depends on internal flip-flops only.
Ex 1. Fig. 5.21 (page 292). Analyze the following circuit.
Known:
• Sequential Circuit
• One input (x) and one
output (z)
• Two flip-flops (q1 and q2)
⇒ Four “States”
D inputs are functions of x, q1 and q2
Number of states = 2N
Where N = # of flip-flops
1) Derive flip-flop input equations; Derive output equations; Determine if
Mealy or Moore circuit.
D1 (x, q1, q2) =
D2 (x, q1, q2) =
z (x, q1, q2) =
Page 1 of 10
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
2) Derive state equations [Next state depends on input x and present state q1, q2]
Minterm lists are also helpful.
q1*(x, q1, q2) =
q2*(x, q1, q2) =
3) Derive transition table (may be skipped once skilled)
Input
x
Present
State
q1 q2
Next State Present
Output
q1* q2*
z
M = (# of FF) + (# of inputs)
M=
Number of rows = 2M
4) Derive state table and state diagram
Present
State
q1 q2
Next State
x=0
x=1
q1* q2*
q1* q2*
Present
Output
z
Output z has only just one column.
It does not depend on x.
Page 2 of 10
4 states
00
10
01
11
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
With State Table or State Diagram, we can draw a Timing Diagram for this
circuit.
Clock
x
q1
0
q2
0
z
(Assume q1q2 = 00 initially)
The same information can also be presented with a Timing Trace.
x
q1
q2
0
0
0
1
1
1
0
1
0
z
Page 3 of 10
0
0
1
1
?
?
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
Ex 2. Fig. 5.23 (page 293). Analyze the following Moore circuit.
Known:
• Sequential Circuit
• One input (x) and one
output (z)
• Two flip-flops (qA and qB)
⇒ Number of states: ____
JK inputs are functions of x, q1 and q2
1) Derive flip-flop input equations; Derive output equations; Determine if
Mealy or Moore circuit.
JA (x, qA, qB) =
KA (x, qA, qB) =
JB (x, qA, qB) =
KB (x, qA, qB) =
z (x, qA, qB) =
2) Derive state equations [Next state depends on input x and present state qA, qB]
Minterm lists are also helpful.
qA*(x, qA, qB) =
qB*(x, qA, qB) =
Page 4 of 10
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
3) Derive transition table (may be skipped once skilled)
Input
x
0
0
0
0
1
1
1
1
Present
State
qA qB
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Next State Present
Output
qA* qB*
z
M = (# of FF) + (# of inputs)
M=
Number of rows = 2M
4) Derive state table and state diagram
Present
State
qA qB
0 0
0 1
1 0
1 1
Next State
x=0
x=1
qA* qB*
qA* qB*
Present
Output
z
Output z has only just one column.
It does not depend on x.
Timing Diagram
Clock
x
qA
0
qB
0
z
(Assume qAqB = 00 initially)
Page 5 of 10
4 states
00
11
01
10
2 flip-flop ⇒ 4 states
1 input ⇒ 2 transitions/state
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
Ex 3. Fig. 5.26 (page 297). Analyze the following Mealy circuit.
D inputs are functions of x, q1 and q2
Known:
• Sequential Circuit
• One input (x) and one
output (z)
• Two flip-flops (q1 and q2)
⇒ Number of states: ____
1) Derive flip-flop input equations; Derive output equations; Determine if
Mealy or Moore circuit.
D1 (x, q1, q2) =
D2 (x, q1, q2) =
z (x, q1, q2) =
2) Derive state equations [Next state depends on input x and present state q1, q2]
Minterm lists are also helpful.
q1*(x, q1, q2) =
q2*(x, q1, q2) =
Page 6 of 10
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
3) We will skip transition table and go directly to state table
4) Derive state table and state diagram
Present
Next State
State
x=0
x=1
q1 q2
q1* q2* q1* q2*
0 0
0 1
1 0
1 1
4 states
Output
x=0
x=1
z
z
Output z has two columns.
One for x = 0, one for x = 0
00
11
01
10
2 flip-flop ⇒ 4 states
1 input ⇒ 2 transitions/state
Timing Trace [Caution: slightly different than for Moore-type circuit]
Let’s assume initial state is unknown (i.e., an uninitialized circuit)
x
0
?
?
qA
qB
1
1
0
1
1
1
1
0
z
Timing Diagram
[Mealy-type circuits exhibit glitches (false outputs)]
Clock
x
q1
q2
z
(Assume q1q2 = unknown initially)
Page 7 of 10
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
Ex 4. Analyze the following circuit. By the way, this is a serial adder circuit.
Two inputs (x, y), 1 output (z)
z
N = 1 flip-flop
# of states = 2N = 2 states
A
1) Derive flip-flop input equations; Derive output equations; Determine if
Mealy or Moore circuit.
DA (x, y, qA) =
z (x, y, qA) =
2) Derive state equation
QA* (x, y, qA) =
4) Derive state table and state diagram
Present
State xy=00
qA
q A*
0
1
Next State
xy=01 xy=10
q A*
q A*
0
1
Output
xy=11
q A*
z
1 flip-flop ⇒ 2 states
2 inputs ⇒ 4 transitions/state
Page 8 of 10
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Timing Diagram
Lecture Notes Set #09
Nov 11, 2014
[Notice that flip-flops are rising-edge triggered]
Clock
x
y
qA
(Assume qA = 0 initially)
Ex 5. (page 299). Sometimes different types of flip-flops can be used in the
same circuit. Analyze the following circuit.
Known:
• Sequential Circuit
• One input (x) and one
output (z)
• Two flip-flops (q1 and q2)
⇒ Number of states: ____
JK inputs are functions of x, q1 and q2
1) Derive flip-flop input equations; Derive output equations; Determine if
Mealy or Moore circuit.
J1 (x, q1, q2) =
K1 (x, q1, q2) =
D2 (x, q1, q2) =
z (x, q1, q2) =
Page 9 of 10
ENEE 244 – Digital Logic Design – Fall 2014
Dr. Kam F. Yee
Lecture Notes Set #09
Nov 11, 2014
2) Derive state equations [Next state depends on input x and present state q1, q2]
Minterm lists are also helpful.
q1*(x, q1, q2) =
q2*(x, q1, q2) =
4) Derive state table and state diagram
Present
State
q1 q2
0 0
0 1
1 0
1 1
Next State
x=0
x=1
q1* q2*
q1* q2*
Present
Output
z
Output z has only just one column.
It does not depend on x.
Timing Diagram
[Optional]
Clock
x
q1
q2
z
(Assume q1q2 = unknown initially)
Page 10 of 10
4 states
00
11
01
10
2 flip-flop ⇒ 4 states
1 input ⇒ 2 transitions/state