IDT 2014 Advanced Technical Program Keynote, Invited speakers and Mini-Tutorials: 40 Minutes each Papers: 25 minutes each Day 1: Tuesday December 16 7:45AM-8:45AM 8:45am-9:00am Registration Breakfast is part of the hotel room rate Hafid Aourag, DGRST, Algeria, Mustapha Slamani: IBM, USA Opening Address & Technical Program Mohand Tahar Belaroussi: CDTA , Algeria Introduction Yervant Zorian: Synopsys, USA General Co-Chairs Keynote Speaker & Invited Speaker 9:00AM-9:40AM EDA’s Key to Success: Riding Waves of Innovation Greg Hinckley, President of Mentor Graphics, Mentor Graphics, USA 9:40AM-10:20AM IC Qualification, Testing & Manufacturing using Advanced Package offerings & adequate process technologies Mohamed Djadoudi: Senior Vice President, Dialog Semiconductors GmbH, UK Poster Session, Coffee break/Refreshment 10:20AM-10:45AM Session 1 & 2 in parallel 10:45AM-11:10AM 11:10AM-11:35AM 11:35AM-12:00PM 12:00PM-12:25PM 12:25PM- 1:55PM Session 1: Industrial Track Chair: Dr. Hans G. Kerkhoff, Netherlands “RF Filter Characterization using a chirp” Peter Sarson, ams AG, Austria Session 2: JTAG and Hardware/Software Co-design Chair: Zoubir Khelifi, Dialog Semiconductors GmbH, UK “iJTAG Integration of Complex Digital Embedded Instruments”, Ahmed Ibrahim and Hans Kerkhoff, Universiteit Twente, Netherlands “Scalable High Speed Serial Interface for Data Converters Using The JESD204B Industry High Speed Special Function Unit for Graphics Processing Unit, Magdy El-Moursy, Mentor Graphics, Egypt Standard” Hakim Saheb, Analog devices Inc, USA “Failure and Root Cause Analysis for a System-OnHigh Performance MAC Designs, Nikolaos Eftaxiopoulos, Georgios Chip: An Industrial Case Study” Zervakis, Kiamal Pekmestzi and Constantinos Efstathiou, National Samir Boubezari and Jayant Chhabria , Qualcomm, Technical University of Athens (NTUA) Greece USA “Design, Test & Manufacturing of Integrated Efficient Embedded SoC Hardware/Software Codesign using Virtual Platform, Magdy El-Moursy, Ayman Sheirah, Mona Safar and Ashraf Circuits in the Nanotechnology Era” Omar Kebichi, Chiptestestimate, USA Salem, Mentor Grahics, Egypt Lunch Break Session 3 & 4 in parallel 2:00PM-2:25PM 2:25PM-2:50PM 2:55PM-3:25PM Session 3: Test and Reliability Chair: Aderrezak Smatti, CDTA “An Independent Dual Gate SOI FinFET Soft-Error Resilient Memory Cell”, Nikolaos Eftaxiopoulos, Nicholas Axelos, Georgios Zervakis, Konstantinos Tsoumanis and Kiamal Pekmestzi, National Technical University of Athens (NTUA) Greece “Early Reliability Evaluation of a Biomedical System”, Matteo Sonza Reorda, Hakob Hakobyan, Paolo Rech and Massimo Violante, Session 4: Mixed Signal Design & Test Chair: Peter Sarson, ams AG, Austria “Low-Cost EVM Built-in Test of RF Transceivers” Ayssar Serhan, Louay Abdallah, Haralampos-G. Stratigopoulos and Salvador Mir, IMEP-LAHC &TIMA Laboratory (CNRS-Univ. Grenoble Alpes), France “Accurate Analog/RF BIST Evaluation Based on the SVM Classification of the Process Parameters”, Ahcene Bounceur, Belkacem Brahmi, Kamel Beznia and Reinhardt Euler, Lab-STICC Laboratory, University Politecnico di Torino, State Engineering University of Brest, France of Armenia, UFRGS, Italy, Armenia, Brazil Invited Talk Dependable Mixed-Signal Integrated Systems under Aging, Dr. Hans G. Kerkhoff, University of Twente, Netherlands Poster Session Coffee break/Refreshment 3:30PM-4:00PM Mini Tutorial 4:00PM-4:30PM Addressing Trends & Challenges in Emerging Technology Nodes, Yervant Zorian; Chief Architect , Synopsys, USA 4:30PM-6:00PM Moderator: Hazem El Tahawy , EDA, Mentor Graphics, Egypt Panelists: Greg Hinckley, EDA, Mentor Graphics, USA Yervant Zorian: SOC, Synopsys, USA Mohamed Djadoudi: Low power, Dialog Semiconductors, UK Mustapha Slamani: Wireless, IBM, USA Peter Sarson: Mixed Signal & Automotive , ams AG, Austria Mojy Chian: Internet of Things, Silicon Cloud international, Singapore Paulo Freitas: Microsystems, International Iberian Nanotechnology Laboratory 7:00-9:00 Gala Dinner and Evening Entertainment Panel: Looking to the next 5 years? EDA, Wireless, Automotive, IOT, Low Power, SOC Day 2: Wednesday December 17 Registration Breakfast is part of the hotel room rate 8:00AM-9:00AM Keynote Speaker & Invited Speaker 9:00AM-9:40AM IoT Fosters Semiconductor Innovation 9:40AM-10:20AM Spintronic Microsystems: integrating analog devices with CMOS, 10:20AM-10:45AM Dr. Mojy C. Chian, Chief Executive Officer, Silicon Cloud International (SCI). Singapore Dr. Paulo Freitas, Deputy Director, International Iberian Nanotechnology Laboratory (INL), Portugal Coffee break/Refreshment Session 5 and Session 6 in parallel 10:45AM-11:10AM 11:10AM-11:35AM Session 5 : Nonvolatile Memories: Present and Future Challenges, Chair: Hakim Saheb, Analog Devices, USA Flash memories: a glance into the future, Cristian Zambelli – Università degli Studi di Ferrara, Dip. Ingegneria ENDIF, Ferrara, Italy Session 6: Analog, RF & Digital Design Chair: Dr. Salvador Mir: TIMA, France ReRAM: An alternative beyond Flash memory Hassen Aziza – Aix-Marseille University, France RF and Non-linearity characterizations of porous silicon layer for RF-Ics, Yasmina Belaroussi, Abdelhalim Slimane, Mohand Tahar Exploiting Satisfiability Modulo Theories for Analog Layout Automation, Sherif Saif, Mohamed Dessouky, Hazem Abbas, Salwa Nassar, Watheq El-Kharashi and Mohammad Abdulaziz, Mentor Graphics, Egypt Belaroussi, Gilles Scheen, Khaled Ben Ali and Jean Pierre Raskin CDTA, Algeria 11:35AM-12:00AM 12:00PM-12:25PM Title: MRAM: A different spin on nonvolatile memories Elena Ioana Vatajelu – Politecnico di Torino, Dip. di Automatica e Informatica, Torino, Italy Integration of STT-MRAM model into CACTI simulator, Marco Indaco, Stefano Di Carlo, Elena Ioana Vatajelu, Paolo Prinetto, Stefano Arcaro and Diego Pala, politecnico di Torino, Italy Multi-Device Layout Templates for Nanometer Analog Design, Mohannad Elshawy, Mohamed Dessouky and Sherif Saif, Mentor Graphics, Egypt WaferCatalyst – Towards Promotion of IC Design in the Middle East using Virtual Community Approach, Shahab Najmi, Abdulfattah Obeid and Mohammed Bensaleh, King Abdulaziz City for Science and Technology,(KACST), Saudi Arabia 12:30PM- :1:50PM Mini-Tutorial and (Session 7 and Session 8 in parallel) 2:00PM-2:40PM 2:40PM-3:05PM 3:05PM-3:30PM Mini_Tutorial: Challenges to the Design and Optimization of Cyber-Physical Systems Zebo Peng, Professor, Embedded Systems Laboratory, Linkoping University, Sweden Session 7: Formal Verification, Reliability &Security Session 8: Test Generation & Synthesis Chair: Dr. Samir Boubzari, Qualcomm, USA Chair: Dr. Ali Mahdoum, CDTA, DZ A UVM-Based Smart Functional Verification Computational Complexity in Test-Generation Algorithms, József Platform: Concepts, Pros, Cons, and Opportunities, Sziray, Department of Informatics, Széchenyi University, Győr, Khaled Mohamed, Mentor Graphics, Egypt Hungary Impact Analysis of Resistive Bridge within Deep Modeling Sequential Circuits with Shared Structurally Submicron Secured CMOS Circuits, Ghania Ait Synthesized BDDs, Raimund Ubar, Mihhail Marenkov, Dmitri Mironov Abdelmalek and Rezki Ziani, Department of Electronics Mouloud Mammeri University, Tizi Ouzou,Algeria 3:30PM-3:55PM Design for Security Test on Cryptographic ICs for Design-Time Security Evaluation, Cuiping Shao, Xiaobo Hu, Huiyun Li and Guoqing Xu, Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences, China 4:00PM-4:30PM and Vladimir Viies, Tallinn Technical University, Estonia BDD Based Synthesis of Boolean Functions using Memristors, Sayak Chakraborti, Varun Chowdhary Paturi, Kamalika Datta and Indranil Sengupta, Indian Institute of Engineering Science and Technology, Shibpur &Indian Institute of Technology, Kharagpur, India Poster Session, Coffee break/Refreshment Session 9 and 10 in parallel 4:30PM-4:50PM Session9: Reliability & Computation Chair: Dr. Arezki Benfdila, UT, DZ Reliability Analysis of CMOS Inverter Subjected to AC & DC NBTI Stresses, Amel Chenouf, Boualem Djezzar, Abdelmadjid Benadelmoumene, Hakim Tahi and Mohamed Goudjil, CDTA, Algeria 4:50PM-5:10PM 5:10PM-5:30PM 5:30PM-5:50PM Session 10: Arithmetic and FPGA Implementation Chair: Dr. Abdelhakim Khouas, Univ, Boumerdes, DZ Rapid Prototyping of PVS into FPGA: From Model Based Design to FPGA/ASICs Implementation, Sabrina Titri and Cherif Larbes, CDTA, ENP, Algeria Memristor-Crossbar Networks for Performing Parallel Computations Using Sneak Paths, Alvaro Velasquez and Sumit Jha, University of Central Florida, USA Testing Gas Sensor with ZnO and doped Al-ZnO Thin Layer Adsorption, Bakha Yamna, Djeridane Enhanced Bit-Width Optimization for Linear Circuits with Feedbacks, El-Sedik Lamini, Rima Bellal, Samir Tagzout, Hacène Belbachir and Adel Belouchrani, CDTA, USTHB, ENP, Algeria A New Binary Arithmetic for Finite-Word-Length Linear Controllers: MEMS Applications, Abdelkrim Kamel Oudjida, Ahmed Yassine, Aouimeur Walid, Menasri Lamia, Hamzaoui Saad and Abderrazak Smatti, CDTA,USTO-MB, Algeria Liacha, Mohamed Lamine Berrandjia, and Nicolas Chaillet, CDTA, Algeria, FEMTO-ST Institute, France Translating of MATLAB /SIMULINLK Models to Synchronous Dataflow Graph for Parallelism Analysis and Programming Embedded Multicore Systems, Kaouther Guesmi and Salem Hasnaoui, A New Efficient Reduction Scheme to Implement Tree Multipliers on FPGAs, Khaldoon Mhaidat and Abdulmughni Hamza, Jordan University of Science & Technology, Irbid, Jordan Sys'Com Laboratory,National School of Engineering, Tunis, Tunisia 5:50PM-6:00PM Closing Remarks & info about Day 3 Trip Day 3 Thursday December 18: Special Event all day Tipaza Touristic sites and Roman Ruins Visit