ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 ADAPTIVE DELTA SIGMA MODULATOR WITH FIFTH ORDER SCHEME SUITABLE FOR SDR SYSTEMS H Dhivya ME-Applied Electronics Shri Andal Alagar College of Engineering Abstract- This Paper, First shows the first order scheme of an delta sigma modulator The simulation of an first order delta sigma modulation reveals the average low pass filtered bit stream never exactly represents the input signal. It is always superimposed by some kind of noise. One way to reduce this noise is to increase the order because of its instability conditions so higher order modulation techniques is used. In delta sigma modulation technique upto Nth order values can be used. so here we using fifth order scheme through which achieves a low noise compare to the previous order noise values in it. The simulation of an fifth order delta sigma modulation also reveals even though the high order scheme used in DSM it provide less efficiency so we go for an fifth order adaptive delta sigma modulation The purpose of adaptive ΔΣ techniques is to enhance the stability and the dynamic range of the ΔΣ modulators. To be used for SDR (software defined radio) systems wireless transmitters This system is employed in order to provide an increased dynamic range and reduced quantization noise . The Delta-Sigma Modulator and uses. integration or summing (the sigma) is over the difference (the delta) In the 70’s, because of the initially limited performance of Sigma-Delta Modulators, their main use was in encoding low frequency audio signals (analog-to-digital conversion) using a 1-bit quantizer and a first or a second order loop filter. Where Sigma-Delta noise-shaping techniques were used (digital-todigital conversion). Since then a lot of research on improving SDM performance has been performed and great improvements have been realized. It is also used to transfer higher-resolution digital signals into lower-resolution digital Mr.P Saravankumar Assitant Professor Department/ECE Shri Andal Alagar College of Engineering signals as part of the process to convert digital signals into analog. Index Terms— modulation, delta sigma modulation adaptive delta sigma modulation I. INTRODUCTION Though our world has an analog nature, nowadays information is very often stored, transferred, and processed digitally. The advantage is obvious: 1. digital signals are much more immune to noise than their analog counterparts. Noise and distortion will accumulate during the transfer or copy of an analog signal, while a digital signal can be lossless copied or transferred as long as the noise and distortion are lower than the threshold which changes the digital value. 2. signal processing circuits can be implemented more easily, accurately and economically in digital domain thanks to the fast and continuous development of CMOS process. According to ITRS roadmap (International Technology Roadmap for Semiconductors), the mainstream CMOS process feature size will be scaled down to 32nm in the next 10 years, which is about one third of the current technology level (100nm, year 2003) It is a DSP method for encoding analog signals into digital signals as found in an ADC. It is also used to transfer higherresolution digital signals into lower-resolution digital signals as part of the process to convert digital signals into analog. In a conventional ADC, an analog signal is integrated, or sampled, with a sampling frequency and subsequently quantized in a multi-level quantizer into a digital signal. This process introduces quantization error noise. The first step in a delta-sigma modulation is delta modulation. In delta 43 All Rights Reserved © 2015 IJARTET ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 modulation the change in the signal (its delta) is encoded, rather than the absolute value. The result is a stream of pulses, as opposed to a stream of numbers as is the case with PCM. In delta-sigma modulation, the accuracy of the modulation is improved by passing the digital output through a 1bit DAC and adding (sigma) the resulting analog signal to the input signal, thereby reducing the error introduced by the delta-modulation. The quality and stability of noise shaping is a concern in the design of higher-order delta-sigma modulators for high-resolution, high-speed oversampled digital -to-digital conversion. This technique has found increasing use in modern electronic component such converters, synthesizers, switched and motor controllers, primarily because of its cost efficiency and reduced circuit complexity. A delta-sigma ADC first encodes an analog signal using high-frequency delta-sigma modulation, and then applies a digital filter to form a higherresolution but lower sample-frequency digital output. On the other hand, a delta-sigma DAC encodes a high-resolution digital input signal into a lower-resolution but higher samplefrequency signal that is mapped to voltages, and then smoothed with an analog filter. In both cases, the temporary use of a lower-resolution signal simplifies circuit design and improves efficiency. The coarsely-quantized output of a deltasigma modulator is occasionally used directly in signal processing or as a representation for signal storage. For example, the Super Audio CD (SACD) stores the output of a delta-sigma modulator directly on a disk. Figure 1: First order delta sigma modulator An adaptive sigma delta modulator is provided. The adaptive sigma delta modulator includes an input stage, a sigma delta modulator, an adaptation stage, and an output stage. The input stage produces a difference signal representing the difference between an analog input signal in a first amplitude range and an adaptive feedback signal. The sigma delta modulator produces an intermediate digital output sequence in a reduced second amplitude range representative of the difference signal. The adaptation stage produces the adaptive feedback signal such that the amplitude of the adaptive signal keeps the difference signal within the reduced second range. The output stage produces a final digital output sequence which is the sum of the intermediate digital output sequence and a delayed adaptive feedback signal. The final digital output sequence has an amplitude in the first range and is a digital representation of the analog input. clock period. The adaptive feedback signal may include an estimate of an signals. II. PROPOSED SYSTEM: The proposed which uses the different types of ordering scheme a first order system shows the performance of uses position information in order to design a strong self-pruning condition. The drawbacks of first order DSM is that they are sensitive to frequency synchronization problems and provides 44 All Rights Reserved © 2015 IJARTET ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 loss of efficiency that is caused by its noise sources of its so we implement an higher order scheme in it that is the fifth order schemes it also has some drawbacks such as its stability of the system doesn’t achieved. Adaptive delta sigma modulation is used to overcome all the drawbacks of an delta sigma modulation for analysis purpose we use an same fifth seen in first-order delta sigma modulators is pattern noise.To overcome these issues we have to go for an higher order delta sigma modulator through which we can achieve a low noise compare to the previous order noise values in it. order scheme it should adapt the amplitude of the ∆∑ output signal to the amplitude of the input signal it is achieved based on the variations in input signal power/magnitude . Figure 2: Block diagram of fifth Order delta sigma modulation III. SYSTEM ANALYSIS 1. Existing system 2. Delta sigma modulation A requirement of analog-to-digital (A/D) interfaces is compatibility with VLSI technology, in order to provide for monolithic integration of both the analog and digital sections on a single die. Since the Σ−∆ A/Converters are based on digital filtering techniques, almost 90% of the die is implemented in digital circuitry which enhances the prospect of compatibility. The modulator will be implemented with digital technology if you have a digital signal source and in analogue technique in case of an analogue signal source. The same applies to the low pass filter: You will use an analogue low pass filter if you need an analogue signal output. A digital low pass filter will be implemented if you want a digital output. The digital low pass filter will probably be realized by a digital circuit or by an algorithm within a signal processor. The delta sigma modulator is the core of delta sigma converters. Additional advantages of such an approach include higher reliability, increased functionality, and reduced chip cost. Those characteristics are commonly required in the digital signal processing environment of today. Consequently, the development of digital signal processing technology in general has been an important force in the development of high precision A/D converters which can be integrated on the same die as the digital signal processor itself The better way to reduce the noise is to use a higher order sigma delta Modulator. Bit streams produced by higher order modulators produce less noise at the low pass filter outputs. Normally this noise is random. First order modulators show some strong frequencies in the power spectrum non-random noise or residual tones, which is disadvantageous. If the input signal is close to the limits of the input range this effect is worst with first order modulators. Another problem usually 45 All Rights Reserved © 2015 IJARTET ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 Figure 3:Delta sigma modulation with digital to digital converters IV. METHODLOGY AND DESCRIPTION Block Diagram The stages involved in the process of fifth order adaptive delta sigma modulator are discussed. It starts with a brief review of the block diagram processes involved Figure 4:Block diagram representation 1. Adaptive delta sigma modulator with fifth order: The adaptive ΔΣM presented here is a single-bit system and uses instantaneous adaptation and backward estimation.The adaptation algorithm is based on an exponential lawwhich ensures that the adaptation properties are independent of the average input power level over a particularinput amplitude range. The feedback signal is generated by a digital-to-digital converter (DAC). Possible levels ofthe feedback signal are chosen from a finite set, which ensures a reproducible reconstruction of the input signal from the binary data sequence. The proposed adaptive modulator shows an improved structre 46 All Rights Reserved © 2015 IJARTET ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 Figure 5 : Fifth order adaptive delta Sigma modulator V. RESULT ANALYSIS 1. Result Evaluation One of the major contributions of this work is the design of a adaptive delta sigma modulator based on delta sigma modulator approach that can achieve the Reduction of quantization noise .the first order delta sigma modulation shows the simple and best approach for small values of signals To enhance the results we go for an Fifth order delta sigma modulator which justify the higher order schemes capability 2. Final simulation The program coding has been written in Verilog language and simulated in MODELSIM simulator 1) Simulation of first order delta sigma modulator The figure shows that when the input data is given into the system it performs the slow varying of signals in and the ouput is with adding some noise in the simulated waveform 2) Simulation of fifth order delta sigma modulator 47 All Rights Reserved © 2015 IJARTET ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 The figure shows that the using an higher order schemes the slow varying signals can overcome and the stability of the system is increases 3) Simulation of fifth order adaptive delta sigma modulator The figure shows that the noise made by an delta sigma modulator is overcome by the usage of an adaptive delta sigma modulator using the same order scheme and parameter including in an adaptive delta sigma modulator is done VI. CONCLUSION Higher order schemes of an delta sigma modulator is used for an comparison of the featured adaptive delta sigma modulator in order to improve the stability of signals and also to reduce the noise in delta sigma modulators which can be done using the simulation techniques and these aspects are obtained in digital signals which is used as an input to it modulation where we use an digital source moment. VII. REFERENCES [1]Abdelghani Dendouga, Nour-Eddine Bouguechal, Souhil Kouda, Samir Barra. (2010).Modeling of a Second Order Non-Ideal Sigma-Delta Modulator. World Academy of Science, Engineering and Technology. Vol 4:2010-08-29. 48 All Rights Reserved © 2015 IJARTET ISSN 2394-3777 (Print) ISSN 2394-3785 (Online) Available online at www.ijartet.com International Journal of Advanced Research Trends in Engineering and Technology (IJARTET) Vol. II, Special Issue XXIII, March 2015 in association with FRANCIS XAVIER ENGINEERING COLLEGE, TIRUNELVELI DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN COMMUNICATION SYSTEMS AND TECHNOLOGIES (ICRACST’15) TH 25 MARCH 2015 [2]Dayu Yang, Richard C Jaeger IEEE, Foster Dai, Weining Ni, Shi Yin (2009) Delta-Sigma Modulation for Direct Digital Frequency Synthesis. IEEE Transactions on very large scale integration (VLSI) systems, vol. 17, no. 6, June. [3]Dhanabal R et al., (2014). Design Of Second Order SigmaDelta Modulator For Audio Applications. Journal of Theoretical and Applied Information Technology. 31st July 2014. Vol. 65 No.3. [4]Ebrahimi, M. Helaoui, and F. M. Ghannouchi (2011). Time interleaved delta-sigma modulator for Wideband digital GHz transmitters design And sdr applications. Progress In Electromagnetics Research B, Vol. 34, 263-2r 81. [5]Galton (1996). Oversampling parallel delta-sigma modulator A/D conversion. Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions. Volume: 43, Issue: 12. [6]King, E.T. et al., (1998). A Nyquist-rate delta-sigma A/D converter,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 45–52. Jan. [7]Mats E. Hovin (2000). Thesis. First-order frequency Δ-Σ modulation. [8]Mencer et al.,(2001),“Object-oriented domain-specific compilers for programming FPGAs,”IEEE Trans. VLSI Syst.,vol. 9, no. 1, pp. 205–210, February 2001. [11]Peter kiss et.al.,(2003) stable high-order delta-sigma DAC’s IEEE transactions on circuits and systems–i: fundamental theory and application. [12]Rode J (2003). Transmitter architecture using digital generation of RF signals.Radio and Wireless Conference, RAWCON '03. Proceedings. [13]Safar Hatami,et al.,(2014)Single-Bit Pseudoparallel Processing Low-Oversampling Delta–sigma modulator suitable for sdr wireless transmittersieee transactions on very large scale integration (vlsi) systems, vol. 22, no. 4, april 2014 [14]Sushant Jain et al., (2000).Wireless LAN MAC protocols. [15]Shahid Masud et al., (2007)”Design & Implementation of an Adaptive Delta Sigma Modulator” [16]WangYuanxun et al.,(2002) “A class-S RF amplifier architecture withenvelope delta-sigmamodulationRadio and Wireless Conference”, 2002. RAWCON 2002. IEEE Radio and Wireless Conference, RAWCON 2002. IEEE. [17]Yang, D et al.,(2009), “Delta-sigma modulation for direct digital frequency synthesis,”IEETrans. Very Large Scale Integration. (VLSI) Syst., vol. 17, no. 6, pp. 793–802, Jun. 2009. [9]Norsworthy S.R et al.,(1997)“Oversampling DeltaSigma Data Converters: Theory,Design, and Simulation, 3rd ed. Piscataway,NJ, USA: IEEE Press, 1997 [10]Lee,et al.,(1987)“A novel higher-order interpolative modulator topology forhigh resolution oversampling A/D converters,” Master’s thesis, MassachusettsInstitute of Technology, Cambridge, MA, 49 All Rights Reserved © 2015 IJARTET
© Copyright 2024