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cla
d
e
i
rif
Remote-scoperectified
promotion verified
John Wickerson (Imperial), Mark Batty (Kent), Ally Donaldson (Imperial), Brad Beckmann (AMD)
REMS workshop, Cambridge
22 April 2015
In brief
•
RSP is a GPGPU language extension from AMD
that enables efficient work-stealing
•
We worked with AMD to formalise their design (at
language and HW level). This led to a corrected
and improved implementation.
•
Formalise early in the design process!
This talk
1. What is RSP?
2. Adding RSP to the OpenCL memory model
3. A formalised implementation of OpenCL+RSP
This talk
1. What is RSP?
2. Adding RSP to the OpenCL memory model
3. A formalised implementation of OpenCL+RSP
C11: flat thread structure
T0
T1
T2
T3
T4
T5
OpenCL: thread groupings
device
device
workgroup
T0
workgroup
T1
T2
workgroup
T3
T4
T5
GPUs: hierarchical memory
device
device
workgroup
T0
workgroup
T1
T2
L1 CACHE
workgroup
T3
L1 CACHE
L2 CACHE
T4
T5
L1 CACHE
L2 CACHE
GLOBAL MEMORY
Memory scopes
Memory scopes
store(x,42)
load(x)
workgroup
T0
workgroup
T1
T2
T3
Memory scopes
store(x,42,WG)
load(x,WG)
workgroup
T0
workgroup
T1
T2
T3
Memory scopes
store(x,42,WG)
load(x,WG)
workgroup
T0
workgroup
T1
T2
T3
f
!
y
t
aul
Memory scopes
store(x,42,DV)
load(x,DV)
workgroup
T0
workgroup
T1
T2
T3
ok!
Memory scopes
store(x,42,DV)
load(x,WG)
workgroup
T0
fa
*
!
y
ult
workgroup
T1
T2
T3
*...but the
OpenCL
standard
could easily
be extended
to allow this
Work-stealing
store(headA,_,WG) //push
store(headA,_,WG) //pop
workgroup A
T0
T1
tailA headA
workgroup B
T2
T3
tailB headB
Work-stealing
store(headA,_,WG) //push
store(headA,_,???) //steal
store(headA,_,WG) //pop
workgroup A
T0
T1
tailA headA
workgroup B
T2
headB
tailB
T3
o
t
y
a
w
no
s
i
h
t
g
plu
n
i
hole L!
C
n
e
Op
Remote-scope promotion
store(x,42,DV)
T0
load(x,DV)
T1
T2
T3
Remote-scope promotion
store(x,42,WG)
T0
load(x,DV)
T1
T2
T3
Remote-scope promotion
store(x,42,WG)
T0
load(x,DV,remote)
T1
T2
T3
Remote-scope promotion
store(x,42,DV,remote)
T0
T1
load(x,WG)
T2
T3
Work-stealing
store(headA,_,WG) //push
store(headA,_,DV,remote) //steal
store(headA,_,WG) //pop
workgroup A
T0
T1
tailA headA
workgroup B
T2
headB
tailB
T3
This talk
1. What is RSP?
2. Adding RSP to the OpenCL memory model
3. A formalised implementation of OpenCL+RSP
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Testing OpenCL+RSP
programs
•
We extended Herd to support the new memory model.
•
We simulated the 12 litmus tests designed by the AMD
developers to define their expectations of RSP.
•
We found 8 were good, but: 2 had unintentional races, 1 enforced broken behaviour, and 1 forbade reasonable behaviour.
•
We also found (and fixed) bugs in their work-stealing
queue implementation
This talk
1. What is RSP?
2. Adding RSP to the OpenCL memory model
3. A formalised implementation of OpenCL+RSP
Implementing RSP
•
Model of GPU hardware
•
Assembly-like language, with instructions modelled
as state transformers
•
Mapping from OpenCL+RSP operations to
sequences of assembly instructions
•
Can then prove that all behaviours of the compiled
program are allowed by the OpenCL+RSP MM.
New compilation scheme
na or WG
r=load(x)
store(x,r)
r=fetch_inc(x)
DV (not remote)
DV (remote)
New compilation scheme
na or WG
r=load(x)
LD r x
store(x,r)
ST r x
r=fetch_inc(x)
INCL1 r x
DV (not remote)
DV (remote)
New compilation scheme
r=load(x)
store(x,r)
r=fetch_inc(x)
na or WG
DV (not remote)
LD r x
LD r x
INVL1 WG
ST r x
FLUL1 WG
ST r x
INCL1 r x
FLUL1 WG
INCL2 r x INVL1 WG
DV (remote)
New compilation scheme
r=load(x)
store(x,r)
r=fetch_inc(x)
na or WG
DV (not remote)
DV (remote)
LD r x
LD r x
INVL1 WG
LD r x FLUL1 DV
INVL1 WG
ST r x
FLUL1 WG
ST r x
FLUL1 WG
INVL1 DV
ST r x
}
FLUL1 WG
INCL2 r x INVL1 WG
FLUL1
INVL1
INCL2
FLUL1
INVL1
}
INCL1 r x
WG
DV
r x
DV
WG
LKrmw
LKrmw
Old compilation scheme
r=load(x)
store(x,r)
r=fetch_inc(x)
na or WG
DV (not remote)
DV (remote)
LD r x
INVL1 WG
LD r x
FLUL1 DV
INVL1 WG
LD r x
}
LK x
ST r x
FLUL1 WG
ST r x
FLUL1 WG
ST r x
INVL1 DV
}
LK x
INCL1 r x
FLUL1 WG
INVL1 WG
INCL2 r x
FLUL1
INVL1
INCL2
INVL1
}
DV
WG
r x
DV
LK x
LKrmw
New compilation scheme
r=load(x)
store(x,r)
r=fetch_inc(x)
na or WG
DV (not remote)
DV (remote)
LD r x
LD r x
INVL1 WG
LD r x FLUL1 DV
INVL1 WG
ST r x
FLUL1 WG
ST r x
FLUL1 WG
INVL1 DV
ST r x
}
FLUL1 WG
INCL2 r x INVL1 WG
FLUL1
INVL1
INCL2
FLUL1
INVL1
}
INCL1 r x
WG
DV
r x
DV
WG
LKrmw
LKrmw
Contributions
•
Extended OpenCL mm to include RSP
•
•
Extended Herd with new mm, and used it to find and
fix bugs in RSP litmus tests and programs
Formalised implementation of RSP (model of GPU
hardware + assembly language)
•
Found and fixed bugs in original compilation
scheme
•
Proved new improved scheme correct
cla
d
e
i
rif
Remote-scoperectified
promotion verified
John Wickerson (Imperial), Mark Batty (Kent), Ally Donaldson (Imperial), Brad Beckmann (AMD)
REMS workshop, Cambridge
22 April 2015
Spare slides
A corrupt MP
*x=42;
store(y,1,DV);
T0
T1
if(load(y,DV)==1)
print(*x);
T2
T3
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
T0
INVL1 WG;
LD y; //1 LD x;
T1
T2
T3
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
T0
INVL1 WG;
LD y; //1 LD x;
T1
T2
T3
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
T0
INVL1 WG;
LD y; //1 LD x;
T1
T2
T3
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
T0
INVL1 WG;
LD y; //1 LD x;
T1
T2
T3
x=0
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
INVL1 WG;
LD y; //1 LD x;
T0
T1
x=42
T2
T3
x=0
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
INVL1 WG;
LD y; //1 LD x;
T0
T1
T2
x=42
T3
x=0
x=42
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
INVL1 WG;
LD y; //1 LD x;
T0
T1
T2
x=42
y=1
T3
x=0
x=42
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
INVL1 WG;
LD y; //1 LD x;
T0
T1
T2
x=42
y=1
T3
x=0
x=42
y=1
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
INVL1 WG;
LD y; //1 LD x;
T0
T1
T2
x=42
y=1
T3
x=0
y=1
x=42
y=1
A corrupt MP
ST x 42;
FLUL1 WG; ST y 1;
INVL1 WG;
LD y; //1 LD x;
T0
T1
T2
x=42
y=1
T3
x=0
y=1
x=42
y=1