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The Design, Construction, and Testing of a
Modular GPS Bistatic Radar Software Receiver
for Small Platforms
by
S. Esterhuizen
B.S., University of Colorado, 2004
A thesis submitted to the
Faculty of the Graduate School of the
University of Colorado in partial fulfillment
of the requirements for the degree of
Master of Science
Department of Electrical and Computer Engineering
2006
This thesis entitled:
The Design, Construction, and Testing of a Modular GPS Bistatic Radar Software
Receiver for Small Platforms
written by S. Esterhuizen
has been approved for the Department of Electrical and Computer Engineering
Dennis Akos
Tim Brown
Scott Palo
Date
The final copy of this thesis has been examined by the signatories, and we find that
both the content and the form meet acceptable presentation standards of scholarly
work in the above mentioned discipline.
iii
Esterhuizen, S. (M.S., Electrical Engineering)
The Design, Construction, and Testing of a Modular GPS Bistatic Radar Software
Receiver for Small Platforms
Thesis directed by Prof. Dennis Akos
Recently the use of Global Positioning System (GPS) signals as opportunistic
bistatic radar signals has become increasingly popular in the radar and navigation communities for remotely sensing the Earth’s surface. A GPS bistatic radar uses two reception antennas: one tracking the direct signal from the satellite oriented skyward; the
other observing the surface-reflected signal oriented toward the earth. In the past, a
mixture of both application specific integrated circuit (ASIC) based and software receivers have been used, but these require a desktop or laptop computer to operate them.
Previous receiver configurations are thus prohibitively large and can not be mounted on
smaller platforms, e.g. Unmanned Aerial Vehicles (UAVs) and Remote Control (RC)
airplanes.
To allow for integration of a GPS bistatic receiver on small platforms, the instrument itself need to be redesigned with size and power limitations in mind. This new
design will feature two analog front-ends with a common clock and a Universal Serial
Bus (USB) bridge to move the digital samples to a x86-based single board computer.
These samples are then saved to disk for post-processing. It is not the focus of this
thesis to develop bistatic algorithms, but to provide a modular hardware platform that
can be used for GPS bistatic research on small platforms. In addition to the hardware
design, thorough testing and verification will be performed to ensure correct operation
of the receiver. These tests are concluded with a field test, where GPS reflections were
detected with the instrument from a high-altitude balloon mission.
Dedication
To the open source community, whom without this project would have been
extremely difficult.
v
Acknowledgements
This work was funded under Cooperative Agreement NNL04AA59G through the
NASA Langley Research Center. In addition to NASA, I would like to acknowledge
Prof. Dennis Akos and Prof. Penny Axelrad, they have taught me much about GPS.
Furthermore, some of the code used to generate plots in this paper was written by Dr.
Dallas Masters. Mr. Marcus Junered, whom has contributed some of the FX2 firmware
code. Mr. Jack Elston provided me with a good deal of scripts and help in getting
the embedded gentoo Linux system going. I’d also like to acknowledge Prof. Scott
Palo, whom I originally did USB work for (on another project) and thus gave me a
head start with this thesis work. Mr. Lloyd Rochester, for providing a hand with the
FPGA PCB layout. The guys from EOSS [3], Mr. Chris Koehler, and the students
from his gateway-to-space class for helping me integrate and fly my instrument on a
balloon mission. Last, but not least, the fine GNU Radio folks, since they provided the
framework for the USB data-bridge.
vi
Contents
Chapter
1 Introduction
1.1
1.2
1
GPS Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1.1
Signal Structure . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
GPS Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.2.1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.2.2
Signal Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
1.2.3
Code Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
1.2.4
Carrier Tracking . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
2 GPS as a Bistatic Radar
9
2.1
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
2.2
Reflected Signal Properties . . . . . . . . . . . . . . . . . . . . . . . . .
11
2.3
Detection of Reflected Signals . . . . . . . . . . . . . . . . . . . . . . . .
13
3 Motivation
15
3.0.1
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
3.0.2
Goal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
4 Hardware Design
4.1
Analog Front-ends . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
vii
4.2
FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
4.3
USB Data Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
4.3.1
Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20
4.3.2
General Programmable Interface (GPIF) . . . . . . . . . . . . . .
21
4.3.3
Buffers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
4.3.4
8051 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . .
22
4.3.5
USB Engine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
4.3.6
Host-side Software . . . . . . . . . . . . . . . . . . . . . . . . . .
23
4.4
Single Board Computer . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
4.5
Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
4.5.1
2.5” Laptop SATA SSD . . . . . . . . . . . . . . . . . . . . . . .
25
4.5.2
USB Memory Disk . . . . . . . . . . . . . . . . . . . . . . . . . .
25
Interface Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
26
4.6.1
26
4.6
Headers and Jumpers . . . . . . . . . . . . . . . . . . . . . . . .
5 Verification
31
5.1
Power and Mass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
31
5.2
Streaming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
32
5.2.1
512 Samples Skipped . . . . . . . . . . . . . . . . . . . . . . . . .
33
5.2.2
1,4, and 8 Samples Skipped . . . . . . . . . . . . . . . . . . . . .
33
5.2.3
Sample Skip Test with Real Data . . . . . . . . . . . . . . . . . .
37
Radio Frequency Interference (RFI) . . . . . . . . . . . . . . . . . . . .
39
5.3.1
RFI Mitigation . . . . . . . . . . . . . . . . . . . . . . . . . . . .
39
Power Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
44
5.4.1
Power Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . .
44
5.4.2
Received Power to C/No Calibration . . . . . . . . . . . . . . . .
46
Isolation Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
46
5.3
5.4
5.5
viii
5.6
High Level Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
5.6.1
Position Solution . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
5.6.2
Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
6 Experimental Data
55
6.1
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
6.2
Integration and Checkout . . . . . . . . . . . . . . . . . . . . . . . . . .
57
6.2.1
Pre-Launch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
57
6.2.2
Post-Launch
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
6.3.1
RFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
6.3.2
Altitude Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . .
62
6.3.3
Path Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
62
6.3.4
Correlation Waveforms . . . . . . . . . . . . . . . . . . . . . . . .
63
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
64
6.3
6.4
7 Conclusion
7.1
65
Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
66
7.1.1
RFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
66
7.1.2
FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
66
Bibliography
67
ix
Tables
Table
5.1
Table of Mean Power Levels . . . . . . . . . . . . . . . . . . . . . . . . .
44
5.2
Table of Position Errors . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
5.3
Table of Clock Stability in ppm . . . . . . . . . . . . . . . . . . . . . . .
52
7.1
Table of Instrument Dimensions, Mass, and Power . . . . . . . . . . . .
65
x
Figures
Figure
1.1
GPS Signal Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
1.2
GPS L1 C/A Code Frequency Representation . . . . . . . . . . . . . . .
3
1.3
ASIC GPS Receiver Layout . . . . . . . . . . . . . . . . . . . . . . . . .
5
1.4
Software Receiver Layout . . . . . . . . . . . . . . . . . . . . . . . . . .
6
1.5
Code Tracking: Generation of Local PRN Codes . . . . . . . . . . . . .
7
1.6
Block Diagram of Code Tracking . . . . . . . . . . . . . . . . . . . . . .
7
1.7
Block Diagram of Carrier Tracking . . . . . . . . . . . . . . . . . . . . .
8
1.8
I vs. Q Plot of 1ms Post-Correlation Data . . . . . . . . . . . . . . . . .
8
2.1
GPS Bistatic Radar Concept . . . . . . . . . . . . . . . . . . . . . . . .
10
2.2
Histogram of Reflected SNR Over Water . . . . . . . . . . . . . . . . . .
11
2.3
Histogram of Reflected SNR Over Farmland . . . . . . . . . . . . . . . .
12
2.4
Histogram of Reflected SNR Over Forest . . . . . . . . . . . . . . . . . .
12
2.5
Post-processing Observation of Reflected Signal . . . . . . . . . . . . . .
14
2.6
Post-processed Reflected Waveform . . . . . . . . . . . . . . . . . . . . .
14
4.1
Block Diagram of Bistatic Receiver Components . . . . . . . . . . . . .
17
4.2
Clock Synchronization Between Front-ends
. . . . . . . . . . . . . . . .
18
4.3
SiGe Analog Front-end . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
4.4
Block Diagram of a Front-end Interface to FPGA and FX2 USB Bridge
19
xi
4.5
Data Flow Through FX2 Bridge . . . . . . . . . . . . . . . . . . . . . .
21
4.6
Front-end Interface to GPIF . . . . . . . . . . . . . . . . . . . . . . . . .
22
4.7
Host Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
4.8
PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
28
4.9
Schematic Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
29
4.10 Final Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30
5.1
Sections of Possible Data Loss . . . . . . . . . . . . . . . . . . . . . . . .
32
5.2
Dataset with 1 Sample Removed . . . . . . . . . . . . . . . . . . . . . .
34
5.3
Dataset with 4 Samples Removed . . . . . . . . . . . . . . . . . . . . . .
35
5.4
Dataset with 8 Samples Removed . . . . . . . . . . . . . . . . . . . . . .
36
5.5
PRN13 Real Data Set (No Samples Intentionally Removed) . . . . . . .
37
5.6
PRN13 Real Data Set (No Samples Intentionally Removed; Corrected for
Periodic Jumps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
38
5.7
Clean vs. Noisy IF Spectrum with Antenna Connected . . . . . . . . . .
39
5.8
Receiver Hardware Integrated into Ares I Aircraft (Antennas Not Mounted) 41
5.9
From Left to Right: Direct Antenna and Reflected Antenna . . . . . . .
42
5.10 From Left to Right: Direct Signal Spectrum and Reflected Signal Spectrum with SBC On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
42
5.11 Experimental Setup and Resulting Spectrum: Antenna Placed on SBC .
43
5.12 Effect of RFI as observed in figure 5.10 on C/No . . . . . . . . . . . . .
43
5.13 Received Power Test: PRN1 C/No for ChA and ChB with 1σ Error Bars
45
5.14 Received Power vs. C/No Test with GPS Signal Simulator with 3σ Error
Bars . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
46
5.15 Illustration of Two Isolation Tests . . . . . . . . . . . . . . . . . . . . .
47
5.16 1ms Correlation Waveforms: Channel A Connected, Channel B Floating
48
xii
5.17 SNR of Ch A (Connected) and Ch B (Floating) vs. Coherent Integration
Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48
5.18 SNR of Ch A (Connected) minus SNR of Ch B (Floating) vs. Coherent
Integration Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
5.19 SNR of Ch A (Floating) and Ch B (Connected) vs. Coherent Integration
Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
50
5.20 SNR of Ch B (Connected) minus SNR of Ch A (Floating) vs. Coherent
Integration Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
51
5.21 Position Errors for Both Channels . . . . . . . . . . . . . . . . . . . . .
53
5.22 Clock Drift in ppm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
6.1
Balloon Payload Configuration (Image credit EOSS) . . . . . . . . . . .
56
6.2
Balloon Payload Checkout . . . . . . . . . . . . . . . . . . . . . . . . . .
57
6.3
Balloon Launch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
6.4
Balloon Flight Path (Image credit EOSS) . . . . . . . . . . . . . . . . .
59
6.5
Balloon Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
6.6
PSD for Direct Channel During Flight . . . . . . . . . . . . . . . . . . .
60
6.7
PSD for Reflected Channel During Flight . . . . . . . . . . . . . . . . .
61
6.8
Balloon Altitude Profile . . . . . . . . . . . . . . . . . . . . . . . . . . .
62
6.9
Predicted Path Delay for PRN10 During 15.5km Data Collection Period
63
6.10 Reflected Waveforms for PRN10 During 15.5km Data Collection Period
64
Chapter 1
Introduction
1.1
GPS Overview
The Global Positioning System (GPS) is a satellite-based navigation system [17,
22]. It uses the concept of measuring time-of-arrival (TOA) of different transmitters
(the satellites) to compute a receiver position. For this method to work, the location of
all the transmitters need to be known, the receiver clock and transmitter clock need to
also be synchronized. From the TOA, the propagation time can be computed - this time
is then multiplied with the speed of light to get a range estimate to the transmitters.
At this point, assuming the locations of the transmitters are known, the receiver can
compute its position.
The system consists of a constellation of nominally 24 satellites (29 satellites in
2006) with an orbit radius of 26,560km, giving the satellites a period of approximately
12 hours. All satellites have highly synchronized onboard Rubidium or Cesium atomic
clocks as a frequency reference. The satellites broadcast Code Division Multiple Access
(CDMA) ranging codes and navigation data on two frequencies, L1 (1575.42MHz) and
L2 (1227.6MHz). All satellites broadcast on the same frequencies, but use different
ranging codes with low cross-correlation properties. Each satellite broadcasts navigation
data that allows the receiver to compute the satellite position and transmission time.
The ranging code is used to determine the propagation time of the signal. If the receiver
clock was synchronized with the transmitter clock, only three ranging measurements are
2
needed for a 3D position solution, but since the receiver clock usually drifts with respect
to the transmitter clock, four ranging measurements are needed to solve for longitude,
latitude, height and receiver clock offset.
For a more thorough introduction to GPS, please see [22, 17].
1.1.1
Signal Structure
The GPS satellites generate a carrier frequency at L1 and L2, these carrier fre-
quencies are then modulated with the ranging codes and navigation data using bi-phase
shift keying (BPSK). Each satellite generate two different ranging codes, the civilian
Coarse Acquisition code (C/A code) and the military P(Y) code. These are modulated
onto the carrier frequencies at 1.023MHz and 10.23MHz respectively. A 50Hz navigation
message is also modulated on the carriers, this navigation message contains information
about the satellite position and time of signal transmission. The aforementioned modulation method is illustrated in figure 1.1. Notice that the L1 signal carries both civilian
and military codes, while the L2 signal is only modulated with the military code. The
rest of this discussion will focus on the civilian L1 C/A code.
Since the L1 carrier is essentially modulated with a 1.023MHz PRN code, the
frequency domain representation of the L1 signal looks like a sinc 2 centered at the GPS
L1 frequency as illustrated in figure 1.2. More than 90% of the signal energy is in the
first lobe, which is 2.046MHz wide. At first glance, it might seem wasteful that GPS
occupies at least 2MHz of spectrum in order to transmit 50Hz navigation data, but the
1.023MHz PRN code allows for very desirable signal characteristics:
• Satellites can transmit on the same frequency
• Precise ranging
• Processing gain due to despreading of PRN code
• Rejection of reflected signals
3
Figure 1.1: GPS Signal Modulation
Figure 1.2: GPS L1 C/A Code Frequency Representation
4
• Anti-jamming properties
After modulation, the L1 signal is transmitted at approximately 25 Watts with
right hand circular polarization (RHCP). The received power level is approximately
-130dBm on the Earth’s surface with a 3dBi antenna. The signal is this weak due
to mostly free space loss. In fact, with a 2MHz bandwidth at room temperature, the
thermal noise floor P is:
P = kB ∗ T ∗ ∆f = (1.3807 ∗ 10−23 ) ∗ (294) ∗ (2 ∗ 106 ) = −111dBm
(1.1)
Where, kB is the Boltzmann constant, T is the antenna temperature in Kelvin, and ∆f
is the spectral bandwidth in Hz. This means the received GPS signal is approximately
19dB below the thermal noise floor. The signal can only be recovered by removing the
PRN code (despreading the signal). When despreading the signal, a processing gain is
achieved. This processing gain is defined as the ratio of the original signal bandwidth
to the despreaded signal bandwidth. After the PRN code is removed, only the 50Hz
navigation data remains, giving the signal a bandwidth of approximately 100Hz (first
lobe of the sync squared). This means the processing gain G is:
G = 10 ∗ log10
BWpre
BWpost
!
= 10 ∗ log10
2 ∗ 106 Hz
100Hz
!
= 43dB
(1.2)
With a processing gain of 43dB, a typical received GPS signal has a signal to noise ratio
(SNR) of 20-30dB.
1.2
1.2.1
GPS Receivers
Overview
Modern digital receivers typically consists of three parts, a radio frequency (RF)
front-end, a digital baseband processor, and a microcontroller. The RF front-end converts the signal from the carrier frequency to an intermediate frequency (IF) that is
much lower so that it can be sampled by an analog-to-digital converter (ADC). At this
5
point the digital baseband processor takes care of removing the residual carrier and the
PRN code (despreading the signal). This process is, however, tightly coupled with the
microcontroller. The microcontroller examines the output of the baseband processor
to determine whether the incoming signal is being tracked correctly. If the signal is
not being tracked correctly, the microcontroller adjusts the tracking parameters of the
baseband processor. This is further described in section 1.2.2.
1.2.1.1
ASIC Receiver
The vast majority of GPS receivers on the market today implement some type
of application-specific integrated circuit (ASIC) design like the one illustrated in figure
1.3. This design relies on the ASIC performing most of the high-speed signal processing.
Figure 1.3: ASIC GPS Receiver Layout
1.2.1.2
Software Receiver
A software receiver (also called data recorder in this text) tries to move a generic
processor as close to the antenna as possible. Figure 1.4 illustrates this concept - most of
the components of the ASIC receiver have been replaced and IF samples are now stored
to disk. With this method, baseband signal processing can be done in post-processing
with software like Matlab [9]. There are disadvantages to this method: IF samples
take up large amounts of disk space and baseband tracking in software is usually much
6
slower than using an ASIC. The key justification for a software receiver is the fact that
almost no spectral information is lost, and unfamiliar signals (like reflected signals) can
be more thoroughly investigated when IF samples are available.
Figure 1.4: Software Receiver Layout
1.2.2
Signal Tracking
Baseband signal processing involves two main steps for GPS: Carrier tracking and
code tracking. Tracking of the GPS carrier frequency is required because the carrier
is usually doppler shifted due to satellite motion, user motion, and user clock drift.
In order to despread the CDMA signal, a local PRN code need to be generated and
correlated with the incoming code, this correlation processes is also referred to as code
tracking.
1.2.3
Code Tracking
To despread (or track) a CDMA signal, three local copies of the PRN code is
generated 0.5 chips apart. These three codes are named early, prompt, and late. The
codes are correlated (multiplied and accumulated) with the incoming I and Q data
(after carrier doppler has been removed) as illustrated in figure 1.5. The result of this
correlation processes is referred to as 1ms correlation data for the rest of this text.
The bottom plot in figure 1.5 illustrates what is commonly known as the correlation
7
waveform: As the local in incoming PRN codes differ, the correlation value decreases.
This is the basic concept of signal tracking - keep the power in the early and late
correlators balanced, and one ensures that the local prompt and incoming codes are
aligned. The code tracking discriminator normally has some type of Early minus Late
(E-L) discriminator and a tracking loop tries to keep that number constant. This is
illustrated in figure 1.6.
Figure 1.5: Code Tracking: Generation of Local PRN Codes
Figure 1.6: Block Diagram of Code Tracking
8
1.2.4
Carrier Tracking
The GPS carrier is tracked by examining 1ms post-correlation I and Q values to
detect carrier phase. By using a frequency lock loop (FLL) or phase lock loop (PLL)
as the discriminator, delta-phase or delta-frequency can be detected and corrected,
see figure 1.7 . Figure 1.8 illustrates a I versus Q plot for 1ms correlation data, two
’clouds’ are visible due to the 50Hz BPSK navigation message. Any shift in I or Q
will be detected as a frequency/phase error and the frequency of the digitally controlled
oscillator (DCO) adjusted to compensate.
Figure 1.7: Block Diagram of Carrier Tracking
IQ Diagram
6000
4000
Q
2000
0
−2000
−4000
−6000
−6000
−4000
−2000
0
I
2000
4000
6000
Figure 1.8: I vs. Q Plot of 1ms Post-Correlation Data
Chapter 2
GPS as a Bistatic Radar
2.1
Background
Recently the use of GPS signals as opportunistic bistatic radar signals has become
increasingly popular in the radar and navigation communities for remotely sensing the
Earth’s surface [19, 14, 20, 21]. A GPS bistatic radar uses two reception antennas: one
tracking the direct signal from the satellite oriented skyward; the other observing the
surface-reflected signal oriented toward the earth (see figure 2.1).
In previous experiments [19, 16, 23] GPS signals were scattered from numerous
terrain types, including cropland, wetlands, forested hills, mountains, and man-made
structures. These terrain types scattered the GPS signals in different ways depending
on the degree of surface wetness, roughness, and attenuation by foliage. These scattered
signals were highly attenuated and susceptible to heavy fading - in fact, these signals can
sometimes be stronger than the direct signal but are, on average, significantly weaker.
10
Figure 2.1: GPS Bistatic Radar Concept
11
2.2
Reflected Signal Properties
When right-handed polarized GPS signals reflect off a surface, the polarity is
inverted and it becomes left-hand circular polarized (LHCP). In fact, any odd number
of reflections will always be LHCP, while even reflections will be RHCP. These reflections
are not always completely specular, figures 2.2, 2.3, and 2.4 show 1 how reflected signal
strength vary significantly depending on the terrain type [16].
Histogram of 100ms reflected SNR for IOWA PRN29 (water) mean=15.858157
80
70
Number of samples
60
50
40
30
20
10
0
0
5
10
SNR (dB)
15
20
Figure 2.2: Histogram of Reflected SNR Over Water
1
Data presented in this chapter was collected during previous flight tests with a NordNav [10] GPS
receiver
12
Histogram of 100ms reflected SNR for IOWA PRN29 (farm) mean=8.428838
500
450
Number of samples
400
350
300
250
200
150
100
50
0
0
5
10
SNR (dB)
15
20
Figure 2.3: Histogram of Reflected SNR Over Farmland
Histogram of 100ms reflected SNR for G5 PRN14 (forest) mean=2.996962
800
700
Number of samples
600
500
400
300
200
100
0
0
5
10
SNR (dB)
15
Figure 2.4: Histogram of Reflected SNR Over Forest
20
13
2.3
Detection of Reflected Signals
Due to the weak nature of the reflected signal (as seen in section 2.2), continuous
tracking is very difficult if not impossible. Signal processing is approached with this in
mind. Noting that the reflected signal will have a similar doppler shift as the direct
signal, and the reflected signal will always arrive later than the direct signal, carrier
doppler and code phase position from the direct signal can be used to assist processing
and observation of the reflected signal. Assisted with the direct signal’s doppler and
code phase information, correlators can now be placed at the proper code-delay bins to
ensure observation of the reflected waveform. In this fashion, the reflected waveform
can be observed in an open-loop fashion. This method is illustrated in figure 2.5. An
example reflected correlation waveform can be seen in figure 2.6. Note at zero delay
(w.r.t direct) some of the direct signal is leaking into the reflected measurement. It is
believed that this is due to crosstalk between the direct and reflected channels on an
early prototype NordNav receiver (This issue is investigated in section 5.5).
14
Figure 2.5: Post-processing Observation of Reflected Signal
100ms correlation waveform
5
1.8
x 10
1.6
Accumulation value
1.4
1.2
1
0.8
0.6
0.4
0.2
−1
0
1
2
Chips
3
Figure 2.6: Post-processed Reflected Waveform
4
5
Chapter 3
Motivation
3.0.1
Background
Commercial GPS receivers can be obtained in very small form factors. Unfor-
tunately commercial receivers can not be used for GPS bistatic radar remote sensing
because they normally have only one antenna input and implement insufficient signal
processing to track/observe the weak reflected signal. In the past [16, 23, 19], it was
found that the most convenient way to perform remote sensing with GPS was to utilize
a GPS data recorder (see section 1.2.1.2). The most important benefit of using a data
recorder is that nearly all information about the signal is retained. The received signal
is sampled at the IF and samples saved to a storage device. In this fashion, the reflected
signal can be post-processed. Since these receivers are usually custom built, the analog
front-end is constructed out of discrete analog components (filters, mixers, etc.) and
thus too large to integrate on smaller platforms.
Given the nature of the measurements, the preferred platform for GPS remote
sensing is aircraft. Experimental flights are, however, usually prohibitively expensive.
Recently the use of Unmanned Aerial Vehicles (UAVs) have become increasingly popular. Due to the inexpensive nature of UAV flights this is an ideal platform for GPS
remote sensing. The custom nature of previous remote sensing receivers cause these
devices to be quite large and require a laptop or desktop computer to operate. The
aforementioned setup is too large and is problematic to integrate on smaller platforms.
16
3.0.2
Goal
To design a GPS bistatic software receiver that has the ability to record IF samples
of two channels to disk. The receiver must be small, light-weight, and low power such
that it can be integrated on small platforms.
The design will be tested for correct operation by collecting data with a live
antenna, GPS signal simulator, and a final field test on a balloon.
Chapter 4
Hardware Design
The receiver designed for this thesis consists of three parts, the analog front-end
which converts an RF signal to an IF and provides digital samples. These samples are
then buffered by a USB data bridge for retrieval by a host computer and stored to
disk (see figure 4.1). All the components shown in figure 4.1 are commercially available
except for the interface board, which had to be custom designed to provide a backplane
for connecting all the components together.
Figure 4.1: Block Diagram of Bistatic Receiver Components
4.1
Analog Front-ends
The analog front-ends used were SiGe Semiconductor SE4410L v.1.1 evaluation
boards. The front-end converts the GPS signal at 1575.42MHz to an IF of 4.1304MHz
18
and then samples it at 16.3676MHz using 2-bits. Both front-ends have temperature
controlled crystal oscillators (TCXOs) built in, but one of the TCXOs is disabled such
that it can use the clock of the other front-end an external reference. This way it is
ensured that both front-ends sample the GPS signal on the same sampling clock. This
clock setup can be seen in figure 4.2.
Figure 4.2: Clock Synchronization Between Front-ends
A more detailed illustration of the front-end’s interface to the FPGA and USB
chip can be seen in figure 4.4. The control bus illustrated is shared between the two
front-ends. Jumpers are provided for oscillator (OSC EN) control and Automatic Gain
Control (AGC). Depending on how these jumpers are set, the onboard oscillator and
AGC functions can be turned on or off.
The data bits pass through both the FPGA and the FX2 USB chip. This way
the receiver has the ability to operate either with or without the FPGA installed.
19
Figure 4.3: SiGe Analog Front-end
Figure 4.4: Block Diagram of a Front-end Interface to FPGA and FX2 USB Bridge
20
4.2
FPGA
The front-end IF samples optionally passes through an Altera Cyclone EP1C12Q240
FPGA for further processing. The FPGA is currently not in use and IF samples are
bypassed (as seen in figure 4.1). Since a bi-directional bus exists between the FX2 USB
chip and the FPGA, the FPGA can conceivably be used in the future to implement
real-time signal processing algorithms. The receiver is fully functional when the FPGA
board is not present.
4.3
USB Data Bridge
The USB data bridge [6, 2] is used to move high-speed IF samples from the front-
end (or FPGA) to the host computer. This data bridge has been benchmarked and can
reliably move data at up to 39MB/s on a modern (1GHz+) computer. The Cypress
Semiconductor CY7C68013 FX2 USB chip takes 8 or 16-bit data at the rising edge of a
clock (CLK OUT) and stores this data in a FIFO to be packetized by the on-chip USB
handler. Since the smallest packet size is 8 bits, and each GPS front-end provides data
at 2 bits (default configuration), this means that only 4 of each 8 bits sent contain data
when in 2-bit mode. Thus, data is sent to the host computer at 16MB/s, where the
host computer more efficiently packs these bits and saves it to a file at 8MB/s.
4.3.1
Firmware
A portion of the firmware that runs on the FX2 chip has been written by GNU
Radio [6] developers. This firmware was heavily modified to accommodate for the data
transfer method between the front-ends and the FX2 chip. The firmware is compiled
on a host-computer with the sdcc [11] compiler and uploaded to the firmware via USB
using the fx2 programmer [4] tool.
Since the GNU Radio code interfaced to different hardware, crucial parts of the
21
code had to be rewritten. For a better understanding of the FX2 operation, see figure
4.5. The FX2 chip consists of four parts, the General Programmable Interface (GPIF),
buffers, an 8051 microcontroller, and a USB engine.
Figure 4.5: Data Flow Through FX2 Bridge
4.3.2
General Programmable Interface (GPIF)
The GPIF is a general purpose state machine and can be programmed to interface
to many different external peripherals. In the case of the digital stream from the analog
front-end chips, the interface is simple: On the rising edge of the front-end CLK OUT
signal, 4 data bits become available (2-bits per front-end). The GPIF was thus wired
such that the front-end CLK OUT connects to IF CLK and the four data bits connect
to the lower 8-bits as illustrated in figure 4.6. The PCB layout supports 4-bit mode, but
only 2-bit mode has been tested. Note how CLK OUT from both front-ends connect via
a header, this way the sampling clock can easily be switched between the two front-ends.
Once the GPIF is started by the host code, it continually puts data into the
buffers until either the host code is stopped or the buffer fills up. When the buffer is
full, the GPIF aborts and enters the idle state. This is detected by the host code and
an error message is printed. The GPIF usually only aborts if the host computer can
not empty the buffers quickly enough.
The GPIF is configured in AUTO IN mode, this means that the 8051 does not
22
participate in the data transfer in any way. Data is automatically put in the buffers
and then committed to the USB engine for packetization.
Figure 4.6: Front-end Interface to GPIF
4.3.3
Buffers
The firmware sets up the GPIF to connect to end point 6 (EP6). EP6 in the FX2
is configured as quad-buffered with each buffer being 512 bytes. The benefit of having
this quad-buffered setup as follows: While the GPIF is filling one of the buffers, the
other three are available to the USB Engine of packetization. This way buffers can be
filled and emptied in parallel, allowing for a smooth transfer of data between the GPIF
and the host computer.
4.3.4
8051 Microcontroller
The 8051 microcontroller is responsible for initializing the FX2 chip and moni-
toring GPIF status, it does not participate in the high-speed data transfer. During a
high-speed data transfer, the host-code periodically polls the GPIF status register to
ensure that the GPIF is not idle (which would indicate a buffer overrun). These USB
requests are handled by the 8051.
23
4.3.5
USB Engine
The task of the USB engine is simple: As soon as a 512-byte buffer is filled,
prepare the contents of the buffer for a USB transfer and then wait for the host software
to request data. USB has a strict master/slave protocol and the slave (the FX2 chip)
can not send data to the host unless the host requests data first.
4.3.6
Host-side Software
The C++ host-side software is written to compile on a Linux system. It uses basic
function calls to libusb [8], a library that allows access to USB devices. The software also
implements its own bulk transfer functions (because the libusb bulk transfer functions
are too slow). Bulk transfer mode was selected because the general USB community
indicates this to give the highest USB throughput [13]. The data flow on the host
computer can be seen in figure 4.7.
The host code generates USB Request Blocks (URBs), which is the way user-space
transfers USB data to and from kernel-space. The life cycle of a URB is as follows: the
user program allocates memory for an empty URB and fills in information like number
of bytes requested and the USB device data is requested from. Many of these URBs
are then queued up in user-space and copied to the kernel memory space as soon as
the kernel driver is ready to accept a URB. Once in kernel-space, the URB is sent to
the USB controller and then on to the FX2 chip. The FX2 fills in payload data of the
USB packet and sends back payload data to the linux kernel driver. The kernel driver
signals that this URB is completed and copies the payload data to the user-space buffer.
As soon as this URB is finished, the driver is ready to accept another URB. It is thus
vital to queue up as many URBs as are feasible to maximize throughput. Due to the
user-side URB queue, the kernel driver never has to wait for a new URB to be filled out
by user-space, it is already queued up.
24
Figure 4.7: Host Software
25
4.4
Single Board Computer
The single board computer (SBC) runs the host-side USB code. The host com-
puter features a low-power VIA Luke CoreFusion Processor in the Nano-ITX form factor
(12cm x 12cm). This is an x86 compatible processor that runs at 1.0GHz and supports
most modern peripherals, including Serial-ATA (SATA) and USB 2.0. The SBC has 4
USB connectors and boots a small version of Gentoo [5] Linux from a 128MB USB disk.
The SBC runs off a normal ATX power supply. The PicoPSU were used as a direct
current (DC) to DC converter for the 12V battery.
4.5
Storage
With a sampling frequency of approximately 16MHz and with 4-bits of data (in
2-bit mode) for two channels, the data rate is about 8MB/s. Due to possible vibrations
of small platforms (like UAVs), a mechanical drive might not suffice for storage of IF
samples. Two other solutions were investigated, a 2.5” solid state disk (SSD) laptop
drive, and USB memory sticks.
4.5.1
2.5” Laptop SATA SSD
It is advantageous to use a 2.5” SSD because it has the same form factor and data
interface (SATA) as other mechanical laptop hard drives. Thus, cheaper mechanical
hard drives can be used when the platform does not have much vibration.
The SSD used was a memtech SA2580, 8GB solid state disk. The disk benchmarked at about 32MB/s sustained read/write.
4.5.2
USB Memory Disk
This is a more cost effective solution because USB memory disks are popular
mainstream devices. These pose a difficulty to use as a storage device because the USB
26
bus must be shared between the receiver and the USB disk. Two 4GB USB disks were
combined using software RAID0 to form a 8GB partition. GPS samples were streamed
to this 8GB partition at 11.2MB/s.
4.6
Interface Board
All the aforementioned modules must be connected together. This is where the
interface board comes in. It is a custom designed 4-layer printed circuit board (PCB).
The two analog front-ends plug into the back-side of the board, the digital components
(FX2 USB and FPGA) plug into the front-side of the board. The two inner planes
are power and ground planes and thus provide some shielding between the analog and
digital circuitry. The interface board design can be seen in figures 4.8 and 4.9. The final
product can be seen in figure 4.10.
4.6.1
Headers and Jumpers
Some of the more important interface board features are pointed out below, for
any more information, refer to the schematic (figure 4.9).
4.6.1.1
Power
The interface board is powered from the +5VOut pin on the USB board, which
is in turn powered via the USB cable from the host computer. The SiGe front-ends
draw power from this line. If the FPGA is connected, JP11 can be jumpered in order to
power the FPGA from the +3.3V provided by the FX2 chip. If the FPGA uses excessive
current, it can be powered externally by opening JP11 and applying 5V to JP10, which
will be regulated to +3.3V for the FPGA.
27
4.6.1.2
JP1
When the FPGA is not in use, the SiGe data bus can be directly connected to
the FX2 bus by jumpering the pins on JP1.
4.6.1.3
JP2-JP5
JP2 and JP4 control the oscillator on front-end A and B respectively. When in
the 1-2 position, the onboard oscillator is enabled. When in position 2-3, it is disabled.
JP3 and JP5 control the AGC on front-end A and B respectively. When in the
1-2 position, the AGC is enabled. When in position 2-3, it is disabled.
4.6.1.4
JP6
This jumper selects which clock source to connect to IF CLK. When in position 12, front-end A’s CLK OUT will be used, when in position 3-4, front-end B’s CLK OUT
will be used.
4.6.1.5
JP7
RS232 header for FPGA. See schematic for more details.
4.6.1.6
JP8,JP9
These jumpers break out 22 unused I/O pins on the FPGA.
4.6.1.7
JP10
+5V input if powering FPGA externally.
4.6.1.8
JP11
Connect FX2 3.3V to regulated 3.3V. Jumper this if powering the FPGA from
the FX2 board’s 3.3V out pin.
28
Figure 4.8: PCB Layout
29
Figure 4.9: Schematic Layout
30
Figure 4.10: Final Product
Chapter 5
Verification
This chapter is dedicated to verification of the instrument. The Nordnav [10] GPS
post-processing software was used for the majority of the data processing. First, lowlevel verification tests are done, including power consumption and continuous streaming
capability. After this, IF spectra (for interference) are tested, as well as high-level performance, including the position solution and clock stability. The tests below represent
a combination of real GPS sampled data and data collected with a GPS signal simulator. The latter was used because simulated satellite doppler and power levels can be
accurately controlled.
5.1
Power and Mass
When streaming GPS samples to a USB disk at 8MB/s, the entire system uses
about 18W, with the SBC making up the largest portion of this, nearly 17.7W. The
GPS recorder (without the FPGA) usually runs at about 300mW with two active antennas connected. Both laptop solid state and mechanical hard drives run at 2.5W for
continuous writes, while USB disks consume about 750mW. The 60Wh Lithium Ion
battery used with the receiver can run this system for 3+ hours, much longer than the
data recording capabilities.
The entire system (as shown in figure 4.10) weighs 1.7kg.
32
5.2
Streaming
This section addresses the reliability of data flow from the antenna to disk. This
is an important test because GPS signals can not be tracked properly if samples are
dropped. Locations where data loss can possibly occur have been lettered A through
D as illustrated in figure 5.1. Since the RF input path to the front-end can not be
controlled (other than ensuring adequate signal levels), it is assumed that no data loss
occurs at path A. The path from the SBC to disk (marked D) can not be controlled
either and is assumed to be perfect. This leaves path B and C to be investigated for
possible data loss.
Figure 5.1: Sections of Possible Data Loss
Before continuing, it is worth nothing that section B can sustain a rate of 96MB/s,
while the highest sustained data rate at section C measured was 39MB/s. During this
test, CPU usage was at 10% for a 3.0GHz CPU. The 1.0GHz SBC benchmarked at
35MB/s. It appears that the bottleneck in the streaming operation is the implementation of the host-side USB controller. One must recall that USB is a serial protocol, and
thus has overhead for addressing the correct device and checksums. Thus, even though
USB 2.0 is rated at 60MB/s, the payload bandwidth is less than that [12].
33
5.2.1
512 Samples Skipped
The FX2 USB chip packetizes data in 512 byte blocks, meaning that if a USB
packet is lost, 512 samples will be skipped. To test whether 512-byte USB packets are
being dropped, samples were collected with a GPS signal simulator. Using Matlab, a
512-byte block of samples in the middle of the data set was removed. This modified
data set was then run through post-processing software. A 512 sample drop is easy to
detect: Lock of all GPS signals is immediately lost halfway into the data set. Since such
behavior (loss of all GPS satellites) is not observed during normal operations, one can
conclude that data path C is reliable.
5.2.2
1,4, and 8 Samples Skipped
To determine whether samples dropped in small quantities are detectable, samples
were intentionally removed from a recorded data set. The same sampled data set was
used, and at the same location 1, 4, and 8 samples were removed respectively. These
three modified data sets were then processed with post-processing software and certain
signal properties extracted.
To understand what the removal of a single IF sample means, consider this: The
IF carrier is at approximately 4MHz, and this signal is sampled at 16MHz. This means
there is about 4 samples per carrier period, thus the removal of one sample will change
the received phase by approximately 90 o . Results of sample removal can be seen in
figures 5.2, 5.3, and 5.4. The most obvious way to detect dropped samples would be
to keep a running sum of the number of carrier cycles, if the derivative of the carrier
cycles (doppler) is smooth, this means that no samples are lost. The first plot in all
figures illustrate exactly this: note the discontinuity at 1.2 seconds in these plots. This
is the exact spot where samples were removed. As is evident in all plots, the carrier
to noise ratio (C/No) drops by a detectable amount when samples are removed. When
34
examining figure 5.4 it might appear at first that samples are being dropped at 3.5
seconds also (the discontinuity of the differenced carrier phase). It has been confirmed
by Nordnav that their post-processing software has a fault in it, this fault will be fixed
for future releases of the software. Lastly, the lock time in all plots indicate when
cycle slips occur. The receiver is robust enough to recover from a 1 sample (90 o ) phase
change, but note how the lock time is reset in figures 5.3 and 5.4 due to the 360 o and
720o phase changes. From these plots, one can conclude that within this 9 second data
Differenced carrier phase with 1 sample skipped
−60
−70
−80
0
1
2
3
4
5
6
7
8
9
6
7
8
9
6
7
8
9
Time (s)
Carrier to Noise ratio
43.5
43
42.5
0
1
2
3
4
5
Time (s)
Lock time (no cycle slips)
10
Lock time (s)
CNo (dB−Hz)
Differenced carrier phase (Hz)
set, no samples (other than the intentional ones) are being dropped.
5
0
0
1
2
3
4
5
Time (s)
Figure 5.2: Dataset with 1 Sample Removed
Differenced carrier phase with 4 samples skipped
0
−50
−100
0
1
2
3
4
5
6
7
8
9
6
7
8
9
6
7
8
9
CNo (dB−Hz)
Time (s)
Carrier to Noise ratio
44
42
40
0
1
2
3
4
5
Time (s)
Lock time (no cycle slips)
10
Lock time (s)
Differenced carrier phase (Hz)
35
5
0
0
1
2
3
4
5
Time (s)
Figure 5.3: Dataset with 4 Samples Removed
Differenced carrier phase with 8 samples skipped
0
−50
−100
0
1
2
3
4
5
6
7
8
9
6
7
8
9
6
7
8
9
Time (s)
Carrier to Noise ratio
CNo (dB−Hz)
45
40
35
0
1
2
3
4
5
Time (s)
Lock time (no cycle slips)
5
Lock time (s)
Differenced carrier phase (Hz)
36
0
0
1
2
3
4
5
Time (s)
Figure 5.4: Dataset with 8 Samples Removed
37
5.2.3
Sample Skip Test with Real Data
The GPS sample recorder was connected to a L1 antenna and data collected for
23 minutes. Results can be seen in figure 5.5. It might appear that the carrier phase
is discontinuous, but note how the C/No is not correlated with these ’discontinuities’
as it was when samples were intentionally removed. These same periodic spikes occur
when using a commercial sampling receiver and the same post-processing software. As
previously stated, these spikes are due to a fault in the post-processing software, and is
not an indication of faulty hardware. These spikes are easily detectable because of their
periodicity. In figure 5.6 these periodic skips were removed and a smooth differenced
PRN13 real data: Differenced carrier phase
4000
2000
0
0
500
1000
1500
1000
1500
1000
1500
Time (s)
Carrier to Noise ratio
CNo (dB−Hz)
Differenced carrier phase (Hz)
carrier phase is observed.
55
50
45
0
500
Time (s)
Lock time (no cycle slips)
Lock time (s)
4000
2000
0
0
500
Time (s)
Figure 5.5: PRN13 Real Data Set (No Samples Intentionally Removed)
38
PRN13 real data: Differenced carrier phase (periodic discontinuities removed)
1200
1100
Differenced carrier phase (Hz)
1000
900
800
700
600
500
400
300
0
500
1000
1500
Time (s)
Figure 5.6: PRN13 Real Data Set (No Samples Intentionally Removed; Corrected for
Periodic Jumps)
39
5.3
Radio Frequency Interference (RFI)
The ideal vs non-ideal IF spectrum can be seen in figure 5.7. The plot on the left
shows a clean spectrum and was collected with the receive antenna on a rooftop and a
high-quality cable run into a lab. C/A code spectral lines are visible above the noise
floor: This is due to the fact that the transmitted power of each visible satellite adds
up and thus pushes the total received power at the antenna above the thermal noise
floor. The antenna was moved into the lab (right next to the receiver) in the rightmost
plot. Any RF emissions the receiver and computers within the lab generate are greatly
amplified via the GPS front-end and pollutes the spectrum.
Power Spectral Density Estimate via Welch
−45
−50
−50
−55
−55
Power/frequency (dB/Hz)
Power/frequency (dB/Hz)
Power Spectral Density Estimate via Welch
−45
−60
−65
−60
−65
−70
−70
−75
−75
−80
0
1
2
3
4
5
Frequency (MHz)
6
7
8
−80
0
1
2
3
4
5
Frequency (MHz)
6
7
Figure 5.7: Clean vs. Noisy IF Spectrum with Antenna Connected
5.3.1
RFI Mitigation
As is apparent from the previous section, when the antenna is close by to any
electromagnetic noise source, it can easily pollute the IF spectrum. To investigate this
further, the electronics were integrated into a remote controlled aircraft (figure 5.8) built
at the University of Colorado [15] and then moved outside (see figure 5.9), away from
any potential noise sources. The spectra of direct and reflected channels can be seen in
figure 5.10. It appears that some RFI is present and about 5dB above the noise floor
8
40
right around 3.7MHz, close to the IF of the receiver. As previously mentioned, this is
most likely due to the onboard computer. The aforementioned claim was verified by
placing the direct antenna on top of the onboard computer. The setup and resulting
spectrum can be seen in figure 5.11. Note the 3.7MHz RFI is now greatly amplified:
the RFI seen in figure 5.10 is indeed from the SBC. The effect of this RFI on C/No
can be seen in figure 5.12: PRN14 and PRN30 C/No decreased by approximately 2dB,
while PRN25’s C/No increased by 1dB. Since the satellites were obviously not stationary
during the period of data collections, it is not entirely obvious what causes the 2dB drop
and 1dB increase in C/No. However, one can conclude that RFI from the computer
does not disable GPS, but could possibly have a detrimental effect on performance.
41
Figure 5.8: Receiver Hardware Integrated into Ares I Aircraft (Antennas Not Mounted)
42
Figure 5.9: From Left to Right: Direct Antenna and Reflected Antenna
Power Spectral Density Estimate via Welch
−35
−40
−40
−45
−45
Power/frequency (dB/Hz)
Power/frequency (dB/Hz)
Power Spectral Density Estimate via Welch
−35
−50
−55
−60
−50
−55
−60
−65
−65
−70
−70
−75
0
1
2
3
4
Frequency (MHz)
5
6
7
8
−75
0
1
2
3
4
Frequency (MHz)
5
6
7
Figure 5.10: From Left to Right: Direct Signal Spectrum and Reflected Signal Spectrum
with SBC On
8
43
Power Spectral Density Estimate via Welch
−35
−40
Power/frequency (dB/Hz)
−45
−50
−55
−60
−65
−70
−75
0
1
2
3
4
Frequency (MHz)
5
6
7
Figure 5.11: Experimental Setup and Resulting Spectrum: Antenna Placed on SBC
CNo for 3 different satellites with/without RFI present
PRN14 RFI
PRN14 no RFI
PRN25 RFI
PRN25 no RFI
PRN30 RFI
PRN30 no RFI
42.5
42
41.5
CNo (dB−Hz)
41
40.5
40
39.5
39
38.5
38
0
5
10
Time (s)
15
20
Figure 5.12: Effect of RFI as observed in figure 5.10 on C/No
8
44
5.3.1.1
RFI Test Conclusion
In conclusion to these RFI tests: All detectable noise were generated by the
computer. Care must be taken when placing antennas close to the SBC, ideally the
computer should be well shielded. The combination of the aircraft’s carbon fibre body
and moving the antenna away from the SBC did provide a significant amount of isolation
from RFI generated by the SBC. Section 6.3.1 presents data from an experimental flight
where strong RFI was present, this RFI did not, however, appear to significantly impact
the receiver performance.
5.4
Power Calibration
5.4.1
Power Balance
In order to ensure reliable power measurements, it is crucial that received power in
both analog channels are balanced. When this is ensured, relative power measurements
between the two channels can be reliably performed. Figure 5.13 indicates a simple
experiment performed: The GPS simulator was set to a known and constant power
level and the resulting signal split with a RF splitter and fed into the GPS recorder.
Post-processing software was then used to extract the resulting C/No on both channels.
In order to remove any biases due to the RF splitter, the splitter cables were swapped
and the experiment repeated. As is evident from the figure, both channels are balanced
very well, see table 5.1 for values.
Experiment
Splitter
Swap Splitter
ChA C/N o
dB-Hz
43.47
43.45
ChB C/N o
dB-Hz
43.79
43.62
ChA-ChB
dB-Hz
-0.32
-0.17
3σ ChA
dB-Hz
0.37
0.34
Table 5.1: Table of Mean Power Levels
3σ ChB
dB-Hz
0.37
0.33
45
Carrier to Noise ratio (1 second averages plotted with 1 sigma error bars )
CHA
CHB
CHA Swap
CHB Swap
44
43.9
43.8
CNo (db−Hz)
43.7
43.6
43.5
43.4
43.3
43.2
0
1
2
3
4
Time (s)
5
6
7
Figure 5.13: Received Power Test: PRN1 C/No for ChA and ChB with 1σ Error Bars
46
5.4.2
Received Power to C/No Calibration
The plot in figure 5.14 indicates how C/No varies as received signal power is varied
with the GPS signal simulator. The C/No linearly decreases (as expected) as received
signal power is decreased. The C/No estimates became unreliable at lower power levels.
Computed CNo with 3−sigma error bars as simulator output power is varied
55
50
CNo (dB−Hz)
45
40
35
30
25
Channel A
Channel B
−135
−130
−125
−120
Simulator output power (dBm)
−115
−110
Figure 5.14: Received Power vs. C/No Test with GPS Signal Simulator with 3σ Error
Bars
5.5
Isolation Test
When detecting weak reflected signals that have a delay close to the direct signal,
care must be taken that leakage of the direct signal into the reflected channel is not
47
mistaken for the reflected signal. To ensure this does not happen, an estimate of isolation
between the two channels must be obtained. Exactly this was done with two tests
illustrated in figure 5.15: First, channel A had a RHCP antenna connected, while
channel B was left floating. Secondly, the reverse was executed: channel B was connected
to a RHCP antenna, while channel A left floating. In each case, the unconnected channel
should have no signal power, but reality prevails and any metallic objects, including the
floating SMA connector and PCB traces will act like antennas. This means that some
amount of GPS signal energy will be coupled into the unconnected channel, or, if the
channel is used to detect weak GPS signals, leakage of direct power will be seen in the
reflected channel.
Figure 5.15: Illustration of Two Isolation Tests
When observing 1ms correlation waveforms (processed as per section 2.3) from
the constructed receiver (see figure 5.16) in one of the aforementioned configurations,
leakage is not observed, but when these waveforms are coherently integrated for longer
periods of time, leakage is observed. Figures 5.17, 5.18, 5.19, and 5.20 indicate isolation
results for the receiver tested in the aforementioned two configurations. Figure 5.17
indicates how SNR increases versus coherent integration time. It is apparent that after
about 100ms coherent integration, the reflected channel starts showing some power.
The difference of channel A and channel B can be seen in figure 5.18. This gives an
indication of isolation: both satellites seem to settle around 36dB-37dB. This is also
true for the reverse case (channel A floating, channel B connected) as seen in figures
5.19 and 5.20.
48
Ch A and Ch B waveforms
4000
3500
Accumulation value
3000
2500
2000
1500
1000
500
0
−500
−2
−1.5
−1
−0.5
0
Chips
0.5
1
1.5
2
Figure 5.16: 1ms Correlation Waveforms: Channel A Connected, Channel B Floating
Ch A and Ch B SNR vs. coherent integration time
PRN9 − Ch A
PRN9 − Ch B
PRN15 − Ch A
PRN15 − Ch B
55
50
45
SNR (dB)
40
35
30
25
20
15
10
5
0
10
Coherent integration time (ms)
Figure 5.17: SNR of Ch A (Connected) and Ch B (Floating) vs. Coherent Integration
Time
49
Ch A − Ch B SNR vs. coherent integration time
40
38
36
Delta SNR (dB)
34
32
30
28
26
24
22
20
0
10
PRN9
PRN14
1
10
2
3
10
10
Coherent integration time (ms)
4
10
Figure 5.18: SNR of Ch A (Connected) minus SNR of Ch B (Floating) vs. Coherent
Integration Time
50
Ch A and Ch B SNR vs. coherent integration time
PRN9 − Ch B
PRN9 − Ch A
PRN15 − Ch B
PRN15 − Ch A
60
50
SNR (dB)
40
30
20
10
0
10
Coherent integration time (ms)
Figure 5.19: SNR of Ch A (Floating) and Ch B (Connected) vs. Coherent Integration
Time
51
Ch B − Ch A SNR vs. coherent integration time
40
38
36
Delta SNR (dB)
34
32
30
28
26
24
22
PRN9
PRN14
20
0
10
1
10
2
3
10
10
Coherent integration time (ms)
4
10
Figure 5.20: SNR of Ch B (Connected) minus SNR of Ch A (Floating) vs. Coherent
Integration Time
52
5.6
5.6.1
High Level Verification
Position Solution
At the highest level, receiver performance can be verified by examining the posi-
tion solution. Results can be seen in figure 5.21. Both channels perform similarly with
acceptable errors as seen in table 5.2.
Direction
Easting
Northing
Height
ChA
3-sigma (m)
3.97
3.53
7.07
ChB
3-sigma (m)
3.94
3.52
6.99
Table 5.2: Table of Position Errors
5.6.2
Clock
A by-product of the position solution is clock drift. Since all GPS satellites have
a very stable frequency reference, user clock drift can be measured very accurately. The
plot in figure 5.22 shows the clock error with respect to the GPS L1 carrier over 30
minutes. The mean of -4.42ppm translates to a doppler offset of -6961kHz with respect
to the L1 carrier and corresponds to measurements done on the clock with a frequency
counter and rubidium clock as reference. There exists thus a static error in the user
clock of -4.42 parts per million (ppm) and 3-sigma clock drift of 0.1 ppm (summarized in
table 5.3). Note that both channel A and channel B have nearly identical clock errors.
This is expected since a common clock was used for both channels.
Measurement
Mean
3-sigma
ChA
ppm
4.42
0.10
ChB
ppm
4.42
0.10
Table 5.3: Table of Clock Stability in ppm
53
Position error in meters (50Hz, 30 minutes), 3−sigma is 3.73m
6
Ch A
Ch B
3−sigma
4
Delta Northing (m)
2
0
−2
−4
−6
−6
−4
−2
0
Delta Easting (m)
2
4
6
Height error in meters, 3−sigma is 7.0m
6
Ch A
Ch B
4
Delta height (m)
2
0
−2
−4
−6
0
5
10
15
20
25
Time (s)
30
35
40
Figure 5.21: Position Errors for Both Channels
45
54
−6
User clock drift
x 10
Ch A
Ch B
−4.3
ppm
−4.35
−4.4
−4.45
−4.5
0
200
400
600
800
1000
1200
Time (s)
Figure 5.22: Clock Drift in ppm
1400
1600
1800
2000
Chapter 6
Experimental Data
The final test of this receiver is to integrate it on a small platform and test it in
the field. Exactly this was done with a small balloon flight provided by Edge of Space
Sciences (EOSS) [3].
6.1
Background
Student payloads were connected to a cord that was attached to the balloon
as shown in figure 6.1. The balloon would ascend to an altitude of approximately
28km MSL where it would burst and free-fall until there is enough atmosphere so that
the parachute can be reliably deployed. This balloon was tracked via a beacon that
transmits GPS position down to the tracking station. The bistatic instrument was
mounted approximately 3m above the beacon on the cord.
56
Payload Plan
EOSS-103
22/23 April 06 – 0730
Rev A
3000 gm latex
Item
Weight, lb
Student Payloads (est’d)
15 ft 500# cord
EOSS Payloads
4.4
Parachute and cutter
Cutter A (0.1#)
19.5
2.1
Neck load
26.0
Gross
32.6
Balloon
6.6
10 ft parachute (2.0#)
APRS Cutter-DF/ EOSS103
KØANI-11
445.975 MHz 1.7#
15 ft 500# cord
11 CU Gateway BalloonSats
Spaced @ 36” on 400# black dacron w/ half-hitch on
bight separators. Est’d total wt: 19.5 lb.
15 ft 250# cord
APRS KCØYA-11 / EOSS-103
EOSS / BALND2
Slotted at 0:15 & 0:45; TLM @ 1 min intervals
Power up exactly at mm:20 UTC to slot TLM.
144.340 MHz 0.35W 2.7 #
Payload_Plan_103-104a.doc
Figure 6.1: Balloon Payload Configuration (Image credit EOSS)
57
6.2
6.2.1
Integration and Checkout
Pre-Launch
The instrument was broken up into two pieces
(1) Analog box: Antennas, Front-ends, and USB bridge
(2) Digital box: Computer, Storage, and Power
The two boxes can be seen in the photo of the final integration in figure 6.2. It was
necessary to separate the instrument in these two boxes to minimize interference from
the computer and also due to individual payload weight restrictions. A USB cable was
run between these two boxes so that data could be transfered from the analog box to
the digital box. This two-box setup can be seen in figure 6.3, a photo of the instrument
a few seconds after launch.
Figure 6.2: Balloon Payload Checkout
58
Figure 6.3: Balloon Launch
59
6.2.2
Post-Launch
The balloon flight took approximately 3 hours from launch to landing. The flight
path can be seen in figure 6.4. The balloon traveled a total of 97 km from the launch
site. The balloon was tracked via real-time position updates from the GPS beacon
installed on the balloon. Recovery was successful (figure 6.5) and no equipment was
damaged.
Figure 6.4: Balloon Flight Path (Image credit EOSS)
Figure 6.5: Balloon Recovery
60
6.3
Results
6.3.1
RFI
Before any baseband signal processing were done, the spectrum of IF samples
collected during the balloon flight were analyzed for any RFI, see figures 6.6 and 6.7.
On the direct channel The C/A spectral lines are visible, but some interference is present
around 5.3MHz. Also, the reflected channel seems to have more significant RFI, the
5.3MHz RFI seems even stronger. Since this RFI is stronger on the reflected channel,
it leaves the author to believe RFI is being generated by the GPS beacon, mounted
3m below the reflected antenna. Even though RFI was present, signal tracking did not
appear to be significantly affected (as discussed in the next section).
PSD estimate of direct channel
−35
−40
−45
Power/frequency (dB/Hz)
−50
−55
−60
−65
−70
−75
0
1
2
3
4
Frequency (MHz)
5
6
Figure 6.6: PSD for Direct Channel During Flight
7
8
61
PSD estimate of reflected channel
−35
−40
−45
Power/frequency (dB/Hz)
−50
−55
−60
−65
−70
−75
0
1
2
3
4
Frequency (MHz)
5
6
Figure 6.7: PSD for Reflected Channel During Flight
7
8
62
6.3.2
Altitude Profile
Telemetry obtained from the beacon on the balloon was used to generate an
altitude profile (as seen in figure 6.8). Due to limited solid state storage (2x4GB USB
disks), only 16 minutes of GPS samples could be recorded. The data collection was
broken up in four 4-minute sections as indicted in red on the altitude profile.
Balloon altitude profile
25
Burst
Altitude MSL (km)
20
15
Data Analyzed
10
Parachute
Deployed
5
07:30
No data collection
Data collection occured
08:00
08:30
09:00
Time in hh:mm
09:30
10:00
Figure 6.8: Balloon Altitude Profile
Reflected data presented in this section were collected from around 15.5 km MSL
as circled in figure 6.8.
6.3.3
Path Delay
As described in section 2.3, the reflected signal arrives later than the direct signal.
Correlators are then placed at this expected delay. The path delay can be computed by
63
assuming the elevation angle, θ, of the receiver antenna w.r.t. the satellite in question
is the same as the elevation angle of the specular reflection w.r.t the satellite. With this
assumption, the delay estimate in meters is [18]:
τ = 2h sin (θ)
(6.1)
Where h is the receiver altitude above the reflection surface in meters and θ is the
elevation angle of the satellite. For the data segment analyzed, the predicted path delay
can be seen in figure 6.9. A approximation was made in order to compute h: It was
assumed the reflection surface was smooth and at a constant height.
PRN 10 predicted path delay in chips
70
69
Pathdelay (chips)
68
67
66
65
64
0
20
40
60
80
100
Time (s)
120
140
160
180
200
Figure 6.9: Predicted Path Delay for PRN10 During 15.5km Data Collection Period
6.3.4
Correlation Waveforms
Reflected signal results for the first 19 seconds of this data set can be seen in
figure 6.10. These are 1 second noncoherent averaged waveforms. Note the path delay
64
is around 65.5 chips, close to the predicted 65 chips for this interval. The estimate error
is most likely due to the flat surface assumption made in the path delay prediction.
19 waveforms − 1s noncoherent average
5
4.5
4
3.5
SNR (dB)
3
2.5
2
1.5
1
0.5
0
50
55
60
65
70
75
Delay (chips)
Figure 6.10: Reflected Waveforms for PRN10 During 15.5km Data Collection Period
6.4
Summary
The instrument was integrated onto a small platform (balloon) and samples saved
to solid state USB disks. These samples were post-processed and reflected signals were
detected at an altitude of 15.5 km MSL. Strong RFI was present, but it did not appear
to noticeably affect the operation of the receiver.
Chapter 7
Conclusion
A GPS bistatic sampling receiver was designed and constructed. Correct operation of the instrument was verified as per the goal stated in section 3.0.2. Experimental
data obtained from a small platform (balloon) was processed and reflected waveforms
observed.
This receiver features two analog front-ends and a high-speed data bridge to reliably move these samples to a Linux-based computer for storage to disk. The entire setup
weighs approximately 1.7kg (depending on configuration) and uses 18W, a significant
improvement over previous receivers used for bistatic research [16, 23]. Both direct and
reflected analog channels of the receiver was tested for correct operation, tests include
sample skip studies, RFI studies (not integrated and integrated into a small platform),
power calibration, isolation tests, position solution, and clock drift.
A summary of the instrument can be seen in the table below:
Component
Analog
Digital
Battery
Direct Antenna
Reflected Antenna
Total
Dimension
WxHxL
12.5cm x 5.5cm x 11.0cm
17.8cm x 7.8cm x 12.8cm
15.6cm x 2.1cm x 8.0cm
9cm x 2.5cm x 9cm
9cm x 2.5cm x 9cm
Mass
Power
285g
785g
457g
120g
120g
1767g
250mW
17700mW
0mW
25mW
25mW
18W
Table 7.1: Table of Instrument Dimensions, Mass, and Power
66
Where analog is the box with the front-ends and USB data-bridge, while digital
is the box with the computer and solid state storage.
In all tests the receiver performed as expected, some RFI was observed when it
was integrated into the small platform (section 5.3.1). It was determined noise from the
host computer was leaking in at the antenna. The effects of this RFI were investigated
and it did not significantly affect the receiver operation.
7.1
7.1.1
Future Work
RFI
For small platforms, the receive antennas are usually mounted close to the host
computer. It was determined that the host computer is electromagnetically very noisy
and if not properly shielded will leak into the receive antennas. Future work include
determining better shielding methods.
7.1.2
FPGA
With the FPGA in place, real-time baseband processing can be implemented in
the FPGA and the host computer used as the final step to provide a small real-time
bistatic GPS receiver.
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