2A717 - Beyond DREAMS D R E

2A717 - Beyond DREAMS
European Nanoelectronics Forum
Noordwijk, November 17-18, 2009
How to deal with
Design Refinement of Embedded Analog Mixed-signal Systems ?
Electronics in a car today
~30 electrical/electronic systems,
50-100 microprocessors,
>100 sensors
in modern middle class cars
Source: IMEC-NL
Source: IMEC-NL
Provide the missing links !
Contribute to standardization !
Specification
RF
Functional
Digital System
SoC or SiP
D
A(MS)‫‏‬
Architectural
SystemC-AMS
Interface
Sub-system
SystemC
Implementation
Extend the existing standards already in
use for digital, re-use of IP block and subsystems for EAMS !
Beyond
DREAMS
consortium
Sub-circuit
Verilog-A(MS),
VHDL-AMS
VHDL,
Verilog, ...
Firefighter Body Sensor Network, Source: TI-WMC
The Beyond DREAMS partners works on these 3 axes:
Refinement Methodology
Specification
Functional
Description
Design Framework based
on IP-XACT Extensions
SystemC AMS Extensions
Models of Computation
MoC
Deployment
Timed Data Flow
TDF
Control & Installation
WP4&5
Architectural Explorations
Mapping on known
structures from libraries
Structure Technology
Mapping on elementary
blocks
TDF
Design entry and AMS IP
integration
Simulatable
specifications
Generator studio
Specific application use cases
WP4
Linear Signal Flow
LSF
Electrical Linear
Network
ELN
Use cases
Platform Assembly
Creation of multisite data structure
Keys of success:
Today
Vertical approach
Unique methodology
IP Description
Data capture, object blocs creation
WP1&4
Industry-needs oriented
WP1
ELN
Fast deployment
Domain Expert Parameters
Acquiring Technical know-how
SystemC AMS Application Specific
Libraries
User friendly interface
Simulatable Specifications
SystemC AMS
SystemC
A/D Converter
MIPS 32 bits
MIPS
32 bits
+
nd order
2
modulator
OSR=64Application
Binary File
10
bits
decimator
8.53 MHz
2.4 MHz
RF Transceiver
QPSK
fc=2.4GHz
2.4 GHz
Specification in
XML
System
architecture
Beyond DREAMS WEB Site https://wiki.eas.iis.fraunhofer.de/beyonddreams
STM
Magillem
NXP
Bosch
D-Sync
UPMC-LIP6
Infineon IFX
TU Delft
CEA-LETI
Fraunhofer G.-IIS/EAS
TI-WMC
INP-TIMA
IMEC-NL
TUV
Simulation
results
European Nanoelectronics Forum
Noordwijk, November 17-18, 2009
2A717 - Beyond DREAMS
SystemC AMS extensions
Model of Computation
Digital
time
interface
Digital time domain
Level of abstraction
SystemC
TLM with time
Specialized
channel
TLM-TDF interaction concepts
Analog
Analog time domain
SystemC AMS
TDF
Specialized
port
SystemC AMS
TDF
SystemC AMS
ELN/LSF
Synthesizable
description
Discrete
Event
basic_status write( const long& adr , const long& data)
{
fc_high.write(bool(data));
return basic_protocol::SUCCESS;
}
basic_status read( const long& adr , const long& data)
{
data = long(1024.0 * a2d.read());
return basic_protocol::SUCCESS;
}
typedef tlm_transport_if … if_type;
sc_export<if_type> slave_port;
sca_tdf::ams2tlm<double> a2d;
sca_tdf::tlm2ams<bool>
fc_high;
30x faster
95% accurate
SystemC
BCA
SCA_TDF_MODULE(prefi_ad) : public virtual
basic_slave_base< long , long >
{
sca_tdf::sca_in <double> in; // signal input port
Continuous Time
Conservative
Netlist
void set_attributes()
{
a2d.set_delay(1.0,SC_US);
fc_high.set_delay(2.0,SC_US);
}
void processing() {
double tmp; // high or low cut-off freq.
if(fc_high.read()) tmp = ltf_1(b, a1, s, in.read());
else
tmp = ltf_0(b, a0, s, in.read());
a2d.write(tmp);
}
SCA_CTOR(prefi_ad)
{
slave_port(*this);
}
};
TLM<->TDF synchronization variable
Simulatable Specification
Design framework & IP re-use : IP-XACT extensions
Models Libraries &
IP-Reuse
Generators
IP Package (AMS)
Synthesizable description
Simulatable description
Documentation
Parameterization
Configuration
Environment
Normalized
description
External
references
-Ports
-Interfaces
-Views
-Parameters
-Constraints
-Generators invocation
-...
.xml
Constraints
•
•
•
•
•
Automated connections
Verification
Configuration
Launching external tools
3rd party tools integration
IPs
Vendor Extensions
(under specification in
WP1) allows to describe
the AMS nature and
interface of a component
•
•
•
•
•
Bus def.
Abstr. def.
Designs
• Using inputs from WP1 (D1.2-Specifications of the AMS
extension for IP-XACT)
• Implementation of the XML schema (prototype with
vendor extensions)
Source:Magillem
Wireless Sensor Network application first results
+
Source:UPMC-LIP6
STM
Magillem
NXP
Bosch
D-Sync
UPMC-LIP6
Infineon IFX
TU Delft
CEA-LETI
Fraunhofer G.-IIS/EAS
TI-WMC
INP-TIMA
IMEC-NL
TUV
SystemC AMS
VHDL AMS
Verilog AMS
Reports
Formats…