ECE 5410 Physical Integrated Circuit Design Sample Midterm 2 Nov 16, 2010 Name:

ECE 5410 Physical Integrated Circuit Design
Sample Midterm 2
Nov 16, 2010
Name:
Closed Book, Closed Notes, Closed Computer.
Show your steps clearly to get credit.
State clearly any assumptions made.
This exam has 10 questions, for a total of 100 points.
ECE510 students have an extra problem and their score will be scaled by a
100
.
factor of 111
Unless otherwise indicated use the following Spectre parameters for hand calculations
with VDD = 5 V and a scale factor of 300 nm.
Note that by our definition the threshold voltage for the PMOS device is positive (so
from the data below VDD = 0.9 V using our labeling and equations).
.MODEL NMOS NMOS LEVEL
+ TOX
= 125E−10
+ PHI
= 0.7
+ UO
= 650
+ KP
= 100E−6
+ RSH
= 0
+ XJ
= 500E−9
+ CGDO
= 200E−12
+ CJ
= 400E−6
+ CJSW
= 300E−12
= 3
NSUB
VTO
ETA
VMAX
NFS
LD
CGSO
PB
MJSW
=
=
=
=
=
=
=
=
=
1E17
0.8
3 . 0 E−6
1E5
1E12
100E−9
200E−12
1
0.5
GAMMA
DELTA
THETA
KAPPA
TPG
=
=
=
=
=
CGBO
MJ
= 1E−10
= 0.5
.MODEL PMOS PMOS LEVEL
+ TOX
= 125E−10
+ PHI
= 0.7
+ UO
= 250
+ KP
= 50E−6
+ RSH
= 0
+ XJ
= 500E−9
+ CGDO
= 200E−12
+ CJ
= 400E−6
+ CJSW
= 300E−12
= 3
NSUB
VTO
ETA
VMAX
NFS
LD
CGSO
PB
MJSW
=
=
=
=
=
=
=
=
=
1E17
−0.9
0
5E4
1E12
100E−9
200E−12
1
0.5
GAMMA
DELTA
THETA
KAPPA
TPG
=
=
=
=
=
CGBO
MJ
= 1E−10
= 0.5
0.5
3.0
0.1
0.3
1
0.6
0.1
0.1
1
−1
0
1. (a) (5 points) Estimate, based on the SPICE models seen on the previous page, Cox ,
0
0
Rn , and Rp .
(b) (5 points) Fill the following table using above process data
Device
NMOS
PMOS
Drawn
10/2
20/2
Actual size
3 µm by 0.6 µm
4.5 µm by 0.6 µm
Page 2
Rn,p
Coxn,p
fF
fF
2. (10 points) Using the values you determined in problem 1, estimate the oscillation frequency of a 31-stage ring oscillator made using 10/2 NMOS and 20/2 PMOS devices.
Page 3
3. (20 points) Using 300n CMOS process data from problem 1, design a buffer to drive 20
pF load with least delay. Also assume the approximated switching model of MOSFETs
with Cin = Cout = Cox . Sketch the buffer schematic and label the sizes. Clearly show
the logical effort steps.
Page 4
4. (10 points) Sketch, for a MOSFET with VDS = VDD , the log(ID ) against VGS . Indicate on your plot weak, moderate, and strong inversion. Also, indicate the MOSFET’s
threshold voltage and the subthreshold slope. What is the ideal subthreshold slope?
Why?
Page 5
5. (10 points) Find the voltages at each of the nodes, A, B, C, D, E and F below. Use the
circuit parameters for the 300nm model given on the first page.
VDD
VDD
VDD
VDD
F
A
B
C
D
VDD
Page 6
E
6. (10 points) Show how to determine, using the square-law equations, the switching point
of a CMOS inverter. On an inverter’s voltage transfer curves show how changing the
βn /βp ratio shifts the curves up and down.
Page 7
7. (10 points) Draw the schematic of a charge pump to generate approximately 3(VDD −
VT HN ) output voltage.
Page 8
8. (10 points) Explain with sketches, the body-effect and DIBL effect in a PMOS.
Page 9
9. (10 points) For the NMOS inverter with resistive load seen below, estimate the inverter’s
Vsp , VOH , and VOL using the square-law equations and 300 nm process data seen on the
first page. Plot the voltage transfer curve and indicate the noise margins (N MH and
N ML ) on the curve.
VDD
10k
out
in
10/2
Page 10
10. (11 points) Only for ECE510 students: Draw an implementation of a charge pump
to nearly 3VDD − VT HN output voltage, using an architecture to cancel the VT HN drop
in the charge transfer devices.
Page 11