Conference & Exhibition Preview DESIGN • PRINTED BOARDS • ELECTRONICS ASSEMBLY • TEST
Conference & Exhibition Preview DESIGN • PRINTED BOARDS • ELECTRONICS ASSEMBLY • TEST www.IPCAPEXEXPO.org “I NEED IT NOW” DRIVES THE ELECTRONICS INDUSTRY. UPGRADES IN TECHNOLOGY + KNOWLEDGE DRIVE “NOW.” IPC APEX EXPO® — is the only event that brings it all together to help you drive results. TECHNICAL CONFERENCE • EXHIBITION • PROFESSIONAL DEVELOPMENT • STANDARDS DEVELOPMENT • CERTIFICATION What drives what happens now? A critical combination of the latest technology and knowledge, which is what you’ll find at IPC APEX EXPO 2015. Attend and be part of the year’s best opportunity to gain knowledge and experience applied technology with real-world applications. It will be where you upgrade your tech-NOW-ledgy. GET UPGRADED AT IPC APEX EXPO 2015 THROUGH: • The latest technical research • Industry best practices • Access to the solutions and subject matter experts you need to solve challenges in a fraction of the time it takes on the job • The largest electronics industry collection of top suppliers, live demos and extreme innovation • Connections in educational sessions, on the show floor and during networking events INVITATION FROM IPC CHAIRMAN IPC APEX EXPO 2015… where we’re bringing it all together to help you drive results. No matter where you are in the global electronics supply chain, you’ve probably heard the phrase, ‘I need it now.’ In this fast-moving, ever-evolving industry, we hear it a lot. What drives what happens now? A critical combination of the latest technology and knowledge, which is what you’ll find at IPC APEX EXPO. Learn the latest in technical research and industry best practices. Get access to the solutions and subject-matter experts you need to solve challenges in a fraction of the time it takes back on the job. View the largest electronics industry collection of top suppliers, live demos and examples of innovation. Make connections in educational sessions, on the show floor and networking events. No other event provides the diversity of programs, education and networking that IPC APEX EXPO delivers. Sincerely, Marc Peo IPC Board Chairman Heller Industries, Inc. www.IPCAPEXEXPO.org THIS EVENT IS … PRODUCED BY: IPC — Association Connecting Electronics Industries® SUPPORTED BY: • • • • • • • AIM — Association for Automatic Identification and Mobility ASM International China Printed Circuit Association (CPCA) Conductor Analysis Technologies, Inc. European Institute of Printed Circuits (EIPC) Hong Kong Printed Circuit Association (HKPCA) International Electronics Manufacturing Initiative (iNEMI) • Indian Printed Circuit Association (IPCA) • IPC-2581 Consortium • JEDEC Solid State Technology Association • Japan Electronics Packaging and Circuits Association (JPCA) • Korea Printed Circuit Association (KPCA) • Microelectronics Packaging and Test Engineering Council (MEPTEC) • Taiwan Printed Circuit Association (TPCA) • Wiring Harness Manufacturer’s Association (WHMA) WITH SUPPORT FROM: • • • • • • • • • Adhesives & Sealants Industry Magazine ASSEMBLY Circuits Assembly Control Engineering Asia EDACafé.com Electronics Protection Electronics Sourcing N.A. EMChina EMSNow • EPP Europe • FLEX007 • Global SMT & Packaging • Medical Product Outsourcing • Mexico EMS • PCB007 • PCBDESIGN007 • Power Electronics World • • • • • • • • Printed Circuit Design & Fab Printed Circuit Journal Silicon Semiconductor SMT Magazine SMT Today SMTnet.com U.S. Tech Wiring Harness News TABLE OF CONTENTS 2 Schedule of Events 3 Exhibitors 5 On the Show Floor 6 Keynote Sessions 7 Networking Opportunities 8 Management Programs 9 Programs with a Design Focus 10 BUZZ Sessions 12 Technical Conference 18 Professional Development Courses 26 Standards Development Meetings 40 Registration Options 41 Hotel & Travel ALL ACTIVITIES TAKE PLACE AT SAN DIEGO CONVENTION CENTER 111 W. Harbor Drive San Diego, CA 92101, USA 1 SCHEDULE OF EVENTS Schedule subject to change www.IPCAPEXEXPO.org SATURDAY, FEBRUARY 21—————————————————————————— 8:00 am–5:00 pm Standards Development Committee Meetings SUNDAY, FEBRUARY 22 ————————————————————————————— 8:00 am–6:00 pm 9:00 am–12:00 pm 2:00 pm–5:00 pm Standards Development Committee Meetings Professional Development Courses Professional Development Courses MONDAY, FEBRUARY 23 ————————————————————————————— 7:30 am–9:00 pm 7:30 am–9:00 pm 7:30 am–1:30 pm 8:00 am–5:00 pm 9:00 am–12:00 pm 12:00 pm–1:30 pm 2:00 pm–5:00 pm 5:30 pm–6:30 pm PCB Executive Management Meeting & VIP Dinner EMS Management Council Meeting & VIP Dinner Design Forum Standards Development Committee Meetings Professional Development Courses Event Awards Luncheon Professional Development Courses Global Welcome Reception — By Invitation TUESDAY, FEBRUARY 24———————————————————————————— 7:30 am–8:30 am 8:30 am–9:30 am 9:45 am–10:00 am 10:00 am–5:00 pm 10:00 am–6:00 pm 12:00 pm–1:30 pm 1:30 pm–5:00 pm 1:30 pm–5:00 pm 5:00 pm–6:00 pm IPC First-Timers’ Welcome Meeting Opening Keynote Session Ribbon Cutting Ceremony Standards Development Committee Meetings EXHIBITS OPEN Event Luncheon & IPC Annual Meeting Technical Conference Sessions BUZZ Sessions Show Floor Reception 7:30 am–8:30 am 8:00 am–5:00 pm 9:00 am–10:00 am 10:00 am–10:30 am 10:30 am–12:00 pm 10:30 am–12:00 pm 10:00 am–6:00 pm 12:00 pm–1:30 pm 1:30 pm–4:30 pm 1:30 pm–4:30 pm 4:30 pm–5:00 pm 6:00 pm 6:30 pm Women in Electronics Networking Meeting Standards Development Committee Meetings Keynote Session Poster Presentations by Authors Technical Conference Sessions BUZZ Sessions EXHIBITS OPEN Event Awards Luncheon Technical Conference Sessions BUZZ Sessions Poster Presentations by Authors Exhibitor Networking Functions Dieter Bergman Tribute — By Invitation WEDNESDAY, FEBRUARY 25————————————————————————— THURSDAY, FEBRUARY 26—————————————————————————— 8:00 am–10:00 am 9:00 am–10:00 am 9:00 am–12:00 pm 9:00 am–12:00 pm 10:00 am–2:00 pm Standards Development Committee Meetings BUZZ Sessions Technical Conference Sessions Professional Development Courses EXHIBITS OPEN Certification programs in Design and EMS program management will take place throughout the week; see pages 8 and 9, respectively, for dates and times. All above listed events in blue are complimentary with Advance Registration. Visit www.IPCAPEXEXPO.org for the most current schedule. POLICIES Any function that is not part of the “official program” is prohibited, from the first meeting to the close of the event. IPC does not permit solicitation by nonexhibiting companies. Any individual who is observed participating in activities to solicit or sell products to event attendees or exhibitors without having a booth at the event will be asked to leave immediately. 2 www.IPCAPEXEXPO.org EXHIBITORS EXHIBITS OPEN Tuesday, February 24.................................................10:00 am–6:00 pm Wednesday, February 25..........................................10:00 am–6:00 pm Thursday, February 26...............................................10:00 am–2:00 pm See and compare equipment and technology from more than 440 of the industry’s top suppliers. Discover new processes to gain greater efficiency. Find new suppliers to save you both time and money and uncover new solutions that will improve your bottom line. Every year, attendees tell us that they’ve learned something important or found a critical new supplier, often with a big impact on their companies. That can be your story, too. Exhibits Only Registration is complimentary for those who register in advance online at www.IPCAPEXEXPO.org. Register today! 3M Electronics Materials Solutions Division 5N Plus Inc. ABBA Roller AccuAssembly Acculogic, Inc. Accurate Carriers, Inc. ACCU-TECH Laser Processing Inc. ACD ACE Production Technologies ACL Staticide Inc. Aculon, Inc. Advanced Assembly Advanced Mechatronics Solutions Advanced West Aegis Software Agfa Materials Corporation AI Technologies, Ltd. AIM Solder AIM, Inc. Air and Water Systems AIRTECH International, Inc. AIR-VAC Engineering Akrometrix, LLC All Flex Flexible Circuits & Heaters all4-PCB (North America) Inc. Allfavor Circuits (Shenzhen) Co., Ltd. Alpha ALT Dynachem Altium US American Hakko Products, Inc. Amerivacs.com Amerway Inc. Amistar Automation, Inc. Amtech Solder AnyLogic North America, LLC. Apex FA/Mirae Corporation Apollo Seiko Aqueous Technologies Arc-Tronics, Inc. Arlon Technology Enabling Innovation Armor USA ASC International, Inc. Ascentec Engineering Ascentech LLC ASG Div of Jergens ASI Magazine ASI Magazine (BNP Media Inc.) Asia Neo Tech Industrial Co., Ltd. ASM Assembly Systems Assembleon America Inc. Assembly Aster Technologies Asys Group Americas Inc. AT&S Americas atg-Luther Maelzer GmbH Atotech USA Inc. Austin American Technology Aven Inc. Blackfox Training Institute, LLC Bloomy Controls, Inc. BOFA Americas, Inc. Borrego Solar Systems, Inc. Brady Corporation BTU International Burkle North America, Inc. C.A. Picard CALTEX Scientific Camtek USA Inc. Carl Zeiss Microscopy, LLC Cedal Equipment Cencorp Americas LLC CeTaQ Americas Charlie Barnhart & Associates CheckSum, LLC CHEMCUT Corporation Cincinnati Sub-Zero Circuit Foil Circuits Assembly Cirris Systems Cobar Solder Products Inc. Cogiscan Inc. Computrol Inc. Conductive Containers, Inc. Conecsus Control Micro Systems, Inc. Count On Tools, Inc. Creative Electron, Inc. Crystal Mark, Inc. CSD & Automation CTI Systems Custer Consulting Group CyberOptics Corporation Data I/O Corporation Datapaq, Inc. DDM Novastar, Inc. De Nora Tech, Inc. Diamond MT, Inc. Digitaltest, Inc. DIS Inc. DIVSYS International LLC DMI Dow Electronic Materials DuPont Electronics E.V. Roberts Eastman Kodak Company Easy Braid Co. ECD EDACafe ELANTAS PDG, Inc. Elec & Eltek Electra Polymers Ltd. Electrolube (HK Wentworth America, Inc.) Electronic Assembly Products, Ltd. Electronics Sourcing North America (ESNA) Eltek USA Inc. ERSA North America ESSEMTEC USA eSurface Europlacer 3 EXHIBITORS (CONTINUED) Exatron JTAG Technologies Excellon Automation Juki Automation Systems, Express Electronics Limited Inc. FABCON-OLEC Keysight Technologies Fancort Industries, Inc. KIC FASTechnologies, Corp. Kingboard Laminates FCT Assembly Koh Young Technology Inc. Finetech Koki Solder America Inc. Fischer Technology, Inc. Kuper Technologies Fisnar Inc. Kyowa Americas FKN Systek Kyzen Corporation FlexLink Systems Inc. LaserJob Inc. FM ESD Flooring Lewis & Clark, Inc. Fralock Lista Freedom Scientific Industrial LPKF Laser & Electronics Inspection LPMS USA Fuji America Corporation M.G. Chemicals Ltd. Fujian Nanping Sanjin M+B Plating Racks Electronics Co., Ltd MacDermid Inc. Glenbrook Technologies Machine Vision Products, Inc. Global SMT & Packaging Malcomtech International Goal Searchers Co., Ltd. MANEX ERP Zhuhai Manncorp, Inc. GOEPEL Electronics Matrix Electronics Ltd. Gold Sky PCB Technology MatriX-FocalSpot Inc. Co., Ltd. Maxpcb LLC GPD Global MBTECH GSC Medical Product Outsourcing Heller Industries (MPO) Magazine Henkel Electronic Materials, Mek Europe BV LLC Mentor Graphics Corporation HEPCO, Inc. Mesago Messe Frankfurt Hirox-USA Inc. GmbH Hisco MET Associates Humiseal, Chase Electronic Metcal Coatings Mexico EMS HX Circuit Technology MicroCare Corporation I Source Technical Services, Micron Laser Technology Inc. Microscan i3 Electronics Inc. MicroScreen, LLC IAC Industries Microtek Laboratories IBE SMT Equipment Mid America Taping and IBL Technologies Reeling, Inc. ICAPE Group Miller-Stephenson Chemical IEC Electronics Corp Co., Inc. Illinois Tool Works MIRTEC Corp. Indium Corporation mta automation inc. INGUN USA, Inc. Mycronic Inc. Inovaxe Corporation National Graphic Supply Insulectro Newport Corporation Insulfab Plastics Inc. Nihon Superior Co., Ltd. Integrated Process Systems Nikon Metrology Intercept Technology Inc. Nitto Kohki U.S.A., Inc. Interconnect Systems Nix of America InterLatin Inc. Nordson ASYMTEK IPC Nordson DAGE Isola Nordson YESTECH ITC Intercircuit North Star Imaging, Inc. Ito America Corporation Novagard Solutions Japan Unix nScrypt Inc. JBC Tools USA Inc. Nutek Americas Inc. JMW Enterprises O.C. White Co. JNJ Industries Oak Mitsui Inc. JOT Automation OEM Press Systems, LLC 4 www.IPCAPEXEXPO.org Ohmega Technologies Inc. OMG Electronic Chemicals, LLC Omni Training Omron Inspection Systems On Site Gas Systems Inc. Orbotech, Inc. P. Kay Metal, Inc. PACE Incorporated PacTech USA Panasonic Factory Solutions Company of America Para Tech Coating, Inc. Park Electrochemical Corp. Parker FNS Parmi Co. Ltd. PCB Planet (India) Ltd. PDR America Pemtron Technology Pentagon EMS Petroferm Phibro-Tech, Inc. Pillarhouse USA Inc. Plasma Etch, Inc. Pluritec North America, Ltd. Polar Instruments, Inc. Polyonics PPG Industries, Semco Packaging & Application Systems Precision PCB Services, Inc. Printed Circuit Journal Printed Circuits Design & Fab Printed Circuits Inc. Production Solutions, Inc. productronica/MMI ProEx Device Programming and Tape & Reel Services PROMATION, Inc. Prototron Circuits PVA Q1 Test Inc. QA Technology Company, Inc. Qioptiq Qualitek International, Inc. Quik-Tool, LLC QxQ, Inc. Rampf Group RBP Chemical Technology, Inc. Rogers Corporation RPS Automation Saki America, Inc. Samsung C&T Automation, Inc. Sanmina Corporation ScanCAD International, Inc. Schleuniger, Inc. Schmid Systems Inc. Scienscope International SEHO North America, Inc. Seica Inc. Seika Machinery, Inc. Semblant Inc. Senju Comtek NEW PRODUCTS CORRIDOR View cutting-edge products and services in the New Products Corridor located in the main lobby across from registration. Get a sneak preview of the equipment, materials and services that are breaking new ground in our industry. SHOW FLOOR RECEPTION Tuesday, February 24 • 5:00 pm–6:00 pm You’re invited to the industry’s largest networking event, the IPC APEX EXPO show floor reception. This is your opportunity to network with industry colleagues, make new connections and interact with more than 440 exhibitors in a businesscasual environment. IPC APEX EXPO HAND SOLDERING COMPETITION ∙ February 24–25 IPC HAND SOLDERING WORLD CHAMPIONSHIP ∙ February 26 Who’s the best-of-the-best? Watch the world’s best hand soldering technicians vie for the title of IPC Hand Soldering World Champion. If you think you have what it takes to win at hand soldering … BRING IT! Visit www.IPCAPEXEXPO.org for details. Shandong Jinbao Electronics Sunshine Global PCB Group Co., Ltd. Super Dry Shanghai Shihua Engineering Taconic Co., Ltd. Tagarno Shanghai Well-Sun Precision Taiwan Union Technology Tool Co., Ltd. Corporation Shengyi Technology Co., Ltd./ Taiyo America Inc. Paramount Taiyo Industrial Co. Ltd. Shenmao America, Inc. Tamura Kaken Corp., USA Shenzhen Wendefeng Tapco Circuit Supply Shin-Etsu Silicones of America TDI International Simplimatic Automation TDK - Lambda Americas Smart Sonic Stencil Cleaning TE Connectivity Systems Technic Inc. SMT North America, Inc. Technica USA SMT Today Technical Devices Company SMTXTRA Ltd. Tecoo Electronics Co., Ltd. Sonoscan, Inc. Teradyne, Inc. Sono-Tek Corporation Test Research USA, Inc. Sophic Circuit (Huizhou) Texmac/Takaya Inc. Co., Ltd. Ticer Technologies SPEA America Tintronics Industries Specialty Coating Systems TMP, A Division of French Speedprint Technology TOPLINE Spindle Dynamics LLC Total Parts Plus (TPP) St.Petersburg’s Center Transition Automation Inc. “ELMA,Ltd.” Tronex Technology, Inc. Stellar Technical Products Ucamco USA StenTech UL LLC STI Electronics, Inc. United Resin Corporation Stoelting Universal Instruments Corporation USA MicroCraft, Inc. Uyemura International Corporation Ventec USA Vi Technology, Inc. Via Mechanics (USA) Inc. Viscom Inc. Vision Engineering Inc. Vitrox Technologies VJ Electronix Inc. V-TEK, Inc. Weller/Apex Tool Group WISE srl Wuxi Unicomp Technology Co. Ltd. www.EMCHINA.ORG XACTPCB Ltd. XJTAG X-Line Assets X-Treme Series Auto Dry Cabinet Yamaha Motor IM America Inc. YINCAE Advanced Matreials, LLC YJ Link America, Inc. YSC Technologies Yxlon Zestron Zhuhai Kingroad Electronic Co., Ltd. Exhibitor list as of: November 7, 2014 5 KEYNOTE SESSIONS OPENING KEYNOTE: THE XBOX STORY: Lessons in Strategy, Team Management and Entrepreneurship ROBBIE BACH, former President of Entertainment & Devices at Microsoft, Xbox visionary and civic activist Tuesday, February 24 • 8:30 am–9:30 am Chances are you or your kids own an Xbox. Or at least have played games on one. But do you know the story behind this groundbreaking game console? The Xbox saga – from garage-shop inception, through numerous crises and challenges, to ultimate business success – is a multi-faceted tale with several fascinating story lines. Robbie Bach, who will speak from his experience as the Chief Xbox Officer, will join us at IPC APEX EXPO 2015 to take us behind the scenes. He will share the triumph of a strategic process that brought together a disparate group of talented individuals. Bach will explain how this collection of individuals transformed into a powerful team that applied entrepreneurship principles to build a successful consumer business within the larger Microsoft structure. Bach joined Microsoft in 1988 and worked in various marketing and management roles for 22 years. Beginning in 1999, he led the development of the Xbox business, including the launch of the original Xbox and the highly successful follow-up product, Xbox 360. GREAT NETWORKING OPPORTUNITIES COMPLIMENTARY GLOBAL WELCOME — By Invitation Monday, February 23 5:30 pm–6:30 pm Our international friends are invited to relax, have a bite to eat and meet their colleagues from around the world at this festive gathering. COMPLIMENTARY FIRST-TIMER’S WELCOME BREAKFAST Tuesday, February 24 7:30 am–8:30 am Maximize your time at IPC APEX EXPO with some advice from a few insiders while you enjoy a continental breakfast with your colleagues. COMPLIMENTARY WOMEN IN ELECTRONICS NETWORKING MEETING Wednesday, February 25 Breakfast 7:30 am Meeting 7:45 am–8:30 am Join your colleagues from across the supply chain to share your ideas and experiences as a woman and build your industry network. Please RSVP for this free meeting through the online registration process. IPC EVENT LUNCHEONS (registration required) IPC Event Awards Luncheons Monday, February 23 12:00 pm–1:30 pm Wednesday, February 25 12:00 pm–1:30 pm Event Luncheon and IPC Annual Meeting Tuesday, February 24 12:00 pm–1:30 pm KEYNOTE: Flying Saucers and Science/Science was Wrong STANTON FRIEDMAN, nuclear physicist, lecturer, UFO Researcher Wednesday, February 25 • 9:00 am–10:00 am Do you take UFOs seriously? Nuclear physicist and lecturer Stanton T. Friedman does. Friedman will challenge IPC APEX EXPO 2015 attendees as he draws on more than 40 years of research on UFOs, and his work on a wide variety of classified advanced nuclear and space systems. He will answer a number of physics questions in layman’s terms, and establish that travel to nearby stars is within reach without violating the laws of physics. Journey with Friedman to locations in the universe where aliens reside, learn why they’ve come to Earth and motives to cover-up their visits. You’ll never feel the same about the universe again. 6 www.IPCAPEXEXPO.org Friedman was a nuclear physicist for 14 years for companies such as GE, GM, Westinghouse, TRW Systems, Aerojet General Nucleonics and McDonnell Douglas, working in such highly advanced, classified, eventually canceled programs as nuclear aircraft, fission and fusion rockets and various compact nuclear powerplants for space and terrestrial applications. Since 1967 he has presented at more than 600 colleges and 100 organizations in 50 U.S. states, 10 Canadian provinces and 18 other countries in addition to various nuclear consulting efforts. He has published more than 90 UFO papers and has appeared on hundreds of radio and TV programs including on Larry King in 2007 and twice in 2008, and many documentaries. 7 MANAGEMENT PROGRAMS TECHNICAL EDUCATION WITH A DESIGN FOCUS PCB SUPPLY CHAIN LEADERSHIP MEETING — EXECUTIVE LEVEL Monday, February 23 7:30 am – 8:00 am • Networking Breakfast 8:00 am – 12:00 pm • Joint Session with EMS Management Council Meeting Participants 12:00 pm – 1:30 pm • Luncheon 1:30 pm – 5:00 pm • PCB Supply Chain Leadership Meeting Breakout Session 6:00 pm – 9:00 pm • Networking Reception and Dinner As a learning and networking forum for senior-level executives of PCB fabricators and their suppliers, this meeting focuses on topics related to successful decision-making, such as leveraging market trends, resolving cultural issues and actively listening to your customer base. Hear from noted subject matter experts and find out how your peers are addressing common challenges. EMS MANAGEMENT COUNCIL MEETING — EXECUTIVE LEVEL Monday, February 23 7:30 am – 8:00 am • Networking Breakfast 8:00 am – 12:00 pm • Joint Session with PCB Supply Chain Leadership Meeting Participants 12:00 pm – 1:30 pm • Luncheon 1:30 pm – 5:00 pm • EMS Management Council Meeting Breakout Session A commitment to professional development makes a big difference to your career and to your customers, suppliers and colleagues. Design-focused education and networking activities will benefit engineering staff and managers in design, sales, purchasing and quality teams. Register for the Design Forum or get the most education from your investment by registering for the All-Access Package, which includes: • Full technical conference • Up to five professional development courses • Design Forum 6:00 pm – 9:00 pm • Networking Reception and Dinner DESIGN FORUM With a unique high-level focus, this meeting will keep you up on current trends and strategies so you can make the best choices for your company’s future. Network with peers and learn how other EMS executives are resolving problems that you are also facing. Must be a representative of an EMS company to attend. Monday, February 23 • 7:30 am–1:30 pm Consisting of a networking breakfast and three design-focused sessions, the Design Forum is a must-attend program for engineering staff and managers in design, sales, purchasing and quality teams. Take advantage of this opportunity to broaden your knowledge. Must be a senior level executive to attend. For the most current information, visit www.IPCAPEXEXPO.org. DESIGN FORUM AGENDA IPC EMS PROGRAM MANAGEMENT TRAINING AND CERTIFICATION — MANAGEMENT LEVEL 8:00 am Keynote followed by technical presentations from subject-matter experts Exclusively from IPC, this comprehensive training program is a three-part course that tailors topics, such as operations, finance, contract management, and leadership skills, for the EMS industry. Begin your training for the respected CEPM credential. Essentials of EMS Program Management Monday, February 23 • 8:00 am–5:00 pm Tuesday, February 24 • 8:00 am–5:00 pm Wednesday, February 25 • 8:00 am–5:00 pm EMS Leadership Training Thursday, February 26 • 8:00 am–5:00 pm EMS Program Management Certification Exam Friday, February 27 • 8:00 am–12:00 pm Information is subject to change. Please visit www.IPCAPEXEXPO.org for the latest details. Visit www.IPCAPEXEXPO.org to learn more about the program or to download a registration form. 8 www.IPCAPEXEXPO.org 7:30 am Networking Breakfast 12:00 pm Lunch 2:00 pm Professional Development Courses (separate registration required) IPC DESIGNER CERTIFICATION (CID AND CID+) The IPC Designer Certifications (CID and CID+) are the industry’s premier professional development programs focused on PCB design philosophy and requirements. If your passion is the transformation of electrical schematics and descriptions into works of art that can be manufactured, assembled and tested, these programs are for you. CID (certified interconnect designer-basic) and CID+ (certified interconnect designeradvanced) are credentials recognized throughout the electronics industry. Tutorials: CID and CID+ Exams: CID and CID+ Saturday, February 21 8:30 am–5:00 pm Sunday, February 22 8:00 am–5:00 pm Friday, February 20 8:30 am–5:00 pm Test followed by instructor consultation Separate registration is required at www.IPCAPEXEXPO.org Information is subject to change. Please visit www.IPCAPEXEXPO.org for the latest details. IPC Designer Certification workshops and exams will be administered by 9 BUZZ SESSIONS WHAT’S GOT THE INDUSTRY BUZZ’N? Check out these complimentary sessions to keep you in the loop. Information is subject to change. Please visit www.IPCAPEXEXPO.org for the latest details. BZ1 ADVANCED FABRICATION INSTRUCTION EXCHANGE BETWEEN DESIGN AND MANUFACTURING: THE IPC-2581B MODEL Tuesday, February 24 • 1:30 pm–3:00 pm Moderator: David Hillman, Rockwell Collins Speaker(s): Jason Keeping, Celestica; Bruce Hughes, U.S. Army Aviation Missile Research Development Engineering Center; David Pinsky, Raytheon Company This session will give updates on IPC-2581B, Generic Requirements for Printed Board Assembly Products Manufacturing Description Data and Transfer Methodology, and its proposed amendment to be released soon. 2581 is a modern, intelligent standard for printed board assembly products’ manufacturing description data and transfer methodology to help companies ensure manufacturability, quality, reliability and consistency in electronics assemblies. BZ2 U.S. FEDERAL FUNDING OPPORTUNITIES: GRANT PROGRAMS AND PUBLIC-PRIVATE PARTNERSHIPS FOR R&D AND ADVANCED MANUFACTURING Tuesday, February 24 • 3:30 pm–5:00 pm Moderator: Ken Schramko, IPC This Buzz Session will provide an overview of U.S. federal funding opportunities through programs and public-private partnerships for R&D and advanced manufacturing. Attendees will learn about the federal funding process, some opportunities that might be a fit for their company, and how best to pursue these opportunities. BZ3 CALIFORNIA CHEMICALS REGULATIONS Wednesday, February 25 • 10:30 am–12:00 pm BZ4 PERM DISCUSSES PB-FREE – ARE WE THERE YET? PANEL DISCUSSION Wednesday, February 25 • 1:30 pm–3:00 pm Speaker(s): Dave Hillman, Rockwell Collins; Bruce Hughes, Amrdec MS & T EPPT; Jason Keeping, Celestica; David Pinksky, Raytheon Company The Pb-free Electronics Risk Management (PERM) Council will be conducting a session on the current state of implementation of Pb-free materials in electronics. Where are we? This session will include a brief status of PERM activities to date, including an update on published standards, handbooks and white papers developed by PERM, followed by an interactive Q&A session with the audience. Speakers will discuss the future of Pb-free electronics and how to responsibly transition high performance products in order to provide a level of confidence in reliability assessments equal to that currently available for traditional tin-lead electronics. BZ5 iNEMI ROADMAP Wednesday, February 25 • 3:30 pm-4:30 pm Moderator: Marc Carter, CID2012, IPC Speaker(s): Mike Carano, CIT, OM Group Electronic Chemicals, LLC; John Fisher, Interconnect Technology Analysis, Inc.; Charles Richardson, iNEMI - International Electronics On the dais: Chuck Richardson, iNEMI; Jack Fisher, Interconnect Technology Analysis; Mike Carano, OMGI; and Marc Carter, IPC The session will provide an overview of the nature and focus of the major electronic industry roadmap efforts, how the information from each fits together in a complementary picture of the industry, and some of the challenges all are facing. The iNEMI and IPC Roadmaps will be presented in more detail, with the specific trends and concerns uncovered in this year’s releases, and how each proposes to tackle the issues raised. The leaders of these efforts will touch briefly on how the next generation of roadmap activities must change to accommodate our changing industry, followed by a Q&A period. Moderator: Fern Abrams, IPC In addition to EPA and international chemicals regulations such as REACH, manufacturers and companies doing business in California must comply with California’s own chemicals regulatory programs including Proposition 65 and green chemistry regulations. Hear about recent changes to these and other California regulatory programs. 10 www.IPCAPEXEXPO.org BZ6 IPC EVENTS 2015-2016 Thursday, February 26 • 9:00 am-10:00 am Speaker: Sanjay Huprikar, IPC This session will provide an overview of the exciting events that IPC has planned around the world in 2015, and will engage members in a discussion about what new events they would like to see the IPC staff pursue globally in 2016 and beyond. 11 TECHNICAL CONFERENCE Recognized worldwide as the most selective in the world, the IPC APEX EXPO technical conference presents new research and innovations from experts in the areas of board fabrication and design, electronics assembly and test. Sign up for one day, the full conference or the All-Access Package. Register by January 30 and save 20%. Information is subject to change. Visit www.IPCAPEXEXPO.org for the latest details. TUESDAY, FEBRUARY 24 1:30 PM–3:00 PM S01 FLUXES I Moderator: Jason Fullerton, Alpha This session focuses on the makeup and performance of the flux component of solder paste. The authors will present information regarding the properties and performance of activator chemistries, storage conditions of solder paste and the effect on post-soldering electrical reliability and practical methods of evaluating solder paste performance for an assembly process. • Solder Flux and Paste Formulation — Not Every Amine is the Same Yanrong Shi, Kester Inc. • Dispelling the Black Magic of Solder Paste Tony Lentz, FCT Assembly • Can Age and Storage Conditions Affect the SIR Performance of a No-clean Solder Paste Flux Residue? Eric Bastow, Indium Corporation S02 TEST 1 Moderator: Steve Butkovich, OnCore Manufacturing This session will examine the use of solidstate switches in automated test equipment, which can reduce cost while maintaining system performance. Correct choices in design for high-power load switching will also be discussed. • Study of Selection of Solid State Relays in Automatic Test Equipment Eric Xu, Agilent Technologies Singapore Pte. Ltd. • Make the Right Design Choices in Load Switching and Simulation in a High Current and High Mix Mechatronic Manufacturing Test Aaron Torres, Interlatin • Characterization of Solder Defects in Package on Packages with AXI Systems for Inspection Quality Improvement Jane Feng, Ph.D., Flextronics International S03 EMBEDDED TECHNOLOGY Moderator: Todd MacFadden, Bose Corporation Embedded technology is not new, but a confluence of various factors – board density, feature size, signal speed, cost 12 www.IPCAPEXEXPO.org and functionality – make the case for embedded features more compelling than ever. This session includes three different, but complementary, perspectives on the theme of embedded technology. The session examines the structure and function of passive as well as discrete component embedded devices, highlighting their functional advantages. The session will also cover economic and business considerations of implementing embedded devices and will describe the concept and advantages of solderless build-up, a novel way of creating electronic assemblies that leverages embedded principles and technology. • Embedding Passive and Active Components: PCB Design and Fabrication Process Variations Vern Solberg, Solberg Technical Consulting • What is needed to Successfully Introduce “Device Embedding Technology” in Design and Manufacturing of PCBs and PCBAs to Add Value to Your Products?” Michael Weinhold, EIPC European Institute of PCBs • Important Considerations in the Design of Solderless Electronic Assemblies Joseph Fjelstad, Verdant Electronic and Darren Smith, AllWin Group S04 ASSEMBLY ISSUES Moderator: Alan Rae, Alfred Technology Resources Inc. / Ceramics Corridor Innovation Centers This session investigates the technical roadmap for press fit technology, with attention to main characteristics including placement and insertion, inspection, repair, pin design trends and their challenges and solutions. It will also examine EMI-caused EOS (electrical overstress) exposure to devices in automated assembly and methods of mitigation. Areas of focus include EMI sources in automated equipment; types of electrical noise; how this electrical noise causes EOS; practical means to reduce EMI in automated equipment and resulting EOS to sensitive devices. • Press Fit Technology Roadmap and Control Parameters for a High Performance Process Jose Becerra, AME - Americas • EOS Sources in Automated Equipment Vladimir Kraz, OnFILTER, Inc. TUESDAY, FEBRUARY 24 3:30 PM–5:00 PM S05 FLUXES II Moderator: Eric Bastow, Indium Corporation This session discusses new reflow oven technologies needed to prevent flux build– up in ovens that have been developed as a result of changes in flux chemistry. The session will also focus on potential risks of poorly cleaned and rinsed flux chemistries and cleaning agents and on the process and material parameters that effect the phenomenon of mid-chip solder balling. • Effective Methods to get Volatile Compounds out of Reflow Process Gerjan Diepstraten, Vitronics Soltec • Materials Compatibility and Aging for Flux and Cleaner Combinations Kim Archuleta, Sandia National Labs • Studies to Further Understand the Effect of Process Changes and Flux Chemistry on Mid-Chip Solder Balling Katherine Day, Henkel Ltd. S06 PRINTED ELECTRONICS Moderator: Patricia J. Goldman, I-Connect007 This session covers several printing-based approaches to via fill and description of suitable laser systems for sintering and results of testing at two PCB fabricators. The authors will demonstrate printed antennas on structural and rigid objects, and the combination of printing structural objects and electronic function on a single machine. Printed electronics (PE materials in traditional PCBs and opportunities for PE substrate processing by PCB manufacturers will also be discussed. • Rapid via Fill Methods Using Nanocopper Ink Sujatha Ramanujan, Ph.D., Intrinsiq Materials Inc. • Printed Electronic Structures Kenneth Church, Ph.D., nScrypt, Inc. • Circuit Technology Crossovers Where PCB’s and Printed Electronics Meet Chris Hunrath, Insulectro S07 SOLDER RELIABILITY Moderator: Beverley Christian, Ph.D., BlackBerry This session will include a comparison of solder joints produced with existing lead-free and leaded solders with laser and robotic iron soldering on polyimide substrates for high power and high temperature operating environments and alternative materials as replacements for high temperature lead based solder. It will also cover solder joint embrittlement with gold, with suggestions on how to improve gold plating requirements, solder joint embrittlement prevention, and solder assembly industry standards. Session speakers will also discuss test methods to grow tin whiskers for solder alloys with a review of several alloy options that may inhibit tin whisker formation. • Existing and Future High Temperatures Solder Replacement to meet RoHS Legislation Christopher Hunt, National Physical Laboratory • Solder Joint Embrittlement Mechanisms, Solutions and Standards Mike Wolverton, Raytheon Space and Airborne Systems • Sample Preparation for Mitigating Tin Whiskers in Alternative Lead-Free Alloys — Part III Karl Seelig, AIM WEDNESDAY, FEBRUARY 25 10:30 AM–12:00 PM S08 CLEANING Moderator: Eric Bastow, Indium Corporation This session details an experiment used to determine whether or not the standard one (1) hour extraction, as part of the IPC-TM-650 IC methodologies for printed circuit boards and assemblies, is sufficient to remove “all” of the contamination present on a given sample. It also details a study that looks at the effectiveness of available aqueous-based cleaning agents on substrates populated with the most challenging low-standoff components. New solvent cleaning agents and processes that have been designed to clean highly dense electronic hardware with the use of ion chromatography and SIR will also be covered. • In Regards to Ion Chromatography Testing, A Fundamental Question: Is Once Enough? Keith Sellers, Trace Laboratories Maryland • Effective Cleaning Solutions for Lead-Free No-Clean Applications Umut Tosun, Zestron America • Duo-Solvent Cleaning Process Development for Removing Flux Residue from Class 3 Hardware Mike Bixenman, Kyzen Corporation 13 TECHNICAL CONFERENCE [CONTINUED] S09 PCB FABRICATION I S11 HIGH SPEED/HIGH FREQUENCY I Moderator: Todd MacFadden, Bose Corporation This session presents important PCB fabrication innovations designed to facilitate continued miniaturization and increased circuit density on PCBs by improving the way vias are filled and circuitry is etched. The session will also cover advances in plating processing through vertical continuous plating for HDI applications. It also describes novel process control techniques to achieve precise analysis and monitoring of plating chemistry. • Electroplated Copper Filling of Through Holes on Varying Substrate Thickness Jim Watkowski, MacDermid, Inc. • Electrochemical Techniques for the Determination and Control of Via Fill Plating Additives in Acid Copper Plating Baths Roger Bernards, OMG Electronic Chemicals, LLC • Optimized Semi-Additive Process for Polyimide as Dielectric in Build Up Packages Fei Peng, Ph.D., MacDermid, Inc. Moderator: David H. Hoover, TTM Technologies This session will focus on various highspeed test methods along with the PCB manufacturing process and how it can impact signal loss on the finished transmission line. Discussion will include dielectrics, copper, and solder mask. • High Speed High Frequency Test Method Comparison by HDP Karl Sauter, Oracle Corporation • Characterization of Printed Circuit Board Material & Manufacturing Technology for High Frequency Erich Schlaffer, Austria Technologie & Systemtechnik • The Effects of PCB Fabrication on High Frequency Electrical Performance John Coonrod, Rogers Corporation, Advanced Circuit Materials Division S10 CORROSION AND CONTAMINATION Moderator: Russell H. Nowland, Alcatel-Lucent Corrosion and contamination plague the electronics industry from consumer product Class 1 to high reliability Class 3. Causes can range from a spilled soft drink on a consumer product, to a corrosive environment attacking telecom, automotive or medical devices supporting life. This session will cover where contaminates and corrosive residues can be introduced during the manufacturing and assembly processes. • Anti Corrosion Server for Free Air Cooling Data Centre and Verification Method Quincy Liu, Baidu Online Network Technology (Beijing) Co., Ltd. • Characterization, Prevention and Removal of Particulate Matter on Printed Circuit Boards Prabjit Singh, IBM Corp. • Dissolution of Metal Foils in Common Beverages Bev Christian, BlackBerry 14 www.IPCAPEXEXPO.org S12 PRINTING Moderator: Jeff Schake, ASM DEK The advancement of stencil printing capability is a result of both optimizing existing technology and creative engineering innovation. This session addresses improvised stencil printing output with considerations to under stencil wiping materials and implementation of stencil design strategies tailored to specific circuit board landscapes. Printing machine fitness challenges will be explored with respect to increased utilization of low cost materials. • Under Stencil Cleaning Paper Comparison Test Lars Bruno, Ericsson • Optimizing SMT Stencil Design Based on PCB Layout Chrys Shea, Shea Engineering • Enabling High-Speed Printing with Low Cost Materials: Process Stability is Paramount Mike Cieslinski, Panasonic WEDNESDAY, FEBRUARY 25 1:30 PM–3:00 PM S13 PCB FABRICATION II Moderator: Alan Rae, Alfred Technology Resources Inc. / Ceramics Corridor Innovation Centers The board fabrication industry faces many challenges including developing more environmentally benign processes, conductor adhesion and quality management in the fabrication of complex copper traces and interconnects. The authors in this session provide information valuable to addressing these three challenges. • Recyclable and Environmental-Friendly Etchant for Copper Surface Pre-treatment Mike Palazzola, Atotech USA •Electroless Copper Metallization of Smooth Surfaces in Flex and Rigid Circuit Boards Roger Bernards, OM Group • A Novel Method for Determining Capability & Process Control of Control Depth and Back Drilling of Printed Circuit Boards Rocky Hilburn, Insulectro S14 ALTERNATE LEAD-FREE SOLDER Moderator: Wayne Johnson, Ph.D., Tennessee Tech University The study of lead-free solder alloys to improve processing, reliability and cost continues. This session covers low temperature, epoxy reinforced solder to reduce warpage during reflow, a critical issue in assembly of ultra-thin electronics. • Investigation of Low Temperature Solders to Reduce Reflow Temperature, Improve SMT Yields and Realize Energy Savings Raiyomand Aspandiar, Intel Corporation • Acceptance Testing of Low-Ag Reflow Solder Alloys Kris Troxel, Hewlett Packard Company • Reliability Study of Lead-Free Solder Joint Assembled Using Low Silver Alloy Solder Pastes Jennifer Nguyen, Flextronics International S16 PRODUCT DESIGN & COMPLIANCE This session covers technological aspects of a working solution for early-stage form/ fit compliance verification of all designed-in components to the intended manufacturing processes for PCB assembly designs. It will discuss the use of an enterprise PLM (product lifecycle management) framework to automate the process of gathering and managing supplier disclosure data to address current sustainability and future needs. The session will also present a number of steps for ensuring component and PCB supply chain fluency, along with practical ways to design for more streamlined production — especially for pick-and-place and reflow processes. • Streamlining PCB Assembly and Test NPI with Shared Component Libraries Julian Coates, Mentor Graphics Valor Division • Sustainable Product Design and Supplier Material Disclosure Tedie West, Siemens PLM • Practical Steps Designers Need for Streamlined Production Benjamin Jordan, Altium Inc. WEDNESDAY, FEBRUARY 25 3:30 PM–4:30 PM S17 REWORK-ADVANCING THE TECHNOLOGY Moderator: Russell Nowland, Alcatel-Lucent This session will provide possible solutions to many of the issues plaguing repair operations and will offer best practices used in the industry. This session will provide some new insight into using selective reflow as a repair tool along with a look at techniques and materials to shield adjacent areas from the rework process. • Selective Reflow Rework Process Omar Garcia Lopez, Flextronics International • Debunking the Myth...Teflon(TM) Tape is not the Best Masking Material for PCB Rework Bob Wetterman, BEST Inc. S18 TEST II Moderator: Steve Butkovich, OnCore Manufacturing On-contact electrical assembly test continues to become more important as circuit densities and speeds increasingly limit test probe access to electrical circuits. This session will cover a report on the ongoing challenges of using boundary scan description language file and an effective method of characterizing solder defects for package on package technology as part of a quality improvement plan. • Investigation into Challenges of using .BSDL Files: Survey Results and Conclusions Philip Geiger, iNEMI • Costs and Causes of No Fault Found Events Louis Ungar, A.T.E. Solutions, Inc. S19 3D ASSEMBLY Moderator: Wayne Johnson, Ph.D., Tennessee Tech University Miniaturization of electronics has focused on reduced package/device sizes to increase the electronics per unit area. As this reaches its limits, use of the third dimension is increasingly important. This session will examine 3D PWB assembly options and future trends and 2.5D IC assembly process and reliability data. • 3D Assembly Processes a Look at Today and Tomorrow David Geiger, Flextronics International • New Approaches to Develop a Scalable 3D IC Assembly Method Charles Woychik, Invensas Corporation 15 TECHNICAL CONFERENCE [CONTINUED] S20 UNDERFILLS Moderator: Denny Fritz, MacDermid, Inc. Underfill materials continue to improve the reliability of dense area array components in the electronics industry. This session will detail innovative quality control methodology for underfills using powerful new analytical instruments; and an underfill-like material that improves the reliability of tin/bismuth attachment solder, to bring performance up to the level of higher melting tin/silver/copper compositions. • Control of the Underfill of Surface Mount Assemblies by Non-Destructive Techniques Julien Perraud, Thales Research and Technology • Lower Temperature Solder Joint Encapsulant for Sn/Bi Application Wusheng Yin, YINCAE Advanced Materials, LLC S21 RE-SHORING Moderator: Gary Ferrari, FTG Circuits Re-shored manufacturing has the potential to yield better business return, either as an OEM, or through the use of EMS providers. This session will examine what actual cost components should be included in a landed cost analysis with a comparison to demonstrate a total landed cost option versus one that is focused on IL (indirect labor) /DL (direct labor) cost as well as a discussion of costs for off-shore manufacturing, and labor cost differentials. • Re-shoring or Near-Shoring Concepts Should be Strongly Considered When the OEM’s Goal is to Deliver Optimum Balance Between Landed Cost and Time to Market Brian Graham, Kimball Electronics Inc. • How Re-shoring Can Ensure Profitability Michael Ford, Mentor Graphics S22 BGA HEAD IN PILLOW Moderator: Jason Fullerton, Alpha Head in Pillow defects on BGA (ball grid array) packages are characterized by incomplete coalescence of solder paste with BGA solder bumps during the reflow process. Factors that can contribute to this issue include package warpage and solder bump contamination. In this session, a method of stencil design that removes warpage-caused Head- in-Pillow and the effects of contamination and steam aging on Head in Pillow will be presented. • Influence of Salt Residues on BGA Head in Pillow (HiP) Jose Servin, Continental 16 www.IPCAPEXEXPO.org •Refining Stencil Design to Counter HIP Defects Christopher Tibbetts, Analogic Corp. S23 ELECTROCHEMICAL RELIABILITY OF FLUXES Moderator: Brook Sandy-Smith This session covers results for different flux types and residues using two different methods to test electrochemical reliability of printed circuits. There are many ways to measure the chemical residues left behind after soldering. One is creep corrosion as a result of flux residues on varied surface finishes, assessed in a Flowers of Sulfur chamber. The other correlates SIR results to ion chromatography readings for varying levels of several types of chemical residues. • Testing Printed Circuit Boards for Creep Corrosion in Flowers of Sulfur Chamber: Phase 2 Prabjit Singh, IBM Corp. • How Clean is Clean Enough — At What Level Does Each of The Individual Contaminates Cause Leakage and Corrosion Failure? Terry Munson, Foresite THURSDAY, FEBRUARY 26 9:00 AM–12:00 PM S24 CONFORMAL COATING Moderator: Doug Pauls, Rockwell Collins In this session, presenters will review the surface insulation resistance (SIR) of PCB assemblies with the factors of cleaning and no cleaning; conformal coating and no conformal coating and solder paste type using test vehicles. It will also discuss a study on a SIR test board manufactured with dummy components in order to better correlate international standards with real- world-use conditions. In addition, studies exploring the scaling effects of thickness on a variety of properties of various materials, with special emphasis on silicone elastomers and work on ultrathin fluoropolymer coatings using different application methods to determine their level of corrosion resistance and water/vapor repellency in relation to coating thickness will also be addressed. • Insulation Resistance of Conformally Coated Printed Circuit Board Assemblies N. Jordan Jameson, University of Maryland • A New, More Representative Test Method for the Evaluation of Conformal Coating Performance in Harsh Environmental Conditions Phil Kinner, Electrolube • Properties that Scale with Sample Thickness: The Power of Thin! Kent Larson, Dow Corning Corporation • Ultra-Thin Coatings to Mitigate Damage of Printed Circuit Boards Due to Environmental Exposure Erik Olson, 3M Company S25 PCB FABRICATION III/ RELIABILITY Moderator: Karl Sauter, Oracle America, Inc. This session will present papers on improving the quality and reliability testing of boards having advanced PWB technologies. The PWB technologies being addressed include dual-diameter platedthrough holes, automotive grade rigid boards, and microvias. • Reliability Improvement of Dual Diameter Plated Through Holes by Point Angles of Bit Jong-Deok Choi, ISU Petasys • Specification & Qualification of Automotive Grade Rigid Printed Boards James McLeish, DfR Solution • Review of IST Protocols and their Effectiveness in screening Microvias Alisa Grubbs & Wade Goldman, Charles Stark Draper Laboratory • Influence of Plating Quality on Reliability of Microvias Yan Ning, CALCE at University of Maryland S26 HIGH PERFORMANCE MATERIALS AND THERMAL MANAGEMENT Moderator: Michael Beauchesne, Amphenol Printed Circuits, Inc. This session will discuss different test methods for measuring high temperature capability including the new IPC Service Temperature test and report on test results for various flexible materials and recommendations for the best flexible materials for high temperature applications including development work. The session will also examine the correlation between the mechanical properties of different laminates to their susceptibility to pad cratering, and offer recommendations for assessment of the risk of pad cratering using nano-indentation. In addition, presenters will discuss thermal testing of a thermally and electrically conductive adhesive and a technology for the fabrication of PCBs used primarily in high-power RF/millimeter wave applications. • Flexible Circuit Materials for High Temperature Applications G. Sidney Cox, The DuPont Company • Correlation Between Pad Cratering and Nano-mechanical Properties of PCB Laminates Carlos Morillo, Ph.D., CALCE • Thermal Management Advantages of Thermally and Electrically Conductive Adhesive John Coonrod, Rogers Corporation, Advanced Circuit Materials Division • A System of Producing High-Power RF Circuit Boards Employing a Low-CTE, Thermally Engineered Metalized Layer Al Wasserzug, Cirexx International S27 HIGH SPEED/HIGH FREQUENCY II Moderator: Dave Hoover, TTM Technologies This session will look at high speed/ high frequency activity beginning at the epoxy resin level along with some other significant resin enhancements. Then the session discussion will move to both contact and non-contact measurement methods of copper foil roughness. A new fast measurement technique will be also be discussed for SI (signal integrity) measured wide environmental coefficients over 20 GHz (which includes impedance, Dk, Df, and insertion loss). • Polyphenylene Ether Macromonomer – Cyanate Ester Laminates Edward Peters, Ph.D., SABIC • Measuring Copper Surface Roughness for High Speed Applications John Marshall, MacDermid, Inc. • A Signal Integrity Measuring Methodology in the Extraction of Wide Bandwidth Environmental Co-efficient Eric Liao, TUC S28 MINIATURIZATION Moderator: Jeff Schake, ASM DEK Consumer appetite for more powerful highly portable electronics continues to drive the demand for smaller components. This session addresses issues and challenges associated with miniature and highdensity component assembly. Practical and balanced testimony will be offered with perspectives from various sections of the industry. • Development of a Robust 03015 Assembly Process Robert Gray, Robert Gray, ASM Assembly Systems LLC • Device Miniaturization — Impact of a High Density SoC Direct Chip Attach on Surface Mount and PCB Technologies Tim Swettlen, Intel • Handling the Complexity of Miniaturized Components (01005, 03015…) in the Mix with Standard Components (BGA LED, Pin-in-Paste) Helmut Oettl, Rehm • Overview of Miniaturization on Large Form Factor PCBA David Geiger, Flextronics International 17 PROFESSIONAL DEVELOPMENT COURSES Learn about the latest in design, lead-free technologies, materials, process improvement, solder joint reliability and more. Courses are listed by general topics to help you focus on the specialized knowledge you’re looking for. Get the most for your investment by registering for the All-Access Package and selecting up to five half-day courses that meet your professional needs. Save an additional 20% when you register by January 30. Information is subject to change. Please visit www.IPCAPEXEXPO.org for the latest details. ASSEMBLY PROCESSES FOR LEAD FREE AND TIN-LEAD PD01 DESIGN AND ASSEMBLY PROCESS CHALLENGES FOR BOTTOM TERMINATIONS COMPONENTS (BTCS) IN A TIN-LEAD & LEAD-FREE WORLD Sunday, February 22 • 9:00 am-12:00 pm Ray Prasad, Ray Prasad Consultancy Group Bottom termination components (BTCs) go by various names such as QFN, DFN, SON, LGA, MLP, and MLF, which utilize surface-to-surface interconnections. BTCs are like BGAs but without the solder balls. This minor difference in the physical I/O shape makes all the difference in design, assembly and rework between BTCs and BGAs. Because there are no leads or solder balls in BTCs to take up any slack from package or board warpage, perfection in design and the assembly process is essentially needed. Designing for BTCs may involve trial and error and a lot of frustration. Additional frustration is caused by fast-paced changes in packaging technologies and the advent of lead free compounding the designer’s task. Get away from the trial and error approach and learn successful design and process practices commonly used by the industry. This course will cover the practical details of BTC design and assembly processes and identify many of the characteristics that influence the successful implementation of robust and reliable BTC assembly processes. 18 www.IPCAPEXEXPO.org PD05 PREVENTING ASSEMBLY DEFECTS AND PRODUCT FAILURES Sunday, February 22 • 9:00 am-12:00 pm Jennie Hwang, Ph.D., Sc.D., H-Technologies Group Considering the new and anticipated developments in packaging and assembly and with the goal to achieve high yield and reliability, this course will focus on how to prevent prevailing production defects and product reliability issues through an understanding of potential causes. The top six defects will be addressed and specific defects associated with BTCs and PoPs and the reliability of BTC and PoP assembly will be outlined. Learn about the different sources and respective remedies of solder joint voids as well as their effects on the solder joint reliability. Gain a holistic overview of product reliability, including the important roles of materials, processes and testing/service conditions, and the crucial principles behind product reliability. PD06 ADVANCED REWORK: HANDSON BGA REBALLING, LEADLESS DEVICES AND FINE-PITCH PARTS — PART I Sunday, February 22 • 9:00 am-12:00 pm Norman Mier Jr., MIT, BEST Inc. Designed for individuals seeking advanced rework skills on BGA, leadless devices, this course is unique in that both theoretical and practical skills will be demonstrated. Rework technicians, process engineers, reliability engineers and component engineers will benefit from topics covered, including: methods, materials and processes for reballing components; plastic and ceramic BGA device reballing; rework of bottom terminated components; and methods, materials and processes for reworking bottom-terminated components. For maximum benefit, register for this course and Part II (PD13). PD07 UNDERSTANDING AND IMPLEMENTING BEST PRACTICES IN ELECTRONICS ASSEMBLY PROCESSESPART I (ZEN AND THE SCIENCE OF ELECTRONICS ASSEMBLY) Sunday, February 22 • 9:00 am-12:00 pm Phil Zarrow, ITM Consulting Inc. You have the responsibility and resources to improve the productivity of an assembly operation… what do you do? This course drives awareness and solutions to the adverse impact that non-optimal assembly practices and processes have on the product quality and financial success of electronics assembly businesses. This initial of two related courses covers general optimization objectives and strategies for improving productivity and quality. Best practices are defined and applied to the most critical assembly operation, solder paste stencil printing. A comprehensive perspective on problem issues will be explored for critical materials (both existing and emerging), equipment, procedures, and methods. Most important, practical solutions will be presented. Key issues that consistently result in assembly problems and low yields will be identified and resolved. PD08 REFLOW SOLDERING PROCESS AND INFLUENCE ON DEFECTS — AN INDEPTH LOOK Sunday, February 22 • 2:00 pm-5:00 pm S. Manian Ramkumar, Ph.D., Rochester Institute of Technology Reflow soldering is a key process in surface mount electronics assembly that occurs after stencil printing. Soldering parameters influence the quality of the solder joint in a surface mount PCB assembly. Gain a thorough understanding of the reflow process for tin-lead and lead-free soldering and its influence on assembly yield. This course will provide an in-depth look at the various soldering methods, mechanism for solder joint formation, intermetallic formation, reflow parameters, effect of reflow parameters, thermocouple attachment and profiling, importance of profiling, defect identification and corrective action. PD13 ADVANCED REWORK: HANDS-ON BGA REBALLING, LEADLESS DEVICES AND FINE-PITCH PARTS — PART II Sunday, February 22 • 2:00 pm-5:00 pm Norman Mier Jr., MIT, BEST Inc. Part II of this course focuses the discussion on advanced skills for fine-pitch component rework. In addition to demonstrating both theoretical and practical skills, this course will cover the methods, materials and processes for rework of fine-pitched components via paste printing and hand soldering. PD15 UNDERSTANDING AND IMPLEMENTING BEST PRACTICES IN ELECTRONICS ASSEMBLY PROCESSES, PART II (ZEN AND THE SCIENCE OF ELECTRONICS ASSEMBLY) Sunday, February 22 • 2:00 pm-5:00 pm Phil Zarrow, ITM Consulting Inc. This second of two courses continues to drive awareness of and solutions to the adverse impact that non-optimal assembly practices and processes have on the product quality and financial success of electronics assembly businesses. This session will address the assembly process operations of component placement, soldering, and cleaning. In addition, best practices evolving for the implementation of challenging technologies such as BTC/ QFNs will be presented. Most important, practical solutions will be presented. Key issues that consistently result in assembly problems and low yields will be identified and resolved. PD21 SMT AND THROUGH HOLE DEFECT ANALYSIS AND PROCESS TROUBLESHOOTING — PART I Monday, February 23 • 9:00 am-12:00 pm S. Manian Ramkumar Ph.D., Rochester Institute of Technology This two-part course will provide a thorough understanding of SMT and through hole defects and the various factors that influence the formation of defects. Get an in-depth look at the possible root causes for defects and their influence on yield. The knowledge gained from this workshop will help companies enhance product development, and manufacturing yield. For maximum benefit, register for Part II (PD29) which will use case studies to highlight a systematic approach to solve process problems and identify the true root cause(s) for defects. 19 PROFESSIONAL DEVELOPMENT COURSES [CONTINUED] PD22 SMT STENCIL PRINTING — A PRACTICAL GUIDE TO DEFECT PREVENTION AND YIELD IMPROVEMENT Monday, February 23 • 9:00 am-12:00 pm Chrys Shea, Shea Engineering Services; This course will provide practical guidance on basics of SMT solder paste stencil printing to the latest research in stencil printing tools and technologies. Starting with an overview of printing fundamentals: solder paste characteristics and behaviors, the mechanics of the process and importance of a good setup, and the relationship between aperture sizes and paste deposit formations, the course will progress rapidly into troubleshooting techniques for both general and specific printing issues, and address problem prevention through proper stencil design and selection. Moving into advanced technology topics, the course will also review the last four years of independent research on stencil materials, manufacturing processes and nanocoatings, and provide an update of automated solder paste inspection (SPI) technologies, applications and special features. Attendees are encouraged to ask questions or bring specific problems to the class for suggestions and inputs. PD29 SMT AND THROUGH HOLE DEFECT ANALYSIS AND PROCESS TROUBLESHOOTING — PART II Monday, February 23 • 2:00 pm-5:00 pm S. Manian Ramkumar Ph.D., Rochester Institute of Technology Part II of this course will provide an understanding of a systematic problemsolving approach that can be used for troubleshooting the surface mount technology (SMT) and through hole electronics packaging process to avoid defects, enhance product development and maximize manufacturing yield. Using case studies, participants will work in teams to thoroughly define problems, find the true root causes and determine appropriate fixes. For maximum benefit, register for this course and Part I (PD21) which provides an in-depth look at the factors influencing the SMT and through hole process, root causes for defects and their impact on yield. 20 www.IPCAPEXEXPO.org PD31 UNDERSTANDING PARAMETERS PD25 EVALUATING THE Thursday, February 26 • 9:00 am-12:00 pm Monday, February 23 • 2:00 pm-5:00 pm AF Ng, Techment Consultancy Wave soldering has been used for soldering of boards for many years, and while manufacturing personnel are well aware of common defects such as bridging, solder skips, solder voids and insufficient barrel fill or hole-fill, many would agree barrel fill is still a struggle to solve. This problem is confounded with high density thick PCBs and the application of lead-free solder. This course will highlight the root causes of the defect, from factors in board design and material procurement to equipment setting and maintenance. Knowledge on soldering fundamentals, laminate composition, thermal demands, design geometry, wetting mechanism during wave contact and equipment maintenance will be shared. Emphasizing that the problem cannot be overcome by a process engineer alone, but that it requires a team approach, this course will provide a concise description of contributing factors through simplified notes, shared experiences and interaction in class. Douglas Pauls, Rockwell Collins Conformal coatings should be chosen based upon how well they protect the electronic circuit against the challenges of the end-use environment. The difficulty is that not many people know how to make that evaluation. What kinds of tests can be used? What parameters should be chosen? How should the data be interpreted? This course will cover various tests that are used to do base material characterizations, as well as tests which cover more functional aspects of conformal coating. While much of the testing will be from a Class 3 avionics perspective, the methodologies covered can be extended to other industry segments. CLEANING/COATING/ CLEANING/COATING/ Cheryl Tulkoff, CRE, DfR Solutions Designing printed boards today is more difficult than ever before because of the increased lead-free process temperature requirements and associated changes required in manufacturing. Not only has the density of electronics assemblies increased, but also many changes are taking place throughout the entire supply chain regarding the use of hazardous materials and the requirements for recycling. Much of the change is due to the European Union (EU) directives and regulations regarding these issues. While RoHS and REACH have caused many suppliers to the industry to rethink their materials and processes. Everyone designing or producing electronics has been or will be affected. AFFECTING SOLDER BARREL FILL IN WAVE SOLDERING CONTAMINATION PD19 ELECTRONICS ASSEMBLY AND ADVANCED PACKAGING CLEANING PROCESS DEVELOPMENT Monday, February 23 • 9:00 am-12:00 pm Mike Bixenman DBA, Kyzen Corporation Learn the importance of cleaning process hardware. Highly dense interconnected circuits are at a greater corrosion risk due to harsh environments that can cause electrochemical deterioration and chemical attack on metallic alloys. Environmental factors are more problematic as the distance between conductive paths narrow. This course will provide an inside view of corrosion mechanisms, cleaning technology options, integration of the cleaning media with the cleaning tool and controlling the process. PERFORMANCE OF CONFORMAL COATINGS DESIGN PD02 DESIGN FOR EXCELLENCE: DFM (DESIGN FOR MANUFACTURING), DFR (DESIGN FOR RELIABILITY), DFA (DESIGN FOR ASSEMBLY) AND MORE — PART I Sunday, February 22 • 9:00 am-12:00 pm Gain comprehensive insight into the areas where design plays an important role in the manufacturing process and find out how to effectively address increasingly sophisticated PCB fabrication technologies and processes. For maximum benefit, register for both this course and PD09 (Part II). PD09 DESIGN FOR EXCELLENCE: DFM (DESIGN FOR MANUFACTURING), DFR (DESIGN FOR RELIABILITY), DFA (DESIGN FOR ASSEMBLY) AND MORE — PART II Sunday, February 22 • 2:00 pm-5:00 pm Dale Lee, Plexus Corp Today’s design tolerances have impacted traditional assembly processes with very tight solder application, component placement and soldering constraints. Traditional Six Sigma controls are not sufficient to achieve a high-yielding manufacturing process. Introducing the elements of design-for-matched-process (DFMP), this course will provide examples of several opportunities within the DFMP for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching and environmental controls. For maximum benefit, register for this course and Part I (PD02). PD10 DESIGNING COMPLEX BOARDS Sunday, February 22 • 2:00 pm-5:00 pm Susy Webb, CID, Design Science When beginning a complex board design, a unique set of needs and questions must be addressed. Where to start the process? How to organize the information on all those schematic pages? What is the best way for these parts and sections to fit together electronically? How to place everything and route it so that it all fits within the board outline and has good signal integrity? This course will address these questions and more by providing insight into the laws of physics, information on why some practices may work better than others, and lots of examples. PD11 EMBEDDING PASSIVE AND ACTIVE COMPONENTS: PCB DESIGN AND ASSEMBLY PROCESS FUNDAMENTALS Sunday, February 22 • 2:00 pm-5:00 pm Vern Solberg, Solberg Technical Consulting Companies attempting to improve board functionality and minimize space are embedding a broad range of components within a board structure. While some components are easy candidates for integrating into the substrate, others involve more complex processes and therefore, the benefits are difficult to rationalize. This course was developed to better enable the product designer and manufacturing specialist to have a clear understanding of 21 PROFESSIONAL DEVELOPMENT COURSES [CONTINUED] the principles for embedding components in an organic multilayer circuit board structure. This course will include design guidelines, material selection and termination methodology for embedding active and passive (resistor, capacitor, inductor and discrete transistor) elements. Several process variations for embedding and interconnecting thinned semiconductor elements within the multi-layer PCB will be illustrated. PD14 RF AND MIXED SIGNAL PRINTED CIRCUIT BOARD DESIGN Sunday, February 22 • 2:00 pm-5:00 pm Richard Hartley, CID, L-3 Avionics Systems Inc. Geared for PCB designers, this course will provide an understanding of what RF engineers request during PCB layout. Due to sensitivity in analog circuits, the keys to full functionality (whether designing very high frequency analog printed boards, mixing RF with digital or mixing low frequency analog with digital) are signal integrity and noise control in the design of printed boards. PD23 BUILDING A BRIDGE FROM DESIGN TO MANUFACTURING Monday, February 23 • 2:00 pm-5:00 pm Susy Webb, CID, Design Science Designers must understand that what they do in a design affects the manufacturer’s ability to quickly and easily do its job, thereby creating a quality product at the lowest possible cost. The use of IPC standards is important, and they are often used as baseline documents by designers in the creation of internal specifications for footprints, padstacks, placement, stackups, routing, finishing, etc. Building on these industry standards, companies can augment existing IPC requirements with their own guidelines for work and their own unique measurements for what is considered acceptable product from the manufacturer. This course will focus not on how a board is manufactured, but rather on what designers can do in the design to help make fabrication and assembly easier. 22 www.IPCAPEXEXPO.org PD26 HIGH DENSITY DESIGNING WITH AND WITHOUT HDI Monday, February 23 • 2:00 pm-5:00 pm Happy Holden As fabricators take advantage of increasing equipment capabilities (smaller holes and traces/spaces) and thinner laminates are commonly available, PCB designers are provided with the opportunity to use higher density design features on their printed boards. This course is designed to introduce PCB designers to newer via constructions, stackups and BGA breakout strategies so that boards can be reduced in size or have their layer count and thickness lowered, or two TH boards can be combined into a new high density board. PD27 PCB MATERIAL AND COPPER FOIL CONSIDERATIONS TO REDUCE INSERTION LOSS Monday, February 23 • 2:00 pm-5:00 pm Jeff Loyer, Signal Integrity Lead Learn critical PCB stackup and manufacturing considerations to meet today’s high speed signaling requirements, specifically lowering insertion loss. The course will include an insertion loss overview, discussion of insertion loss trends in the industry, and a comparison of conductor vs. dielectric losses. In addition, an outline of how to design and build PCBs to minimize insertion loss in a cost-effective manner while maintaining reliability will be provided. PCB insertion loss factors include copper foil types and profiles, adhesion treatments, material selection, resin content, and insertion loss measurement techniques. PD28 POWER SYSTEM DESIGN FOR ELECTROMAGNETIC COMPATIBILITY (EMC) AND SIGNAL INTEGRITY (SI) CONTROL Monday, February 23 • 2:00 pm-5:00 pm Richard Hartley, CID, Rhartley Enterprises The power distribution section of a printed board is the foundation for which all things work in the circuit. If this section is not designed correctly, the entire circuit is at risk from noise, to say nothing of the severely increased possibilities for EMI. Gain insight into why low impedance in the power bus, across the range of harmonic frequencies of a digital circuit is critical, and how further complicating matters, analog and digital circuits often need a much different approach for power delivery to ICs. EMERGING TECHNOLOGIES PD16 3-D IC INTEGRATION AND 3-D IC PACKAGING Monday, February 23 • 9:00 am-12:00 pm John Lau, ASM Pacific Technology 3-D IC packaging and 3-D IC integration are different. In general, 3-D IC integration uses TSVs (through-silicon vias), whereas 3-D IC packaging does not. In fact, TSV is the heart of 3-D IC integration. It provides the opportunity for the shortest chipto-chip, and the smallest pad size and pitch of interconnects. The potential high volume manufacturing of 3-D IC integration is: 1. memory-chip stacking; 2.wide I/O memory (or logic-on-logic); 3.wide I/O DRAM, wide I/O 2, HMC, and HBM; and 4.wide I/O interface (or 2.5-D IC integration). Learn about the supply chains and the critical steps for high-volume manufacturing of these four groups, including FEOL, MOL, BEOL, TSV, MEOL (middle-end-of-line), assembly, and test. Insights into key enabling technologies such as TSV forming and filling, front and backside metallization, RDL, temporary bonding and de-bonding, and micro bumping, assembly and reliability will also be presented and discussed. PCB FABRICATION AND MATERIALS PD04 PCB FABRICATION BASICS: PROCESS AND SPECIFICATION — PART I Sunday, February 22 • 9:00 am-12:00 pm Don Schmieder and Jim Vanden Hogen, Plexus Corporation Gain an understanding of an entire multi-layer PCB fabrication process and learn how design affects fabrication and assembly. Physical samples taken from the fabrication process will be available for inspection. This course will cover PCB types and industry specifications, laminates and their properties, front-end engineering, and basic layer stack-ups. Inner-layer processing and lamination, as well as drilling will also be discussed. For maximum benefit, register for both this session and Part II (PD12). PD12 PCB FABRICATION BASICS: PROCESS AND SPECIFICATION — PART II Sunday, February 22 • 2:00 pm-5:00 pm Don Schmieder and Jim Vanden Hogen, Plexus Corporation Part II of this full-day course will review the fabrication process after drilling and discuss desmear, electroless copper, outerlayer processing, soldermask, legend and electrical test. Explore the pros and cons of various surface-finish applications and find out about cost-effective arrays that maximize material, facilitate manufacturing and allow for post-assembly singulation. Using the IPC-6012 PCB fabrication specification for reference, learn how to develop procurement documentation, including addressing RoHS-compliant materials. For maximum benefit, register for both this course and Part I (PD04). 23 PROFESSIONAL DEVELOPMENT COURSES [CONTINUED] PD17 ADVANCED PCB TROUBLESHOOTING: CAUSE, EFFECT AND PREVENTION OF PCB RELATED DEFECTS Monday, February 23 • 9:00 am-12:00 pm Mike Carano, CIT, OM Group Electronic Chemicals, LLC Printed board defects, such as interconnect separation, delamination, wedge voids, plating folds, microvoids, surface pitting, and hole wall pull-away, carry significant costs. Many of these are difficult to solve because the root cause may not be readily apparent and multiple factors may contribute. This course will delve into the most intricate of these factors and how the interrelationship of both up and downstream processes contribute to scrap product. Understand the effect that drilling has on hole wall quality and the subsequent metalization process, and learn how to recognize problems like this to take corrective action. Solderability and assembly related issues such as outgassing, black pad, creep corrosion and blow holes will be explored, as will myriad electrodeposition defects, such as mouse bites, pitting, and domed or crown plating. Discussions on imaging, including liquidphotoimageable solder masks; strategies to solve solder mask peeling, poor circuit trace coverage, skips, bubbles, and poor adhesion in nickel gold plating; and solder mask equipment and its effect on soldermask quality will also be held. Some knowledge of the PCB fabrication process will be beneficial in understanding the content of this course. PD24 BUILDING LONG-TERM RELIABILITY IN PRINTED CIRCUIT BOARDS: EFFECTS OF MATERIALS, PLATING PROCESSES AND INNERLAYER TREATMENTS FOR LEADFREE ASSEMBLY REQUIREMENTS Monday, February 23 • 2:00 pm-5:00 pm Mike Carano, CIT, OM Group Electronic Chemicals, LLC Who hasn’t been affected by converting the printed board assembly process from solder-based materials to lead-free alloys? Understand the affects that higher assembly peak temperatures and longer dwell times have had on PCB reliability, and the importance of Tg, Td as it relates to laminate materials.Printed board materials, via formation quality, plating uniformity 24 www.IPCAPEXEXPO.org and innerlayer bonding treatments all combine to affect the reliability of the finished printed board. This course will provide insights into: lead-free surface finishes, the materials that should be used as opposed to conventional FR-4; how to drill, desmear and metalize higher performance materials; the factors that influence the lamination of multilayers and what can be done to improve the reliability of multilayer boards under lead-free assembly conditions; how various plating operations influence long-term reliability; and what fabricator/assembly engineers should know to enhance plated-through hole performance. Reliability testing including IST and HAST, and an overview of via filling materials and processes will also be presented. QUALITY, RELIABILITY AND TEST PD03 ELECTROCHEMICAL MIGRATION AND CONDUCTIVE ANODIC FILAMENT (CAF) FORMATION Sunday, February 22 • 9:00 am-12:00 pm Laura Turbini, International Reliability Consultant Electrochemical migration (ECM) is the movement of ionic species under the influence of a DC voltage. Discover the factors which affect ECM and the failure modes that it can produce. This course will cover test methods such as: surface insulation resistance (SIR), electrochemical migration (ECM) and a quantitative copper corrosion test. In addition, CAF formation, a special case of ECM, will be discussed in detail, and the chemistry of the filament will be explained as will the effect of processing chemicals and board design. PD18 COST CONSCIOUS TEST STRATEGIES FOR ELECTRONIC PRODUCTS Monday, February 23 • 9:00 am-12:00 pm Robert Hanson, Americom Seminars, Inc. This course will provide guidance for testing at the bare board and assembly levels. At the bare board level, learn effective strategies to test PCBs for opens, shorts & impedance quality as well as small via targets. Testing of high-density PCBs with BGA land patterns; and testing blind & buried vias will also be discussed. The course will also cover how vision is used to test for cracks, barrel deformations & copper fill. For testing at the assembly level, details will include no-clean solder paste, in-circuit test (ICT), bed-of-nails contamination, and vias under components with advantages/ disadvantages discussed. The purpose of 100% nodal visibility to the bottom of the board will be shared. This course will also cover the importance of the detection of the fault cause (solder, components, printing, chip shooting, cleaning & the human element) and how ICT must detect the fault, isolate the fault, and then define the fault cause. The course will help to explain why intelligent ICT is the best SPC tool in the factory. Information on what’s new in wireless fixtures, magnetic plate, capacitive plate & reverse diode testing, as well as how they work and what they can do for your company’s ICT test capability will be presented. Flying probe will be discussed, covering: speed, accuracy, capabilities, and testing BGA, CSP, TAB, FC, and COB components. PD20 QUALITY SYSTEM TOOLS, TECHNIQUES AND STRATEGIES TO PASS ANY AUDIT Monday, February 23 • 9:00 am-12:00 pm Steven Williams, Steve Williams Consulting Quality may be a given in today’s global environment, but few companies really understand how to leverage quality into a competitive advantage. Developing a world-class quality system that is both simple and effective is one of the most powerful tools your company can use to improve organizational performance, competitiveness and customer delight. Lessons learned from experience in manufacturing, engineering and quality management will be shared to provide a “blocking & tackling” blueprint for companies on how to use their quality system to create a competitive advantage by moving from customer satisfaction into the realm of customer delight. PD30 FAILURE ANALYSIS FOR IMPROVED RELIABILITY Thursday, February 26 • 9:00 am-12:00 pm Bhanu Sood, Center for Advanced Life Cycle Engineering Failure analysis is a vital tool used to ensure reliability of electronic products and systems throughout their product lifecycle. Today, organizations in the electronics supply chain are facing new challenges, not only from complex assembly styles, harsher lifecycle environments, and more sophisticated tools, but also from customers who are demanding a quicker turn-around. Unfortunately, root cause failure analysis is often performed incompletely, leading to a poor understanding of failure mechanisms and causes, and loss of resources and customers due to recurrence of failures. This course will discuss a range of topics, including root cause analysis, physics-of-failure principles and failure mechanisms in electronics. Specimen preparation techniques, non-destructive and destructive analysis, and materials characterization will also be covered. The first half of the course will present methodologies for identifying potential failure mechanisms in electronics based on the failure history and systematic approaches to root cause analysis. The latter half will cover failure analysis techniques geared toward various failure mechanisms, along with numerous failure analysis case studies that illustrate the techniques and analysis. Failure analysis case studies will be used to illustrate the techniques and analysis principles to arrive at the root cause(s) of field failures on printed boards, active components, and assemblies. 25 STANDARDS DEVELOPMENT MEETINGS Contribute to the industry standards and guidelines that your company, customers, suppliers and competitors rely on. These sessions are open to all attendees, unless noted otherwise. 5-22ARR J-STD-001/CONFORMAL Registration to attend committee meetings is complimentary before the show ($50 on-site). Take advantage of all the show has to offer with the All-Access Package. Register by January 30 and save 20%. Monday, February 23 5-21K IPC-SM-817 SMT ADHESIVE Chair: David Hillman, Rockwell Collins Vice Chair: Linda Woody, Lockheed Martin Missile & Fire Control The goal of the working group is to document the current state of the industry of conformal coating application on printed board assemblies. The project will look at the major conformal coating types (i.e. AR, ER, UR, SR, XY) and method of application (i.e. spray, dip, brush). The project will not evaluate individual companies or specific conformal coating products – only to do a “blind” documentation effort. Metallographic cross sectioning will be utilized for measurement of thickness and coverage. Tuesday, February 24 5-22AS SPACE ELECTRONIC Information is subject to change. Please visit www.IPCAPEXEXPO.org for the latest details. ASSEMBLY AND JOINING 5-11C ELECTRONIC ASSEMBLY ADHESIVES TASK GROUP Wednesday, February 25 Chair: Nate Grinvalds, Rockwell Collins This subcommittee will provide documentation and training content for the processes associated with adhesive bonding in electronics assembly operations. 5-20 ASSEMBLY & JOINING COMMITTEE Sunday, February 22 Chair: Leo Lambert, CID+, MIT, EPTAC Corporation Vice Chair: Renee Michalkiewicz, MIT, Trace Laboratories - Baltimore This is a planning meeting for the task group and subcommittee leaders of the Assembly and Joining Processes Committee. 5-21F BALL GRID ARRAY TASK GROUP 5-21H BOTTOM TERMINATION COMPONENTS (BTC) TASK GROUP Wednesday, February 25 Chairs: Ray Prasad, Ray Prasad Consultancy Group; Vern Solberg, Solberg Technical Consulting This task group will discuss potential updates to IPC-7093, Design and Assembly Process Implementation for Bottom Termination Components (BTCs). TASK GROUP Chair: Nate Grinvalds, Rockwell Collins This task group will be celebrating the release of a new revision of IPC-SM-817, which covers requirements and test methods for dielectric adhesives. 5-22A/7-31B SYNERGY MEETING - J-STD-001 & IPC-A-610 TASK GROUPS Saturday, February 21 5-21G FLIP CHIP MOUNTING Chairs: Daniel Foster, CIT, Missile Defense Agency; Constantino Gonzalez, MIT, ACME Training & Consulting; Mary Muller, Crane Aerospace & Electronics Vice Chair: Kathy Johnston, CIT, Raytheon Missile Systems The J-STD-001 and IPC-A-610 task groups will begin working on an Amendment to the Revision F documents. Wednesday, February 25 5-22AD REQUIREMENTS Wednesday, February 25 Chair: Ray Prasad, Ray Prasad Consultancy Group This task group will discuss potential updates to IPC-7095, Design and Assembly Process Implementation for BGAs. TASK GROUP Chair: Vern Solberg, Solberg Technical Consulting This task group is preparing revision A of IPC-7094, Design and Assembly Process Implementation for Flip Chip and Die Size Components. The group confirmed that the standard will not contain new packaging concepts of 2.5 and 3D package configurations. This will be addressed separately in IPC-7091. 26 www.IPCAPEXEXPO.org COATING MATERIAL & APPLICATION INDUSTRY ASSESSMENT FOR MILITARY SYSTEMS WORKING GROUP Sunday, February 22 Chair: Gary Latta, SAIC Vice Chair: Daniel Foster, CIT, Missile Defense Agency This group is developing content for soldering in military systems. ASSEMBLIES J-STD-001 ADDENDUM TASK GROUP Tuesday, February 24 Chair: Garry McGuire, CIT, NASA Marshall Space Flight Center Vice Chair: Kathy Johnston, CIT, Raytheon Missile Systems This task group will be celebrating the release of Space Electronic Hardware Addendum for revision F of J-STD-001, Requirements for Soldered Electrical and Electronic Assemblies. 5-22BT/7-31BT J-STD-001/ IPC-A-610 JOINT TECHNICAL TRAINING Tuesday, February 24 Chairs: Daniel Foster, CIT, Missile Defense Agency; Mary Muller, Crane Aerospace & Electronics Vice Chairs: Zenaida Vallanu, MIT, Celestica; Helena Pasquito, MIT, EPTAC Corporation The J-STD-001 and IPC-A-610 Technical Committees will discuss the training programs, lessons learned and potential improvements. 5-22F J-STD-001 HANDBOOK TASK GROUP Monday, February 23 Chair: Daniel Foster, CIT, Missile Defense Agency Vice Chair: Kathy Johnston, CIT, Raytheon Missile Systems This task group will be celebrating the release of IPC-HDBK-001F, Handbook and Guide to Supplement J-STD-001. 5-22H THERMAL PROFILING GUIDE TASK GROUP Monday, February 23 Chair: Ray Prasad, Ray Prasad Consultancy Group This committee will discuss updates to IPC 7530, Thermal Profiling Guide. 5-23A PRINTED CIRCUIT BOARD SOLDERABILITY SPECIFICATIONS TASK GROUP Monday, February 23 Chair: Gerard O’Brien, Solderability Testing & Solutions, Inc. Vice Chair: Michah Pledger, Pledger Consulting The task group is developing revision D of IPC J-STD-003, Solderability Tests for Printed Boards. 5-23B COMPONENT AND WIRE SOLDERABILITY SPECIFICATION TASK GROUP Monday, February 23 Chair: David Hillman, Rockwell Collins Vice Chair: Dennis Fritz, MacDermid, Inc. This group will discuss the ongoing round Robin Test S (found in the J-STD-002 document) to better define solder stencil aperture requirements. 27 STANDARDS DEVELOPMENT MEETINGS [CONTINUED] 5-24A FLUX SPECIFICATIONS TASK GROUP Tuesday, February 24 Chair: Brooke Sandy Smith, Indium Corporation This group will revise/update test methods applicable to J-STD-004. 5-24B SOLDER PASTE can be applied to the broad spectrum of optical cable and wiring harness design. This standard will be a collection of visual, mechanical, and performance quality acceptability requirements for fiber optic cable assemblies. ASSEMBLY EQUIPMENT TASK GROUP 5-45 REFLOW OVEN Chair: Karen Tellefsen Ph.D., Alpha Vice Chair: Beverley Christian Ph.D., BlackBerry This group is responsible for the maintenance of IPC J-STD-005, Requirements for Solder Paste and for IPC-HDBK-005, Guide to Solder Paste Assessment. This task group will continue reviewing the appropriate test methods applicable to J-STD-005. Monday, February 23 Wednesday, February 25 5-24C SOLDER ALLOY TASK GROUP Tuesday, February 24 Chair: Jennie Hwang Ph.D., Sc.D., H-Technologies Group Vice Chair: David Adams, Rockwell Collins This group is working on a new revision to IPC J-STD-006C, Requirements for Electronic Grade Solder Alloys and Fluxed and Non-Fluxed Solid Solders for Electronic Soldering Applications. 7-31BC IPC-A-610 TELECOM ADDENDUM Tuesday , February 24 Chair: Darren Dobson, Alcatel-Lucent This group will begin revisions of the IPC-A-610 Telecom Addendum. 7-31M FIBER OPTIC CABLE ACCEPTABILITY TASK GROUP Thursday, February 26 Chair: Robert Cooke, CIT, NASA Johnson Space Center This task group is responsible for the development and maintenance of the IPC-A-640, Requirements and Acceptance for Fiber Optic Cable Assemblies. This standard is intended to provide information on the general design and acceptance requirements for optical fiber, optical cable and hybrid wiring harness, and installation to the extent that they 28 www.IPCAPEXEXPO.org PROCESS CONTROL Chair: Linda Woody, Lockheed Martin Missile & Fire Control Vice Chair: Joseph Kane, BAE Systems Platform Solutions This subcommittee is responsible for the development and maintenance of IPC-7801, Reflow Oven Process Control Standard. BASE MATERIALS 3-11 LAMINATE/PREPREG MATERIALS SUBCOMMITTEE Monday, February 23 Chair: Tony Senese, Panasonic Electric Works Vice Chair: Doug Sober, Shengyi Technology Co. Ltd. This subcommittee finished the release of Amendment 1 to the IPC-4101D, Specification for Base Materials for Rigid and Multilayer Printed Boards. The subcommittee will be working on an Amendment 2 to IPC-4101D that will be in progress by the APEX EXPO 2015 meetings. It will primarily address proposed changes by the European Space Agency (ESA). 3-11F UL/CSA TASK GROUP Tuesday, February 24 Chair: Doug Sober, Shengyi Technology Co. Ltd. This task group addresses issues relative to UL’s standards on rigid (nonflexible) laminates (UL-746E) and on rigid (nonflexible) printed boards (UL-796). The technical issues will feed into the UL STP meeting on these two UL standards. 3-11G CORROSION OF METAL FINISHES TASK GROUP Thursday, February 26 Chair: Beverley Christian Ph.D., BlackBerry Vice Chair: Helen Holder, Hewlett-Packard Company This group is exploring and gathering data on the effects of corrosion on surface finishes through the use of mixed flowing gas (MFG) testing. Test facilities capable of running very high levels of hydrogen sulfide (≥1700 ppb) in conjunction with three other corrosive gases were located and the first cycle of round robin MFG testing was completed. In addition, the task group is also looking at Flowers of Sulfur (FoS) testing for both printed board surface finishes as well as component lead finishes. 3-12AMETALLIC FOIL TASK GROUP Tuesday, February 24 Chair: Rolland Savage, High Performance Copper Foil Inc. This group is generating a noncontact test method and is gathering data on copper foil surface roughness measurements for possible inclusion in revision B of IPC-4562, Metal Foil for Printed Board Applications. The task group is developing a test method as the procedure for measuring non-contact surface roughness, TM 2.2.22, which will be included in the IPC-TM-650 Test Methods Manual. 3-12D WOVEN GLASS REINFORCEMENT TASK GROUP Monday, February 23 Chair: Mike Bryant, BGF Industries Inc. Vice Chair: Douglas Eng, PPG Industries Inc. This task group recently completed the B revision of IPC-4412, Specification for Finished Fabric Woven from “E” Glass for Printed Boards. The group is proposing a substantive definition of the generically defined “spread glass” that is being requested from industry. The group is also proposing a test method to determine how “spread” is to be quantified with acceptable gauge R & R values. 3-12E BASE MATERIALS ROUNDTABLE TASK GROUP Monday, February 23 Chair: Edward Kelley, Isola Group SARL Vice Chair: Doug Sober, Shengyi Technology Co. Ltd. Using an open discussion format, this group will explore needed specifications and characterization methods for strategic materials used to manufacture laminates and prepregs. Discussions on reinforcements, resins, fillers and metal foils are anticipated and encouraged. CLEANING & COATING 5-31GSTENCIL CLEANING TASK GROUP Wednesday, February 25 Chair: Mike Bixenman DBA, Kyzen Corporation This task group will continue the maintenance of the guideline document, IPC-7526, Stencil and Misprinted Board Cleaning Handbook. 5-31J CLEANING COMPATIBILITY TASK GROUP Monday, February 23 Chair: Eddie Hofer, Rockwell Collins Vice Chair: Mike Bixenman DBA, Kyzen Corporation This task group will develop a standard test method to replace Mil-Std202G, Method 215K which does not accurately represent modern cleaning chemistries and the cleaning equipment advancements that are currently used within electronics assembly manufacturing processes. The new test method will determine the compatibility of cleaning agents and mechanical delivery systems with general electronics assemblies, component hardware, and electronics assembly materials. 29 STANDARDS DEVELOPMENT MEETINGS [CONTINUED] 5-32A ION CHROMATOGRAPHY/ 5-33A CONFORMAL COATING Monday, February 23 Wednesday, February 25 IONIC CONDUCTIVITY TASK GROUP Chair: John Radman, Trace Laboratories, Inc. Vice Chair: Joseph Russeau, Precision Analytical Laboratory, Inc. This task group is reviewing comments to test methods for ionic cleanliness testing. 5-32B SIR AND ELECTROCHEMICAL TASK GROUP Chair: John Waryold, HumiSeal Division of Chase Corporation Vice Chair: Debora Obitz, MIT, Microtek – East This task group is initiating a revision of the IPC-CC-830 conformal coating specification to revision C. MIGRATION TASK GROUP 5-33AUT ULTRA THIN COATINGS Chair: Keith Sellers, Trace Laboratories - Baltimore Vice Chairs: Graham Naisbitt, Gen3 Systems Limited; Russell Shepherd, MIT, Microtek Laboratories Anaheim This task group is working to complete IPC-9203, User Guideline for the IPC B-52 SIR Test Board. Wednesday, February 25 5-32C BARE BOARD CLEANLINESS 5-33AWG CONFORMAL COATING Wednesday, February 25 Wednesday, February 25 Chair: David Lober, Kyzen Corporation Vice Chair: Joseph Russeau, Precision Analytical Laboratory, Inc. This task group is working on the adoption of the IPC-5704 printed board cleanliness specification within the IPC6010 performance specifications. Chair: Douglas Pauls, Rockwell Collins Vice Chair: Jason Keeping, Celestica This group will work on the conformal coating sections of IPC-A-610 and J-STD-001. In addition the group will take up the topic of evaluating conformal coating for use environments. Monday, February 23 ASSESSMENT TASK GROUP 5-32E CONDUCTIVE ANODIC FILAMENT (CAF) TASK GROUP Tuesday, February 24 Chair: Douglas Pauls, Rockwell Collins Vice Chair: Debora Obitz, MIT, Microtek – East This group has just added the A revision of Test Method 2.6.25 into IPC-TM-650. The group is working on the B revision of IPC-9691, User Guide for the IPCTM-650, Method 2.6.25, Conductive Anodic Filament (CAF) Resistance Test (Electrochemical Migration Testing. 30 www.IPCAPEXEXPO.org WORKING GROUP Chair: Amanda Rickman, Raytheon Systems Company Vice Chair: Amy Hagnauer, Raytheon Company This working group is adding additional conformal coating types of the Ultra-thin designation. REQUIREMENTS WORKING GROUP ELECTRONIC DOCUMENTATION TECHNOLOGY 2-40 ELECTRONIC DOCUMENTATION TECHNOLOGY COMMITTEE Tuesday, February 24 Chair: Karen McConnell, CID, Northrop Grumman Corporation This committee is responsible for the electronic format for design and manufacturing information that represents the final product. The committee is working to establish intelligent electronic documentation that can be communicated between design and manufacturing. ELECTRONIC PRODUCT DATA DESCRIPTION 2-16 PRODUCT DATA DESCRIPTION (LAMINAR VIEW) SUBCOMMITTEE Monday, February 23 Chair: Karen McConnell, CID, Northrop Grumman Corporation This committee will make determinations on the testing methodologies being used to validate the newly released B revision of IPC-2581 as well as determine the need for future amendments or updates to enhance the usability of the descriptive capability of the file format. 2-18 SUPPLIER DECLARATION SUBCOMMITTEE Sunday, February 22 Chair: Forrest Christian, Innovation Machine Ltd. This subcommittee will review and discuss a revision to IPC-1751A. The revision will serve to better integrate the IPC-175x family of data exchange standards and align IPC’s materials declaration standard with the IEC 62474 materials declaration standard. 2-18B MATERIALS DECLARATION TASK GROUP Monday, February 23 Chairs: Mark Frimann, Texas Instruments Inc.; Aidan Turnbull Ph.D., ENVIRON UK Ltd. This task group will discuss changes to IPC-1752A. The standard allows for the exchange of information related to materials in products. The standard is part of the IPC 175x series of data exchange standards. 2-18F DECLARATION OF SHIPPING, PACK AND PACKING MATERIALS TASK GROUP Wednesday, February 25 Chairs: John Ciba Jr., Lee Wilmot, TTM Technologies, Inc. This committee will discuss revisions to IPC-1758 including the tracking of recycled content, reconciliation of differing EU lead in steel regulations, and promotion of the standard. 2-18H CONFLICT MINERALS DATA EXCHANGE TASK GROUP Thursday, February 26 Chairs: John Plyler; Aidan Turnbull Ph.D., ENVIRON UK Ltd. This task group will discuss revisions to IPC-1755, Conflict Minerals Data Exchange Standard which was developed to guide the exchange of supply chain data necessary for compliance with the Dodd-Frank conflict minerals regulation and OECD Due Diligence Guidelines for conflict minerals. The data standard is being developed as a part of the IPC-175x declaration family. 2-18J LABORATORY REPORT DECLARATION TASK GROUP Tuesday, February 24 Chair: William Haas, Seagate Technology LLC This task group recently published IPC1753, Laboratory Declaration Standard, a data exchange standard for laboratory chemical analysis reports between supply chain members. Companies are being asked to provide laboratory analytic data to show compliance with the RoHS Directive and other customer requirements, such as halogen-free. The task group will discuss any improvements needed. EMBEDDED DEVICES D-52 EMBEDDED COMPONENT MATERIALS SUBCOMMITTEE Wednesday, February 25 Chairs: Joel Peiffer, 3M Company; John Bauer, Rockwell Collins This subcommittee is being re-started to look at some possible changes to IPC4821, Specification for Embedded Passive Device Capacitor Materials for Rigid and Multilayer Printed Boards. It is believed that such changes are insufficient to term the document a revision, but are instead, sufficient for an Amendment 1. Discussions on these changes are set to begin in November/December 2014 and will take place via e-mail, teleconference or web conference. 31 STANDARDS DEVELOPMENT MEETINGS [CONTINUED] D-54 EMBEDDED DEVICES TEST 4-32 EQUIPMENT SAFETY Wednesday, February 25 Thursday, February 26 METHODS SUBCOMMITTEE Chair: Jan Obrzut Ph.D., NIST This subcommittee is being re-started to support work with the D-52 Embedded Component Materials Subcommittee and its amendment to IPC-4821, Specification for Embedded Passive Device Capacitor Materials for Rigid and Multilayer Printed Boards. This work is set to begin in November/December 2014 and will take place via e-mail and web conference. D-55 EMBEDDED DEVICES PROCESS IMPLEMENTATION SUBCOMMITTEE Tuesday, February 24 Chairs: Rajesh Kumar, Viasystems North America, Inc.; Vern Solberg, Solberg Technical Consulting This subcommittee will discuss IPC7092, Design and Assembly Process Implementation for Embedded Components, which describes the design and assembly challenges for implementing passive and active components in either formed or placed methodology inside a printed board. The new standard focuses on fabrication and assembly processes and identifies various board types. The subcommittee will review comments from industry circulation and prepare the draft for balloting. ENVIRONMENT, HEALTH & SAFETY (EHS) 4-30 ENVIRONMENT, HEALTH & SAFETY COMMITTEE Wednesday, February 25 Chair: Lee Wilmot, TTM Technologies, Inc. Vice Chair: Bret Bruhn, Viasystems Group, Inc. The EHS committee is responsible for promoting cleaner and safer electronics manufacturing worldwide. The committee will discuss global, legislative, and regulation issues affecting the electronics industry. 32 www.IPCAPEXEXPO.org SUBCOMMITTEE Chairs: Stefan Radloff, Intel Corporation; Lee Wilmot, TTM Technologies, Inc. This committee is developing a standard for equipment safety in the PCB/ electronics industry. Equipment users require some basic safety requirements for equipment, however, those requirements vary from customer to customer. The standard will establish a common set of safety expectations for equipment that will help ensure that safety is designed into equipment from the beginning and that custom requirements are minimized. 4-33 HALOGEN-FREE MATERIALS SUBCOMMITTEE Tuesday, February 24 Chair: Doug Sober, Shengyi Technology Co. Ltd. Europe has started a new round of restricted materials under ROHS 2, and is proposing some new restrictions to be placed upon the major brominated flame retardant, Tetra-Brominated bisPhenol A (TBBPA). To build a case for not restricting this proven safe and effective laminate and prepreg flame retardant, the subcommittee is gathering cost (both financial as well as timing) data to refute the currently held position by some in Europe that eliminating TBBPA and replacing it with non-halogenated flame retardant will be cost neutral. 4-34B MARKING, SYMBOLS AND LABELS FOR IDENTIFICATION OF ASSEMBLIES, COMPONENTS AND DEVICES TASK GROUP Monday, February 23 Chairs: Stephen Tisdale, Intel Corporation; Lee Wilmot, TTM Technologies, Inc. With the transition to a variety of lead-free solders and the use of tim-lead solders in certain end-use applications, labeling of printed board properties is increasingly important in PCB manufacturing and assembly, OEM manufacturing, rework and repair of printed circuit board assemblies and end-of-life disposition (recycling or disposal). This combined working group of IPC and JEDEC will discuss further enhancements to IPC/JEDEC J-STD-609A, Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Pb-Free and Other Attributes. 4-35CN CORPORATE SOCIAL RESPONSIBILITY AND SUSTAINABILITY IN THE SUPPLY CHAIN IN CHINA SUBCOMMITTEE Tuesday, February 24 Chair: Peter Zhou Ph.D., Huawei Technologies Co., Ltd. Vice Chair: Bruce Klafter, Flextronics International This subcommittee is developing a standard for manufacturers in China which will allow them to demonstrate that their supply chain members are socially responsible and adhere to a code that promotes sustainability. FABRICATION PROCESSES 4-14 PLATING PROCESSES SUBCOMMITTEE Wednesday, February 25 Chairs: George Milad, Uyemura International Corp.; Gerard O’Brien, Solderability Testing & Solutions, Inc. This subcommittee develops guidelines, test methods and techniques for evaluating process control parameters on electrolytic and electroless/immersion plating. The subcommittee is working on revision A of IPC-4552, Specification for Electroless Nickel/Immersion Gold (ENIG) Plating for Printed Circuit Boards. FLEXIBLE AND RIGID-FLEX PRINTED BOARDS D-11 FLEXIBLE CIRCUITS DESIGN SUBCOMMITTEE Wednesday, February 25 Chair: William Ortloff Sr., Raytheon Company Vice Chair: Mark Finstad, CID, Flexible Circuit Technologies, Inc. This subcommittee is working on revision D of the IPC-2223 flexible and rigid-flex printed board design standard. D-12 FLEXIBLE CIRCUITS SPECIFICATIONS SUBCOMMITTEE Wednesday, February 25 D-13 FLEXIBLE CIRCUITS BASE MATERIALS SUBCOMMITTEE Wednesday, February 25 Chair: Clark Webster, ALL Flex LLC Vice Chair: Michael Beauchesne, Amphenol Printed Circuits, Inc. The subcommittee has successfully released the A revisions of all three flexible circuits base materials documents, IPC-4202, IPC-4203 and IPC4204. In addition to adding amendments to these materials documents, the subcommittee is revising IPC-FC-234, PSA Assembly Guidelines for SingleSided and Double-Sided Flexible Printed Circuits to its A revision. D-15 FLEXIBLE CIRCUITS TEST METHODS SUBCOMMITTEE Wednesday, February 25 Chairs: Rocky Hilburn, Insulectro; Duane Mahnke, DBMahnke Consulting This subcommittee provides test methods required by other subcommittees within the D-10 Flexible Circuits Committee. IPC-TM-650, Test Methods Manual, which is defined in all flexible circuits committee documents, will be examined in detail for applicability and need for replacement or revision. Also, any test methods specified in new flexible circuitry documents will be generated by this subcommittee. HIGH SPEED/HIGH FREQUENCY INTERCONNECTIONS D-21 HIGH SPEED/HIGH FREQUENCY DESIGN SUBCOMMITTEE Monday, February 23 Chair: Scott Bowles, L-3 Fuzing and Ordnance Systems Vice Chairs: Dana Korf, Huawei Technologies Co., Ltd.; Christopher Olson, CIT, Rockwell Collins This subcommittee is developing IPC2228, a new design standard for high speed/high frequency printed boards. Chair: Nick Koop, CID, TTM Technologies Vice Chair: Mahendra Gandhi, Northrop Grumman Aerospace Systems This subcommittee is working on IPC6013D, Qualification and Performance Specification for Flexible Printed Boards. 33 STANDARDS DEVELOPMENT MEETINGS [CONTINUED] D-22 HIGH SPEED/HIGH FREQUENCY BOARD PERFORMANCE SUBCOMMITTEE Wednesday, February 25 Chair: Lance Auer, Raytheon Missile Systems Vice Chair: Mahendra Gandhi, Northrop Grumman Aerospace Systems This subcommittee is developing revision C to IPC-6018, Qualification and Performance Specification for High Frequency (Microwave) Printed Boards. D-23 HIGH SPEED/HIGH FREQUENCY BASE MATERIALS SUBCOMMITTEE Wednesday, February 25 Chair: Edward Sandor, Taconic Advanced Dielectric Division Vice Chair: Dan Welch, Arlon Materials for Electronics This subcommittee, having released IPC4103A with Amendment 1, Specification for Base Materials for High Speed/High Frequency Applications, is discussing the B revision of this document. D-24A TDR TEST METHODS TASK GROUP Tuesday, February 24 Chair: Louis Hart Ph.D., CIT, Compunetics Inc. Vice Chairs: Don DeGroot, CCN; Eugene Mayevskiy, TE Connectivity This task group is validating IPC-TM-650, Method 2.5.5.7B for impedance testing of lines on printed boards. D-24B BERESKIN TEST METHOD TASK GROUP Tuesday, February 24 Chair: Philip Johnson, Isola Laminate Systems This task group is developing a new test method (Bereskin) to obtain Dk and Df values over frequency for microwave materials. D-24C HIGH FREQUENCY TEST METHODS TASK GROUP: FREQUENCYDOMAIN METHODS Tuesday, February 24 Chair: Glenn Oliver, DuPont Vice Chair: John Coonrod, Rogers Corporation This task group monitors the needs of the microelectronics industry for high frequency dielectric test methods. INTELLECTUAL PROPERTY SUBCOMMITTEE Monday, February 23 Chairs: Rajesh Kumar, Viasystems North America, Inc.; Michael Moisan, TTM Technologies This subcommittee will use lessons learned from field applications of IPC1071A, Intellectual Property Protection in Printed Board Fabrication to begin preparation of IPC-1071B. E-30 CONFLICT MINERALS DUE DILIGENCE COMMITTEE Thursday, February 26 8-41 TECHNOLOGY ROADMAP Chairs: David Carnevale, Dolby Laboratories; John Ciba Jr. This committee will discuss the IPC1081 “Conflict Minerals Due Diligence Guidance” white paper, which will assist the electronics industry in complying with due diligence requirements for conflict minerals under Section 1502 of the Dodd-Frank Act. Thursday, February 26 G-10 IPC GOVERNMENT RELATIONS MANAGEMENT SUBCOMMITTEE Chairs: Mike Carano, CIT, OM Group Electronic Chemicals, LLC; John Fisher, Interconnect Technology Analysis, Inc. This subcommittee will discuss areas of expansion and improvements in both methodology and content for the 2017 IPC International Technology Roadmap. CCC COMMITTEE CHAIRMAN COMMITTEE MEETING (BY INVITATION) Tuesday, February 24 Chair: Bhawnesh Mathur, Creation Technologies Vice Chair: Raymond Sharpe, Isola Group SARL This is a closed meeting of the IPC government relations committee. COUNCIL (BY INVITATION) SPVC IPC SOLDER PRODUCTS Chair: David Bergman, IPC This meeting of all task group, subcommittee and committee chairs is for general committee updates and discussion of IPC technical programs. Tuesday, February 24 Sunday, February 22 VALUE COUNCIL E-21 EMS INTELLECTUAL Chair: Karl Seelig, AIM, Inc. The Solder Products Value Council’s objective is to identify and execute programs designed to enhance the competitive position of solder manufacturers and their customers. Monday, February 23 TAEC TECHNICAL PROPERTY SUBCOMMITTEE Chair: Ben Lee, Cisco Systems This subcommittee is working on IPC1072, Intellectual Property protection in Assembly Manufacturing. 34 www.IPCAPEXEXPO.org E-22 PRINTED BOARD FAB ACTIVITIES EXECUTIVE COMMITTEE (BY INVITATION) Monday, February 23 Chair: Renee Michalkiewicz, MIT, Trace Laboratories - Baltimore This committee comprises leaders of all IPC general committees and oversees IPC’s standardization efforts. PACKAGED ELECTRONIC COMPONENTS B-10A/JEDEC JOINT MEETING — PLASTIC CHIP CARRIER CRACKING TASK GROUP AND JEDEC JC-14.1 Tuesday, February 24 Chair: Steven Martell, Sonoscan Inc. During this joint meeting, these groups will continue discussions on revising IPC/JEDEC J-STD-020, Moisture/ Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices, J-STD-033, Standard for Handling, Packing, Shipping, and Use of Moisture/Reflow Sensitive Surface Mount Devices, and J-STD-075, Classification of Non-IC Electronic Components for Assembly Processes. B-11 3-D ELECTRONIC PACKAGES SUBCOMMITTEE Wednesday, February 25 Chairs: Dudi Amir, Intel Corporation; Vern Solberg, Solberg Technical Consulting This subcommittee will discuss the development of a new standard, IPC-7091 which will detail current 2.5D and 3D packages, such as Package on Package (PoP) or System in Package (SiP), their applications, technologies developed for processing and assembly, metallization techniques and the design rules established for via hole size, via hole spacing and circuit routing principles established for these packages. PRINTED BOARD DESIGN TECHNOLOGY 1-10B CURRENT CARRYING CAPACITY TASK GROUP Monday, February 23 Chair: Michael Jouppi, Lockheed Martin This task group is revising IPC-2152 for sizing internal and external conductors; and will discuss high current, microvias, parallel conductors and other potential topics of revision. 35 STANDARDS DEVELOPMENT MEETINGS [CONTINUED] 1-10C TEST COUPON AND ARTWORK GENERATION TASK GROUP Monday, February 23 Chair: Timothy Estes, Conductor Analysis Technologies, Inc. Vice Chair: Philip Henault, Raytheon Company This task group maintains test coupon designs referenced in IPC-2221 and IPC-6010 specifications. The task group is evaluating the need for new coupon designs, including CAF and modifications to the A/B-R design. 1-13/5-21A JOINT MEETING —LAND PATTERN SUBCOMMITTEE AND IPC7070 TASK GROUP Wednesday, February 25 Chairs: Thomas Hausherr, CID+, CIT, PCB Libraries; Karen McConnell, CID, Northrop Grumman Corporation; Rainer Taube, MIT, Taube Electronic GmbH Vice Chair: Gary Ferrari, CID+, FTG Circuits This joint committee is reformatting and updating the information in two IPC standards, IPC-7351 and IPC-7070. IPC7070 addresses manufacturing issues while IPC-7351 addresses land pattern standardization and development. The intent is to provide best practices in both design and assembly. 1-14DFX 1-14 DFX STANDARDS COMMITTEE Tuesday, February 24 Chairs: Karen McConnell, CID, Northrop Grumman Corporation; Cheryl Tulkoff CRE, DfR Solutions This committee will discuss development of a DFM guideline, IPC-2231, Design for Manufacturing (DFM) Guideline for the Printed Board Design Cycle. D-31B IPC-2221/2222 TASK GROUP Tuesday, February 24 Chair: Gary Ferrari, CID+, FTG Circuits Vice Chair: Clifford Maddox, Boeing Company This task group is working on IPC-2221C, Generic Standard on Printed Board Design. 36 www.IPCAPEXEXPO.org PRINTED ELECTRONICS D-61 PRINTED ELECTRONICS DESIGN SUBCOMMITTEE Monday, February 23 Chairs: Daniel Gamota, Printovate Technologies, Inc.; Jie Zhang PhD, Institute of Materials Research & Engineering (IMRE) The subcommittee will focus on updating IPC/JPCA-2291, Design Guidelines for Printed Electronics. D-62 PRINTED ELECTRONICS BASE MATERIAL/SUBSTRATES SUBCOMMITTEE Monday, February 23 Chairs: Daniel Gamota, Printovate Technologies, Inc.; Scott Gordon, DuPont Teijin Films The subcommittee will continue to gather input for revision A of IPC/ JPCA 4921, Requirements for Printed Electronics Base Materials. D-63 PRINTED ELECTRONICS FUNCTIONAL MATERIALS SUBCOMMITTEE Monday, February 23 Chair: Josh Goldberg, Taiyo America Inc. Vice Chair: Daniel Gamota, Printovate Technologies, Inc. The subcommittee will review lessons learned on release of IPC-4591, Requirements for Printed Electronics Functional Materials and begin collecting data for expansion and eventual revision A. D-64 PRINTED ELECTRONICS FINAL ASSEMBLY SUBCOMMITTEE Tuesday, February 24 Chair: Daniel Gamota, Printovate Technologies, Inc. The subcommittee will focus on reviewing and expanding a working draft of IPC-6901, Performance Requirements for Printed Electronics Assemblies. D-65 PRINTED ELECTRONICS TEST METHOD DEVELOPMENT AND VALIDATION SUBCOMMITTEE Tuesday, February 24 Chairs: Daniel Gamota, Printovate Technologies, Inc.; Weifeng Liu Ph.D., Flextronics International This subcommittee will review candidate test methods for TM-650. D-66 PRINTED ELECTRONICS PROCESSES SUBCOMMITTEE Tuesday, February 24 Chairs: Hirofumi Matsumoto, Nippon Mektron, Ltd.; Kurt Schroder, Novacentrix The subcommittee will focus on developing a draft of IPC-6901, Performance Requirements for Printed Electronics Assemblies. PROCESS CONTROL 7-23 ASSEMBLY PROCESS EFFECTS HANDBOOK SUBCOMMITTEE Monday, February 23 Chairs: Greg Hurst, RSI, Inc.; Sharon Ventress, U.S. Army Aviation & Missile Command This committee will concentrate on completion of a companion document to the modification and repair document, IPC-7711/7721. The new process effects or troubleshooting guide will have a similar focus for process effects related to the assembly (IPC-9111). The handbook provides assembly anomaly illustrations with possible cause and solution explanations. 7-24 PRINTED BOARD PROCESS EFFECTS HANDBOOK SUBCOMMITTEE Monday, February 23 Chairs: Mike Carano, CIT, OM Group Electronic Chemicals, LLC; Dennis Fritz, MacDermid, Inc. This subcommittee will concentrate on completion of a companion document to the modification and repair document, IPC-7711/7721. The new process effects or troubleshooting guide will have a similar focus for process effects related to the printed board (new document IPC-9121). Based on user input, the new format for the handbook will provide printed board anomaly illustrations with possible cause and solution explanations and will be more closely tied to IPC-A-600 acceptability criteria. PRODUCT ASSURANCE 7-30 PRODUCT ASSURANCE COMMITTEE Monday, February 23 Chair: Mel Parrish, STI Electronics, Inc. Vice Chair: Mike Hill, CIT, Viasystems Group, Inc. This is a planning meeting for all task group and subcommittee leaders of the Product Assurance Committee. 7-31F IPC/WHMA-A-620 TASK GROUP Monday, February 23 Chairs: Brett Miller, USA Harness, Inc.; Richard Rumas, CIT, Honeywell Canada Vice Chair: Dave Scidmore, Unlimited Services, Inc. This task group will continue working on a new revision of IPC/WHMA-A-620, Requirements and Acceptance for Cable and Wire Harness Assemblies. 7-31FT IPC/WHMA-A-620 TECHNICAL TRAINING TASK GROUP Thursday, February 26 Chair: Debbie Wade, Advanced Rework Technology - A.R.T. Vice Chair: Gregg Owens, Space Exploration Technologies The IPC-A-620 Training and Certification Technical Review Committee oversees and updates the technical content of the Certification Program to the joint IPC/ WHMA standard on requirements and acceptance for cable and Wire Harness Assemblies. 37 STANDARDS DEVELOPMENT MEETINGS [CONTINUED] 7-31H/7-31K JOINT MEETING — IPC-HDBK-620 HANDBOOK AND WIRE HARNESS DESIGN TASK GROUPS Wednesday, February 25 Chairs: Robert Cooke, CIT, NASA Johnson Space Center; Brett Miller, USA Harness, Inc. Vice Chair: Christopher Olson, CIT, Minnesota Wire and Cable Co These two task groups have combined to make wire harness design and wire harness handbook documents. This meeting will continue the discussion on the content of IPC-D-620, Design Requirements for Cable and Wiring Harnesses. 7-31J REQUIREMENTS FOR STRUCTURAL ENCLOSURE TASK GROUP Tuesday, February 24 Chairs: Richard Rumas, Honeywell Canada; Eddie Hofer, Rockwell Collins This task group will discuss revisions to IPC-HDBK-630, Guidelines for Design, Manufacture, Inspection and Testing of Electronic Enclosures. 7-32C ELECTRICAL CONTINUITY TESTING TASK GROUP Monday, February 23 Chair: Mike Hill, CIT, Viasystems Group, Inc. This task group will discuss goals for a B revision of IPC-9252, Requirements for Electrical Testing of Unpopulated Printed Boards. 7-34 REPAIRABILITY SUBCOMMITTEE Tuesday, February 24 Chair: Daniel Foster, CIT, Missile Defense Agency Vice Chair: Bruce Hughes, Amrdec MS&T EPPT This subcommittee oversees all repair and modification standards activity. This meeting will be to kick-off the IPC-A7711B/7721B for revision C. 38 www.IPCAPEXEXPO.org PRODUCT RELIABILITY 6-10C PLATED-THROUGH VIA RELIABILITY-ACCELERATED TEST METHODS TASK GROUP Tuesday, February 24 Chair: Randy Reed, Viasystems Group, Inc. This task group is validating the new IPC-TM-650, Method 2.3.25, Capacitance of Printed Board Substrates After Exposure to Assembly, Rework, and/or Reliability Tests. 6-10D SMT ATTACHMENT RELIABILITY TEST METHODS TASK GROUP Tuesday, February 24 Chair: Reza Ghaffarian Ph.D., Jet Propulsion Laboratory Vice Chair: Vasu Vasudevan, Intel Corporation This task group develops and maintains surface mount reliability standards within the IPC-9700 series. D-35 PRINTED BOARD STORAGE 7-12 MICROSECTION Monday, February 23 Wednesday, February 25 AND HANDLING SUBCOMMITTEE Chair: Joseph Kane, BAE Systems Platform Solutions Vice Chair: Don Dupriest, Lockheed Martin Missiles & Fire Control This subcommittee is reviewing content for the A revision of IPC-1601, Printed Board Handling and Storage Guidelines. D-36 PRINTED BOARD PROCESS CAPABILITY, QUALITY AND RELATIVE RELIABILITY BENCHMARK TEST SUBCOMMITTEE Monday, February 23 Chair: Gary Long, Intel Corporation This subcommittee has developed a database for benchmarking printed board fabrication capability, quality and relative reliability. It maintains a family of process capability panel designs and standards for use by both subscribers and suppliers. This subcommittee meeting is open to all interested parties. Wednesday, February 25 Chair: John Davignon, Davignon Consultancy, LLC This subcommittee has developed IPC9641, High Temperature Printed Board Flatness Guideline, and is seeking industry feedback for a revision effort. RIGID PRINTED BOARDS 7-31A/D-33A JOINT MEETING — 2-30 TERMS AND DEFINITIONS COMMITTEE Sunday, February 22 Chairs: Steven Bowles, CIT, Viasystems Group, Inc.; Vicka Hammill, Honeywell Inc. Air Transport Systems This committee is working on revision N of the IPC-T-50 terms and definitions standard. TESTING IPC-A-600 AND IPC-6012 TASK GROUPS 7-11 TEST METHODS SUBCOMMITTEE Chairs: Mark Buechner, BAE Systems; Randy Reed, Viasystems Group, Inc. These task groups are completing work on IPC-A-600J and IPC-6012D. Chair: Joseph Russeau, Precision Analytical Laboratory, Inc. Vice Chair: Debora Obitz, MIT, Microtek – East This subcommittee meets to review, validate and approve new or revised IPC-TM-650 Test Methods. Sunday, February 22 Chair: Russell Shepherd, MIT, Microtek Laboratories Anaheim Vice Chair: Randy Reed, Viasystems Group, Inc. This task group is developing a new IPCTM-650 Method 2.1.1.3 for microsection preparation and evaluation of microvia structures, including stacked, staggered, blind and buried structures. UL-STP UL STP COMMITTEE (BY INVITATION) Friday, February 27 Chair: Bradley Schmidt, UL LLC This meeting of the Standards Technical Panel (STP), the official voting body for four UL Standards: UL 746E, UL 796, UL 746F and UL 796F, will provide STP members with additional information on proposed technical changes to one or more of the four UL standards. EXTRAS TERMS AND DEFINITIONS 6-11 PRINTED BOARD COPLANARITY SUBCOMMITTEE SUBCOMMITTEE 8-70 COALITION FOR ADVANCEMENT OF MICROELECTRONIC SYSTEMS TECHNOLOGY (CAMEST) Thursday, February 26 Chair: Dennis Fritz, MacDermid, Inc. This IPC-independent group is working toward publishing a technology gap analysis including multi-device package structures and serving as a forum for the identification and resolution of near-term technical operational issues. Tuesday, February 24 39 REGISTRATION OPTIONS Visit www.IPCAPEXEXPO.org to sign up today! Standards Development Committee Meetings* Register by January 30, 2015 and SAVE 20% Committee Meetings Plus Conference Group Discount: Register 4 colleagues from the same company location, at the same time and deduct $100 from each registration. Exhibit Hall Only: Includes admission to the exhibit hall and event essentials. Complimentary ($50 on-site) ALL-ACCESS PACKAGE •Standards development committee meetings •Your choice of up to five half-days of professional development courses • Event essentials* $785 $660 $195 $175 Includes standards development committee meetings, IPC luncheons (Mon., Tues. and Wed.) and show floor concession cash (on Thursday). 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