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Page 1
Dr.Friedrich-Wilhelm Wulfert
New Product Introduction
Development Support Center
MOTOROLA SPS Quality, München
ITG FB 8.5
Qualität und Zuverlässigkeit bei kleinen Geometrien
Oberammergau, 7.- 8. Mai, 2002
FWW — New Product Introduction
Development Support Center — SPS Quality Munich
ITG-Oberammergau, May 7-8, '02
Page 2
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FWW — New Product Introduction
Development Support Center — SPS Quality Munich
ITG-Oberammergau, May 7-8, '02
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Page 5
([DPSOHRI'(/7$$QDO\VLVDQG52$VVHVVPHQW(cont.)
DSSOLFDWLRQ
window lift
standard
airbag
GHVLJQ
IDESURFHVV
DVV\SURFHVV
manufacturability
processability
std. library
Hyperintegration
change
during
development
new cells
on product
digital
+ analog + NVM
std. HCMOS, 5V
+ high voltage
+ mixed signal
+ large EE
or ROM
HT
HAST
interdielectric
+ analog stability
characterization
HTOL
die size
passivation/overcoat
interconnects
+ integrity
package
1st and 2nd bond
phys. & chem.
material match
modelling
+ MSL3/245°C
EE
ROM
JSTD020A
+ customer
+ glueability
supplier
+ customer
std. SOIC28W
leadframe
mold compound
Page 6
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product
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AEC baseline + custom confirmation
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process
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digital
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##
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NVM
voltage
regulator
M
M I/O periphery
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data EE
M
M
A
latch-up robustness
A
array size
array size
A
A
program EE
array size
A
program EE
program/erase
and data retention
##
M
Vout
OK
Qualified by similarity
Vout +/-5%
+/-10%
Tj=125C
1008hrs
>100mA@hot 100mA@room
qualified by identity
qualified by similarity
Yield of
N >> n array
?
?
OK
OK
A
##
over 15 yrs
7use/time
L
L
/
No action: qualified
M
L
0
Characterize Vout:
HTOL, HTRB
+
Perform latch-up on first silicon
/
/
No action: qualified,
functional parts ready-for-use
H
H
L
H
L
L
M
M
L
0
Model/evaluate yield
?
M
H
L
+
Get 7use profile from customer
?
?
L
L
M
H
L
L
0
Review assembly rules and l/f design
+
Review assembly rules and l/f design
n array
7use profile
L
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Packaging
##
##
Board Assembly
SMDxyz
M die / flag size
length
A
width
A
Tambient, Tjunction
Tj = Ta + P x ThetaJA
X>x
Y>y
x
y
TC
TC
Ta = 125C
and Tj < 150C
?
H
H
H
+
220C
H
H
H
+
In-depth MSL/Temp evaluation
-40/150C
-40/150C
Define thermal capabilities of 60'xyz
and operating conditions of application(s)
Tj=f(Ta, P, ...),
Tj < 150C
M
245C Reflow
M
solder
temperature
resistance
package top surface
temperature
B
245C
245C @
package top
M
package
integrity
moisture sensitivity
level
A
MSL3
MSL1 for pre-conditioning per J-STD020A but
reflow @ 245C
smaller die
H
H
H
+
In-depth MSL/Temp evaluation
245C @
package top
W
package
integrity
moisture sensitivity
level
A
MSL1
MSL1 for pre-conditioning per J-STD020A but
reflow @ 245C
smaller die
M
M
M
0
In-depth MSL/Temp evaluation
SMDxyz
A
##
Importance:
M = Must; W = Want
type A: product parameter
type B: process parameter
Risk-Level: L = low; M = medium; H = high; N = not relevant;
U = unacceptable; ? = unknown;
++ = Opportunity
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Page 7
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This example shows the progress of the incremental product development and inherent
qualification from planning through release of a complex large die in a standard package and how
the Risk & Opportunity Assessment Process (ROAP) helped to create awareness of existing
challenges together with listing and keeping track of achieved items and performance ready for
exploitation of these identified opportunities (see in the "We-Know-Matrix" risk logs) in the
aimed at automotive market segment with its typical set of AEC (Automotive Engineering Council)
defined requirements plus known customer or application specific add-ons (refer to ## in the
below shown WKM of the INITIAL ROAP @ Planning, i.e. Fig. A,,.3.1).
A cross-functional expert team including customer counterparts was built and contributed to an
initial WKM at the begin of the product and qualification planning phase (Fig. A ,,.3.1). The
customer had set tough boundary conditions requesting a specific small SMD package for the
relatively large die (##). In addition there were some requirements going beyond package and
cell design rules of already existing products of the same and already qualified mixed technology
(##). Certain product features like the size of the EE Program Array and the stability of the
Voltage Regulator needed attention from manufacturing yield point of view respectively for the
electrical performance capability. The expected operation at elevated temperatures initiated
detailed collection of working conditions for the applications. Customer input of the automotive
systems’ mission-profiles was mandatory at this point in time (##).
From begin on the main activities, however, resulted from requirements in the area of package
manufacturability and processability. Assembly rules and leadframe design needed reassessment for packaging that large die into the customer requested and relatively small plastic
body. Related in-depth evaluations were undertaken to confirm compliance with customers’ board
soldering process needs of MSL3/245C and to prove market specific board-level processability
and reliability requirements are fulfilled (##).
F.W.Wulfert - NPI Quality MUC
Motorola SPS
Page 8
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##
M
process
M
voltage
regulator
M I/O periphery
M program array
data EE
M
Vout
A
Vout +/-5%
>100mA@hot
Vout +/-5%
>125mA@hot
A
array size
A
Qualified by identity
array size
A
Qualified by similarity
Yield of
N >> n
EE array size
A
M program EE
EE W/E and D/R
A
functionality
A
length
A
width
A
X>x
Y>y
B
no delamination
B
> 1mil
B
no crack
x
y
?
?
?
Tambient, Tjunction Tj =
Ta + P x ThetaJA
A
Ta=125C
and Tj < 150C
Ta = 85C at
limited load
package top surface
temperature
B
245C
245C
moisture sensitivity level
A
MSL3 @
245C
MSL1 @
245C
MSL3 @
245C
MSL3 @
245C
higher
shear force
too low
shear force
M
Tj=125C
product
1008hrs
+/- 125mA @ Tj=125C
latch-up robustness
M program EE
Development &
NEW ITEM early samples
Qualified by similarity
B
OK
L
L
/
No action: qualified
OK
OK
OK
OK
L
L
L
/
Passed requirements
L
L
/
Passed requirements
/
No action: qualified
L
L
L
L
over 15 yrs
reduced customer specification
7use/time
##
(ROM + data EE) parts ready-for-use
L
L
L
/
Meets targets
and passes requirements
W/E +
D/R bake
M
M
L
0
Interim readouts show zero failures,
finalize extended D/R bake
(OK)
L
/
"Reduced Spec" parts fit-for-use
OK
OK
?
?
?
L
L
M
H
H
L
L
M
H
H
L
L
M
L
L
/
Leadframe modifications successful
/
Leadframe modifications successful
0
Review capabilities, do rel tests
+
Review capabilities, adjust tools
+
Review capabilites, adjust tools
OK
H
L
L
+
Specify maximum Tj < 150C and
outline thermal limitations
##
in application note.
M
L
0
Successfully processed MSL3/245C.
Customer oven profile has to be
monitored.
L
L
/
Development work finalized
@ MSL3/245C.
##
##
n array
7use profile
/
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Packaging
##
SMDxyz
M trim & form
lead/plastic adhesion
M wire dressing wire-to-edge clearance
M 2nd bond
heel integrity
NEW ITEM
NEW ITEM
NEW ITEM
Tj=f(Ta, P, ...),
Tj < 150C
Board Assembly
##
NEW ITEM
M die / flag size
M
SMDxyz
SOIC Reflow
M solder profile
245C @
package top
M
package
integrity
245C @
package top
W
package
integrity
moisture sensitivity level
A
Glueability
M
mold
compound
surface cleanliness
A
Importance:
M = Must; W = Want
type A: product parameter
type B: process parameter
TC
TC
-40/150C
-40/150C
THB, TC, lead pull, etc.
bonder capability
wire pull
pull force
operation
power
dissipation
pre-conditioning per J-STD020A but
reflow @ 245C
pre-conditioning per J-STD020A but
reflow @ 245C
shear force
F Newton
?
H
U
H
8
MSL1/245C needs material
and process changes.
H
M
N
+
Bind mold compound supplier into
development work, do experiments.
Risk-Level: L = low; M = medium; H = high; N = not relevant;
U = unacceptable; ? = unknown;
++ = Opportunity
##
Page 9
Another WKM sheet is outlining the situation in course of development (Fig. A ,,.3.2) and
includes NEW ITEMS that surfaced during day-to-day progress (##). First functional silicon was
successfully characterized and found acceptable per a reduced customer specification (##).
That enabled early use of new product taking account of existing and clearly documented
limitations. New items of interest and concern surfaced during the development phase and were
added to the WKM which is a living document reflecting status and changes all along the new
product creation process. The power density issue was clarified together with the customer and
limiting the maximum dissipation during device operation and excluding all power stages are ON
at the same time. With this boundary condition Tj < 150C could be reliably achieved. The
relationship of Tj=Ta + P x ThetaJa was initiated to be detailed in an application note outlining
these products’ thermal limitations (##). "Glueability" needs made it necessary to bring the mold
compound supplier into the team and have him perform development work to fulfil customer
board assembly needs (##). Effort for customer’s WANT of MSL1/245C was abandoned and
ranked "8nacceptable" after finding out that the actual material set was capable of only
The
customer
took
measures
for
MSL3
handling
and
MSL3/245C
(##).
measured/adjusted/monitored the oven profile of his convection line. Both the solder joint and the
package top surface temperature are recorded for components using some volume of similarly
populated printed circuit boards (##).
F.W.Wulfert - NPI Quality MUC
Motorola SPS
Page 10
:H.QRZ0DWUL[
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12
13
14
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L
L
L
L
L
L
/
product released
/
product released
OK
L
L
/
No action: qualified
OK
OK
OK
OK
L
L
L
/
Passes requirements
L
L
L
L
Passes requirements
/
No action: qualified
L
L
L
/
/
L
L
L
/
(ROM + data EE) in field application
Meets targets
and passes requirements
W/E +
D/R bake
L
L
L
/
OK
OK
OK
OK
OK
OK
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
/
Leadframe modifications successful
/
Leadframe modifications successful
/
Monitor during ramp-up
/
Monitor during ramp-up
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early samples
M
process
M
voltage
regulator
Vout
B
M I/O periphery
M program array
data EE
M
latch-up robustness
B
array size
B
array size
B
M program EE
EE array size
B
M program EE
EE W/E and D/R
B
functionality
A
length
B
M
Qualified by similarity
B
product
Vout +/-5%
Vout +/-5%
>100mA@hot >125mA@hot
Tj=125C
1008hrs
+/- 125mA @ Tj=125C
Qualified by similarity
85
alified by similar
Yield of
N >> n
n array
7use profile
over 15 yrs
7use/time
reduced customer specification
Passes requirements
SMDxyz
M die / flag size
width
M trim & form
lead/plastic adhesion
M wire dressing wire-to-edge clearance
M 2nd bond
heel integrity
Tj=f(Ta, P, ...),
Tj < 150C
Board Assembly
SOIC Reflow
245C @
package top
M
SMDxyz
M solder profile
x
y
-40/150C
no delam
THB, TC, lead pull, etc.
> 1mil
> 1mil
bonder capability
B
no crack
no crack
B
Ta=125C
and Tj < 150C
Ta = 125C at
limited load
package top surface
temperature
B
245C
245C
MSL3 @
245C
MSL1 @
245C
MSL3 @
245C
MSL3 @
245C
higher
shear force
too low
shear force
M
245C @
package top
W
package
integrity
moisture sensitivity level
B
Glueability
M
mold
compound
surface cleanliness
B
M = Must; W = Want
-40/150C
no delam
Tambient, Tjunction Tj =
Ta + P x ThetaJA
moisture sensitivity level
TC
TC
B
package
integrity
Importance:
X>x
Y>y
B
type A: product parameter
type B: process parameter
wire pull
operation
pull force
power
dissipation
OK
pre-conditioning per J-STD020A but
reflow @ 245C
pre-conditioning per J-STD020A but
reflow @ 245C
shear force
F Newton
OK
/
Monitor during ramp-up
##
L
L
L
/
Maximum Tj < 150C specified
and outlined in marking. Application
note published and followed.
L
L
/
Parts successfully processed with
MSL3/245C and passing reliability.
/
Development work finalized
@ MSL3/245C with customer.
Development work heading for
Pb-free with <260C at package top
L
L
H
U
H
8
N
U = unacceptable; ? = unknown;
++ = Opportunity
á
á
á
á
á
á
á
á
##
Bottom lasering provides glueability.
Plastic/mold release system
##
in development with supplier.
Risk-Level: L = low; M = medium; H = high; N = not relevant;
á
á
á
á
á
á
á
á
Full qual plan completed
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Page 11
At product release the WKM (Fig. A ,,.3.3) shows all requirements completed (##). Notes
indicate what monitoring is committed during ramp-up and what documents explain the proper
use of the released product (##). The data sheet and application notes belong together, both
reflect the final device specification. The device marking outlines the maximum Tj. An interim
solution was established to maintain parts’ glueability for the customers’ SMD processing (##).
Actual trend to Pb-free soldering is accounted for by goal setting of package top surface
temperature of </= (260 -5/+0)C and plans for looking into necessary assembly material and/or
process changes for acceptable MSL as part of future development work (##).
F.W.Wulfert - NPI Quality MUC
Motorola SPS