1. science
2. mathematics
3. arithmetic

1/14/2015
Building an Arithmetic Logic Unit
(ALU)
Last time:
• Most arithmetic operations can be done with a few
simple operations
CSCI 410
• Addition
• Bit-flip (NOT(x))
4 – Arithmetic Logic Unit
• More complex operations: e.g., division
• Not covered in this course
• See, e.g., Patterson & Hennessy, Computer Organization
and Design
Some of today’s slides come from www.nand2tetris.org
Building an ALU
Very Simple ALU
Basic specification:
c
• Two input buses, x and y
• A set of control inputs which together specify the
operation to perform (e.g., x + y)
• Outputs for the result and some indicator bits
x
y
A very simple example:
• Input 1-bit x and y
• Input 1-bit control selecting AND/OR
• Output 1-bit result
V.S.
ALU
out
c
x
y
out
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
1
1
1
3
4
Very Simple ALU
Very Simple ALU
Build it!
c
y
V.S.
ALU
out
x
y
out
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
1
1
1
x OR y
c
x AND y
x
2
5
6
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1/14/2015
Expanding the Simple ALU
Recall: Addition in Binary
• How would you:
• Add additional operations, like NOT, XOR
• Expand to handle n-bit operations
“Carry” bits
111 1
1011
+ 0111
10010
• For our ALU:
• Also need addition, subtraction, constant 0 or 1 or -1,
several other functions
• Also need output for “result was negative”
• Also need output for “result was zero”
x
y
out
+
0
0
0
1
1
1
1
10
1-bit addition.
Overflow if 4-bit
addition
We need a chip to do addition: an “adder”…
7
8
Addition: The Adder
Addition: The Adder
16
a
16-bit
adder
16
b
16
out
• Adder: a chip designed to add two integers
• Proposed implementation:
• Half adder: designed to add 2 bits
• Full adder: designed to add 3 bits
• Adder:
designed to add two n-bit numbers.
Wrong adder! Sorry.
By Metalmike (Own work) CC BY-SA 3.0 (http://creativecommons.org/licenses/by-sa/3.0)], via Wikimedia Commons
Half Adder
Full Adder
sum carry
a
b
0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
sum carry
a
b
c
0
0
0
0
0
b
0
0
1
1
0
c
0
1
0
1
0
0
1
1
0
1
1
0
0
1
0
1
0
1
0
1
1
1
0
0
1
1
1
1
1
1
a
sum
a
b
half
adder
sum
carry
Add two bits: “carry” represents the 2’s place value,
e.g., the value which must be carried if we are doing a
multi-bit sum.
full
adder
carry
Add three bits: one from the top
number in our sum, one from the
bottom number, and one for any carry
from the previous addition.
2
1/14/2015
n-bit Adder
4-bit Adder
Build it!
16
a
16
16-bit
adder
16
b
out
...
1
0
1
1
a
…
0
0
1
0
b
…
1
1
0
1
out
+
14
The Hack ALU
zx nx
zy
ny
f
no
out(x, y,
ALU Specification
control bits)
=
Chip name:
Inputs:
x+y, x-y, y–x,
0, 1, -1,
x
16 bits
ALU
y
16 bits
out
16 bits
x, y, -x, -y,
x!, y!,
x+1, y+1, x-1, y-1,
zr
ng
x&y, x|y
Outputs:
ALU
x[16], y[16],
zx,
nx,
zy,
ny,
f,
no
out[16],
zr,
ng
// Two 16-bit data inputs
// Zero the x input
// Invert (NOT) the x input
// Zero the y input
// Invert the y input
// Function: 1 = Add, 0 = And
// Invert the out output
// 16-bit output
// True iff out = 0
// True iff out < 0
6 control bits, but only 18 functions.
Note:
Overflow is neither detected nor handled.
16
ALU Logic
Why This Works (Example)
Consider logic (previous slide) for x – y:
inputs: x = 0111, y = 0101,
zx = 0, nx = 1, zy = 0, ny = 0, f = 1, no = 1
Invert x (nx = 1): x = 1000
// x = – x – 1
Leave y alone:
y = 0101
Add (f = 1):
out = 1101 // out = y – x – 1
Invert out (no = 1): out = 0010 // out = – out – 1
//
=1+x–y–1
//
=x–y
This is in your book.
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1/14/2015
Other Typical ALU Functions
Carry Design
• Bit-shift operations
• Now exported to specialized circuitry
• Multiplication/division
• Requires bit-shift, conveniently
Adding these to our ALU would significantly increase
the complexity.
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Most obvious design: “ripple” carry
• Carry out from one full adder feeds into carry in for
next full adder
• Problem: electrical signals take time to propagate
roughly proportional to # of gates
• Consider 64-bit ALU using ripple carry
• Can we do better?
20
Carry Lookahead
• Basic principle:
• Any Boolean function can be implemented in ~two
levels of gates
• Recall proof of AND/OR/NOT basis
• All functions expressible as OR of a bunch of ANDs
• If you’re willing to pay for the gates, you can speed
things up!
• Carry lookahead
• Compromise between speed & cost
• Get performance approximately logarithmic in # bits
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