1. No category

Lecture 11
First-order Circuits (1)
Hung-yi Lee
Dynamic Circuits
Capacitor,
Inductor
(Chapter 5)
Time
Domain
(Chapter 9)
Frequency
Domain
(Chapter 6,7)
Abstract
S-Domain
(Chapter 11,13)
Textbook
• First-Order Circuits
• Chapter 5.3, 9.1
First-Order Circuits
• Containing only one capacitor or inductor
The networks excluding capacitor or inductor only
contains sources and resistors.
Can always be simplified by Thevenin or Norton
Theorem
First-Order Circuits
RC:
i sc
RL:
i sc
First Order Circuits
voc t  , isc t  (this lecture)
voc and isc should be dynamic
…
t
t0
…
t
t0
…
t1
i sc
t2
t
…
…
t0
t
Unit Step Function
Perspective
• Differential Equation
• Superposition
• State
Perspective 1:
Differential Equation
Zero-Input Response - RC
v  Vou  t  t0 
…
t0
t
Zero-Input Response - RC
Find vc(t) and ic(t)
t  t0
Capacitor is open circuit
ic t   0
vc t   Vo
Zero-Input Response - RC
Find vc(t) and ic(t)
t  t0
Capacitor is open circuit
ic t   0
vc t   0
Zero-Input Response - RC
Find vc(t) and ic(t)
t  t0
?
t  t0
t  t0
?
t  t0
Zero-Input Response - RC
t  t0
vC (t0 )  V0
vC (t0 )  V0
ic(t0) is unknown
Voltage on the
capacitor should
be continuous
Zero-Input Response - RC
t  t0
vC (t0 )  V0
vC (t0 )  V0
ic(t0) is unknown
dvC (t )
RC
 vC (t )  0
dt
t
Assume vC (t )  Ae
t
t
RCAe  Ae  0
dvC (t )
iC (t )  C
dt
RC  1  0
1

RC
Zero-Input Response - RC
vC (t )  Ae
 Ae
Ae

1
t0
RC
1

RC
vC (t0 )  V0
t

1
t
RC
A  V0e
 V0
vC (t )  V0e
1
1
t0  t
RC
RC
e
 V0e

vC (t0 )  V0
1
t0
RC
1
t  t 0 
RC

1
t  t 0 
RC
dvC (t )
de
iC (t )  C
 CVo
dt
dt
Vo  RC t t0 
 e
R
1
Zero-Input Response - RC
vC (t )  V0e

1
t  t 0 
RC
Vo
iC (t )   e
R

1
t  t 0 
RC
Zero-Input Response - RC
vC (t )  V0e
…
  RC
t
t0
vC (t )  V0e
Vo
dvC (t )
Vo
 e
dt

vC (t )
Vo
Vo



Vo
1
t  t 0 
RC
1
 t  t 0 

1
 t  t 0 

dvC (t0 )
Vo

dt

Vo
Zero-Input Response - RL
i  I ou  t  t0 
i
…
t0
t
Zero-Input Response - RL
iL (t )  I 0 e
I0

R
t  t 0 
L
vC (t )   RI 0e
vL (t )
iL (t )
- RI 0

R
t  t 0 
L
Zero-Input Response
…
t0
vC (t )  V0e

1
t  t 0 
RC

R
t  t 0 
L
iL (t )  I 0 e
RC
  L
 R
y (t )  Y0 e
Voltage of C,
Current of L

t -t 0 
Voltage,
Current

How fast?
t
Step Response - RC
v  Vou t  t0 
…
t0
t
t  t0
Step Response - RC
• Solved by differential equation
t  t0
vc t   0
t  t0
vc t   Vo
t  t0
Ric t   vc t   Vo
  0
vc t

0
vt   Vou t  t0 
  0
vc t

0
dvc t 
RC
 vc t   Vo
dt
Step Response - RC
dvc t 

v t   0
RC
 v t   V
dt
c
vc t   v N t   vF t 
o
c
0
vN(t) is general solution
vF(t) is special solution
dvc t 
 vc t   0
vN(t) is the solution of RC
dt
vN (t )  Ae
dvc t 
 vc t   Vo
vF(t) is the solution of RC
dt
vF t   Vo

t
RC
Step Response - RC
dvc t 

v t   0
RC
 v t   V
c
dt
vc t   v N t   vF t 
vc t   Ae

t
RC
c
o
 Vo

vc t   V0 1  e

0
vN (t )  Ae
Ae
t0

RC
1
 t  t 0 
RC

t
RC
vF t   Vo
 Vo  0




A  Vo e
t0
RC
…
Step Response
t
t0
1
 t  t 0  


vc t   V0 1  e RC



R
 t  t 0  


iL t   I 0 1  e L



RC
  L
 R
t -t 0 





y (t )  Y0 1  e



Voltage of C,
Current of L
Voltage,
Current
How fast?
Step Response
t -t 0 





y (t )  Y0 1  e



Y0
Y0
…
t0
t
Step Response
…
t
t0
t -t 0 





y (t )  Y0 1  e



Y0
Y0
Rise time
Y0
10% time
90% time
Step Response + Initial Condition
t  t0
  0
vc t

0
 V
vc t

0
x
Step Response - RC
dvc t 

RC
 v t   V v t   V
c
dt
vc t   v N t   vF t 
vc t   Ae
Ae

t0
RC

t
RC
c
o
vN (t )  Ae
 Vo
x

t
RC
vF t   Vo
vc t   Vx  V0 e
 Vo  Vx
A  Vx  Vo e
0
t0
RC

1
t  t 0 
RC
 V0
Perspective 2:
Superposition
Step Response
• Solved by Superposition
vt   Vou  t  t0 
vC (t )  V0e
1
 t  t 0 

  RC
vt   Vou t  t0 
vC (t )  ?
Step Response
…
t0
t
v 2 t 
=
…
…
t0
v1 t   Vo
 Vou  t  t0 
t
-
Suppress v1, find vc2(t)
Suppress v2, find vc1(t)
…
t0
t
vc t   vc1 t   vc 2 t 
Step Response
vt 
 Vou  t  t0 
vC (t )  V0e
vC 2 (t )  V0e
v 2 t 
 Vou  t  t0 
1
 t  t 0 

1
 t  t 0 

vC1 (t )  V0
vC (t )  vC1 (t )  vC 2 (t )
v1 t   Vo
1
 t  t 0  


 V0 1  e 



Pulse Response
vt 
Vo
dvc t 
RC
 vc t   vt 
dt
Solved by Superposition
Pulse Response
=
0
t0

1
 
 t
vC1 (t )  V 1  e   t  0
0

 


vt 
Vo
vC1 (t )
…
0
D
-
0
tD

t  D 
 

vC 2 (t )  V 1  e   t  D

 0 


vC 2 (t )
Vo
Vo
0
…
D
Pulse Response
vC (t )  vC1 (t )  vC 2 (t )
0
tD

0
t0

t  D 

1
 


vC1 (t )  V 1  e  t  t  0 vC 2 (t )  V 1  e   t  D
0
0


 
 




vC (t )
D
V0


V0 1  e 





 D  t
V0  e 1e


Pulse Response
If D  
vC (t )
V0
e x  1  x (If x is small)
D
V0


V0 1  e


D





D
V0 e


t

 D  t
V0  e 1e


Step Response + Initial Condition
 V
vc t
vc t   Vx  V0 e

1
t  t 0 
RC

0
 V0
Violate Superposition?
x
Step Response + Initial Condition
 
vc t0  Vx
The initial condition is
automatically fulfilled.
Vx
Do not have to
consider the initial
condition anymore
Step Response + Initial Condition
Vx
Vx
Zero-Input Response!
Step Response
(without initial condition)!
1

t  t 0  

RC




v
t

V
1

e
c2
0
vc1 t   Vx e



1
1
 t  t 0 

t  t 0  


vc t   vc1 t   vc 2 t   Vx e RC
 V0 1  e RC




1
t  t 0 
RC
Step Response + Initial Condition
Differential
Equation
Superposition
vc t  
vc t  
Vx  V0 e
General
solution
1
 t  t 0 
RC
 V0
Special
solution
The initial condition is
considered in the general
solution term.
Vx e

1
t  t 0 
RC
Zero-input
Response

 V0 1  e


1
t  t 0 
RC
Step Response
The initial condition is
automatically fulfilled.




Perspective 3:
State
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
If the circuit does not have any
capacitor or inductor
The currents or voltages at time t
do not depend on their values not
at t.
Why?
v(t )  Rit 
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
With capacitor or inductor
V0
vt   
0
t  t0
t  t0
You can not explain the current
or voltage at present unless
considering the past.
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
1 t
dv(t )
v(t )   i  d
i (t )  C
C 
dt
1 t
1 t
vt   vt0    i  d  vt1    i  d ……
C t0
C t1
If we know the
voltage before at t0
We do not care about
the current before t0
Capacitor voltages are States
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
1 t
vt   vt0    i  d
C t0
State at t0
Source after t0
vt   vstate t   vinput t 
 
vc t0  Vx
State
• The capacitor voltages and inductor currents
constitute the state variables of any circuit. (P410)
vc (t )  vstate t   vinput t 
The response after t0
vc t   Vx e

1
t  t 0 
RC
From state at t0
(Ignore input)
1
 t  t 0  


 V0 1  e RC



From Input after t0
(Ignore state)
Response
y(t): voltage of capacitor or current of inductor
y(t) = general solution + special solution
=
=
= natural response + forced response
= state response (zero input)
+ input response (zero state)
Zero-Input Response
…
t0
t
vc (t )  vstate t   vinput t 
Considering the circuit from t0:
Ignore everything
before t0
State: vc(t0)=V0
Lead to vstate t 
No input after t0
vinput t   0
Zero-Input Response
vc (t )  vstate t   vinput t 
vinput t   0
State: vc(t0)=V0
vstate (t )  V0e
vc t   vstate (t )  V0e
1
 t  t 0 

1
 t  t 0 

Zero-Input Response
v  Vou  t  t0 
…
t0
t
vc (t )  vstate t   vinput t 
Considering the circuit from t0-D:
State: vc(t0-D)=V0
Input after t0-D
t0  D
t0
t
Zero-Input Response
vc (t )  vstate t   vinput t 
State: vc(t0-D)=V0
vstate (t )  V0e
Input after t0-D
vinput (t )
1
 t  t 0  D  

t
t0  D
t0
t0  D
t0
1
t  t  D 
D
 t  t 0  D   




 V0  e   1e 
V0 1  e 







0
Example 9.4
t0
0  t 1
t 1
6k
 12V
4k
12V
Example 9.4
t0
 

v0 0
 
v 0  0
 
v 0  0
Example 9.4
 

 

v 0  0 v 1  9.73
0  t 1
State response:
v0    0
No state response
Input response: voc  12V

vt   V0 1  e

t t0

t



 12V
0
.
6
  121  e 






6k
Example 9.4
 

 

v 0  0 v 1  9.73
0  t 1
6k
 12V
State response is zero
Example 9.4
 

 

v 0  0 v 1  9.73
t 1
State response:
vt   Vx e

t t 0

4k
Input response:
t t
 0 

vt   V0 1  e  


12V
Example 9.4
 
 


v 0  0 v 1  9.73
t 1
State response:
vt   9.73e

4k
t 1
0.4
Input response:
t 1



vt   121  e 0.4 


12  21.73e

t 1
0.4
12V
Example 9.4
t



0
.
6
 121  e 


12  21.73e
dvt  vt 
it   100F

dt 24k

t 1
0.4
Application:
Touchscreen
Resistive Touchscreen
電阻式觸控螢幕
http://www.analog.com/library/analogdialogue/archives/44-02/touch_screen.html
Capacitive Touchscreen
電容式觸控螢幕
Before Touching
Finger is Touching
http://www.eettaiwan.com/ART_8800583600_480702_TA_bc13e6c4.HTM
Homework
• 9.14
• 9.16
Homework - Stability
• The first-order circuit shown below is at steady
state before the switch closes at t=0. This circuit
contains a dependent source and so may be
unstable. Find the capacitor voltage, v(t), for t>0.
Homework - Stability
• The gain of the dependent source below is B. What
restrictions must be placed on the gain to ensure
that the circuit is stable? Design this circuit to have
a time constant of +20ms.
Thank you!
Homework
• 9.14
• 9.16
t
2D
0t  D
vL t   10e
tD
vL t   3.93e
vC D   8.65
vC 2D   1.17
vC 3D   8.81
 t  D 
2D
Stability
• The first-order circuit shown below is at steady
state before the switch closes at t=0. This circuit
contains a dependent source and so may be
unstable. Find the capacitor voltage, v(t), for t>0.
 0.2m
 0.1m
vt   24  12e
 0.4m 0.1m
1V
t
20
Stability
• The gain of the dependent source below is B. What
restrictions must be placed on the gain to ensure
that the circuit is stable? Design this circuit to have
a time constant of +20ms.
B  3/ 2
B 1
Acknowledgement
• 感謝 莊佾霖(b02)
• 指出投影片中 Equation 的錯誤