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ERRATA
SRP/SRPV/SRPNV COMMAND ISSUE
APPLICATION NOTE
APPLICABLE PRODUCTS
IS25LP064/032A
IS25LP128/064
IS25LP128/064/032B
IS25WP128/064/032/016/080/040/020
APPLICATION NOTE
BACKGROUND


This note is applicable to only users who are using 8/16/32/64-byte burst.
All users who are adhering to default settings need not refer to this note.
Depending on the product, there may be only one Read Register (volatile) or two separate sets of Read
Registers (volatile/non-volatile). The Read Register has a “Wrap Enable or Burst Length Set Enable” bit which
sets the wrap-around boundary on the bit2 of the register as defined below.
With two sets of Read Registers, the data in non-volatile Read Register is copied into volatile Read Register on
power-up and/or reset (either Hardware reset or Software Reset). The output from the volatile Read Register
determines the device’s operation.
Read Register of IS25LP064/032A, IS25LP128/064/032, and IS25LP128/064/032B
Bit
Name
Bit2
Wrap Enable
Definition
Wrap Enable Bit:
"0" indicates disable (default)
"1" indicates enable
Read/Write
Type
R/W
Volatile
Read/Write
Type
R/W
Non-Volatile
and Volatile
Note: To set the bit, SRP (Set Read Parameters: C0h) command is used.
Read Register of IS25WP128/064/032/016/080/040/020
Bit
Name
Bit2
Burst Length
Set Enable
Definition
Burst Length Set Enable Bit:
"0" indicates disable (default)
"1" indicates enable
Notes:
1. To set the bit, SRPV (Set Read Parameters: Volatile: C0h/63h) and SRPNV (Set Read Parameters: Non-Volatile: 65h) commands
are used.
2. SRPV sets only the volatile Read Register while SRPNV sets the volatile Read Register as well as the non-volatile Read Register.
“Disable (Bit2=0)” means that the wrap-around boundary will be set to the whole array (default).
“Enable (Bit2=1)” means that the wrap-around boundary will be determined by burst length (set by bit1 and bit0
of the Read Register). Please refer to the datasheet of corresponding products regarding the burst length.
The SRP/SRPV/SRPNV command issue
This issue affects all the erase operations of both the main array and the Information Row. When the Read
Register [bit2] is set to “1” the wrap-around boundary is configured for read operations. When an erase
operation is executed in this condition, it fails due to erase time out. In order for the erase operation to succeed
as normal, the Read Register [bit2] must set back to “0” prior to any erase operations being executed.
Guideline to avoid the issue
In order to avoid the issue, a user must follow the guidelines as follows:
1. Disable the wrap enable bit (bit2) of the volatile Read Register after wrap burst read (or before erase,
depends on how frequently wrap burst read or erase is used) by using a SRPV or SRPNV command. After
the erase operation, enable the wrap enable bit again to execute a wrap burst read.
2. A Reset operation (either Hardware Reset or Software Reset) can also be used to disable the wrap function if
the non-volatile Read Register’s wrap enable bit is not set to “1”. However, a Reset operation will not work if
non-volatile Read Register’s wrap enable bit is already set to “1”. This is because the data in the non-volatile
Read Register is copied into the volatile Read Register upon power-up and/or reset.
Integrated Silicon Solution, Inc.- www.issi.com
Rev.A
03/18/2015
2