Debouncing a Switch with an RS
Latch
UMass Boston - Engineering
ENGIN 241
Andrew Davis
April 2, 2015
Single-pole Single-throw (SPST)
Switch
open
closed
SPST Switch to Control Clock
5V
5V
E=0
E=1
open
closed
Bouncing in an SPST Switch
Bounces switching high-to-low, but includes numerous low-to-high transitions
100 μs/div
20 μs/div
RS Latch Truth Table
S
R
Q
Q
0
0
forbidden
0
1
1
0
1
0
0
1
1
1
no change
NAND Gate (7400)
A
B
Y
0
0
1
0
1
1
1
0
1
1
1
0
Y = 1 unless both inputs are 1
A
Y
B
RS Latch from Two NAND Gates
S
R
Q
Q
0
0
forbidden
0
1
1
0
1
0
0
1
1
1
no change
S
Q
Q
How to ensure S = R = 0 cannot occur?
R
Single-pole Double-throw (SPDT)
Switch
R
• Three terminals
• center contacts one end
only at a given time
• For RS latch
•
•
ground center
connect S to one side,
R to other
S
SPDT Switch: Set = 0
5V
R=1
S=0
SPDT Switch: Reset = 0
5V
R=0
S=1
SPDT Switch: Bouncing
5V
R=1
S=1
SPDT Switch Debouncing with an RS Flip-flop
SPST
debounced
What You Have to Do
• Simulate SPST switch with SPDT, and record
bouncing on scope
• Build SPDT input circuit and connect it to RS latch
to create clock that you can control (use LED as
indicator)
• Show debounced output of clock circuit on scope
(may want to remove LED)
• Bonus: design input circuit with SPDT switch to use
with NOR-gate RS latch
Simulating SPST with SPDT
5V
• ground center terminal
E
• leave one side open