1. travel
2. tourist facilities
3. hotel

Bharatiya Vidya Bhavan’s
SARDAR PATE L INSTIT UTE O F T ECHNO LOGY
MUNSHI NAGAR, ANDHERI (WEST), MUMBAI - 400 058
ELECTRONICS ENGINEERING DEPARTMENT
AICTE Funded Two Week
Faculty Development Programme (FDP) on
“Electronic System Design: From Devices to Applications”
(4th May 2015 to 15th May 2015)
Date: 06th April 2015
Invitation Letter to Participants
Respected Sir / Madam,
You are cordially invited to attend the AICTE Funded Two-week Faculty Development Programme on
“Electronic System Design: From Devices to Application” scheduled during 4th May to 15th May 2015 at
Sardar Patel Institute of Technology, Andheri (West), Mumbai. The event is expected to provide a learning
platform for teachers of AICTE affiliated engineering colleges. Please see the attachments for the other details.
We would be looking forward for your participation for this FDP.
Thanking you,
Yours truly
Dr. S. S. Rathod
Co-Ordinator FDP
Please Note the Following:
1. Please note that Dr. S. S. Mantha will be Chief Guest and Dr. Ramgopal Rao will be the
Guest of honor for inauguration of workshop. You are kindly requested to register
yourself before 9.00 am at the registration desk.
2. Bring the photocopy of College ID card
3. Bring the Travel Tickets (For outstation participants only)
4. Bring the bank details (Name of account holder, Name of Bank, Branch Name with Address,
Account number, type of account and IFSC code). These details are required for the NEFT
transfer of refundable amount of Rs. 2000/--.
5. Please refer the attached schedule (also available on FDP website http://fdp.spit.ac.in/)
6. Attendance is compulsory on all days. Attendance will be taken in the morning as well as
evening session. Certificate will be issued only after successful completion of the course.
7. How to reach (Ask for Bhavan’s campus)
By Air: Santacruz Airport (5 Km)
By Train: Andheri Station (1.5 Km)
By Metro: Azadnagar Station (0.5 Km)
By Bus from Andheri (W) Station: 249/250/254/257/259
8. Participants whose accommodation is arranged at hotel ‘Delight Galaxy’ Andheri (West)
should contact Prof. Narendra Bhagat. Hotel is near Andheri station towards west side and at
walkable distance from the college.
9. Venue for sessions:
Ground Floor Room No: 008 for theory session
Ground Floor Room No. 007 for practical sessions
10. Pre-requisites for the course (Please read the following before attending the course):
a. Fundamentals of MOSFET
b. Fundamentals of digital and analog design
c. Fundamentals of Microcontrollers
d. Fundamentals of FPGA/CPLD/VHDL programming
11. Listed below are the set of important rules and regulations in regards with the CEN lab
visit at IIT Bombay.
a. No shorts and sleeveless clothing allowed.
b. Place your shoes/ chappals in an orderly manner on the shoe rack.
c. Leave your bags, notebooks, water bottles in an orderly manner outside.
d. Only cell phones, laptops can be taken in.
e. Bring a pair of clean socks, wear your socks.
f. Wear lab sandals.(provided by us)
g. Wear hairnet.(provided by us)