3/17/2015 Finite State Machine Example A Gray-Code Counter A Finite State Machine Example • Gray - Code Changes one bit at a time 0 1 3 2 6 7 5 4 12 13 15 14 10 11 9 8 • Reset true: register reset to 0 count (synchronous reset) • Input I false (and Reset false): output holds its value • Input I true (and Reset false): register counts up, according to clock - wraps from maximum count back to 0 1 3/17/2015 FSM choices • simplistic: separate state for each count - n bits 2n states transitions depend on inputs Mealey machine? Moore machine? • two-stage: FSM keeps track of transitions, output device keeps track of the actual count - Mealey machine? Moore machine? Simplistic •3 bits: 23 == 8 counts - 0 1 - 8 states » 3 2 6 7 5 4 one per count • State bits are the outputs 1 3 0 2 4 6 5 7 2 3/17/2015 Simplistic: transitions •3 bits: 23 == 8 counts - 0 1 - 8 states » 3 2 6 7 5 4 one per count states at the clock edge, when the input I is true Reset = 1 • Change I=0 1 I=0 I=0 I=1 3 I=1 I=0 I=1 0 I=1 • “Reset” input forces change to state 0 at the clock edge 2 4 I=1 I=1 I=0 I=0 I=0 5 I=0 I=1 7 6 I=1 Simplistic: implementation • FSM - • How - many registers? Encoded approach: log2(8) == 3 state bits » - design Registers hold the current state Combinational logic computes the next state 8 flip-flops, a.k.a. 4-bit register (one bit unused) One-hot approach: separate flip-flop for each state » exactly one flip-flop at a time has output 1 • Output - logic Combinational logic to generate the outputs is trivial! The state bits represent the counter value » encoded state bits are better suited to this 3 3/17/2015 State 0 1 2 3 4 5 6 7 s2 0 0 0 0 1 1 1 1 s1 0 0 1 1 0 0 1 1 s0 0 1 0 1 0 1 0 1 State 0 1 2 3 4 5 6 7 Reset I Next state 0 0 0 0 1 1 1 - 0 0 0 1 0 1 3 1 - 0 0 0 2 0 1 6 1 - 0 0 0 3 0 1 2 1 - 0 0 0 4 0 1 0 1 - 0 0 0 5 0 1 4 1 - 0 0 0 6 0 1 7 1 - 0 0 0 7 0 1 5 1 - 0 Reset I Next state n2 n1 n0 0 0 0 0 0 0 0 1 1 0 0 1 1 - 0 0 0 0 0 0 1 0 0 1 0 1 3 0 1 1 1 - 0 0 0 0 0 0 2 0 1 0 0 1 6 1 1 0 1 - 0 0 Reset 0= 1 0 0 0 3 0 1 1 0 1 2 0 1 0 1 - 0 0 0 0 0 0 4 1 0 0 0 1 0 0 0 0 1 - 0 0 0 0 5 1 0 I=1 0 0 1 0 1 4 1 0 0 1 - 0 0 0 0 0 0 6 1 1 0 0 1 7 1 1 1 1 - 0 0 0 0 0 0 7 1 1 1 0 1 5 1 0 1 1 - 0 0 0 0 State Transition Table Reset = 1 I=0 1 I=0 I=0 I=1 3 I=1 I=0 I=1 0 I=1 2 4 I=0 5 I=1 I=1 I=0 I=0 6 I=0 I=1 I=1 7 Encode the States I=0 1 I=0 I=0 I=1 3 I=1 I=0 I=1 0 2 4 I=1 I=1 I=0 I=0 I=0 5 I=0 I=1 7 6 I=1 4 3/17/2015 5
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