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PSIM
P M Tuttoria
al
Using SP
PI in F2
2833x//F2803
3x Tarrget
Jaanuary 20155
-1-
Pow
wersim Inc.
www.powerssimtech.com
Usin
ng SPI in F2
2833x/F28033x Target
With the SimCoder Module
M
and the F2833x//F2803x Harrdware Targeet, PSIM cann generate reeady-torun codes for DSP bo
oards that usse TI F2833x
x/F2803x serries DSP. Byy using the S
Serial Periphheral
Interface (SPI) block
ks in the F2833x/F2803x
x Target libraary, one can implement tthe functions to
communicate with ex
xternal SPI devices
d
(such
h as externall A/D and D
D/A converteers) easily annd
ually for SPII devices is ooften a time--consuming and non-trivvial task.
convenieently. Writing code manu
With the capability to
o support SP
PI, PSIM greeatly simplifi
fies and speeeds up the cooding and haardware
implemen
ntation process.
This tuto
orial describees how SPI blocks
b
and defined
d
and uused in PSIM
M. To illustraate the proceess,
several examples witth SPI D/A converter
c
and
d A/D conveerters are proovided.
1. SPI in TI F283
33x/F2803
3x
There aree one set of SPI
S module in TI F2833x DSP and 2 sets of SPII modules (S
SPIA and SP
PIB) in
F2803x DSP.
D
They have
h
differen
nt sets of GP
PIO ports. PS
SIM supportss the use of tthese GPIO ports to
communicate with SP
PI devices. The
T GPIO po
orts used by SPI modulees are listed bbelow.
For the F2833x
F
hardw
ware target:
To use Ports GPIO16
6-GPIO19:
-
GPIO16 as SPI daata output pin
GPIO17 as SPI daata input pin
n
GPIO18 as SPI clock SPICLK
K
GPIO19 as SPI slaave transmitt-enable pin SPISTE
4-GPIO57:
To use Ports GPIO54
-
GPIO5
54 as SPI daata output pin
n
GPIO5
55 as SPI daata input pin
GPIO5
56 as SPI clo
ock SPICLK
K
GPIO5
57 as SPI slaave transmit-enable pin S
SPISTE
F
hardw
ware target:
For the F2803x
To use Ports GPIO16
6-GPIO19 off SPIA:
-
GPIO16 as SPI daata output pin
GPIO17 as SPI daata input pin
n
GPIO18 as SPI clock SPICLK
K
GPIO19 as SPI slaave transmitt-enable pin SPISTE
To use Ports GPIO3, 5, 18 and GPIO19
G
of SP
PIA:
-
GPIO3
3 as SPI dataa input pin
GPIO5
5 as SPI dataa output pin
GPIO18 as SPI clo
ock SPICLK
K
GPIO19 as SPI slaave transmit-enable pin S
SPISTE
To use Ports GPIO12
2-GPIO15 off SPIB:
-
GPIO12 as SPI daata output pin
n
GPIO13 as SPI daata input pin
GPIO14 as SPI clock SPICLK
K
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Usin
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-
GPIO15 as SPI slaave transmitt-enable pin SPISTE
To use Ports GPIO24
4-GPIO27 off SPIB:
-
GPIO24 as SPI daata output pin
GPIO25 as SPI daata input pin
n
GPIO26 as SPI clock SPICLK
K
GPIO27 as SPI slaave transmitt-enable pin SPISTE
There aree four types of SPI librarry elements in PSIM's F22833x/F28003x Target libbrary: SPI
Configurration, SPI Device,
D
SPI Input,
I
and SP
PI Output. T
Their images are shown bbelow. Theyy can be
accessed by going to Elements >>
> SimCodeer >> F28333x Target orr F2803x Taarget in PSIM
M.
SPI Config
CS0
C
C
CS1
C
CS2
C
CS3
F28
8335
SPI De
evice
in
CS0
CS1
ntr
CS2 In
CS3
SPI
F28335
out
SPI
F28335
Sync
F28335
SPI Config
C
CS0
C
C
CS1
C
CS2
C
CS3
F28
803x
SPI De
evice
CS0
CS1
ntr
CS2 In
CS3
in
SPI
F2803x
out
SPI
F2803x
Sync
F2803x
The funcctions and deefinitions off these elemeents are desccribed in the following seections.
1.1
SP
PI Configura
ation
The SPI Configuratio
on block deffines chip selection pins and the bufffer size for thhe SPI comm
mands.
The SPI Configuratio
on block mu
ust be presentt in a schem
matic if SPI iss used, and tthis element must be
in the maain schematic.
The parameters of the SPI Config
guration block are:
-
SPI Port: Define the SPI
S port as either
e
GPIO116-19 or GP
PIO54-57 forr F2833x; orr
GPIO16-1
19, GPIO3, 5,
5 18, 19, GP
PIO12-15 orr GPIO24-277 for F2803xx.
-
Chip Seleect Pin0 to Pin3:
P
Both F2
2833x and F
F2803x Targeets support uup to 16 SPII
devices, which
w
requirres four GPIO
O pins for chhip select as defined by Chip Select Pin0 to
Pin3. Theese GPIO porrts and the SPI
S slave trannsmit-enablee pin SPISTE are used too
generate the
t chip seleect signal forr SPI devicess.
If there iss only one SPI
S device, one can use ju
ust the SPI sslave transm
mit-enable pinn SPISTE ass the
chip select signal. If a chip selecttion pin is no
ot used, set iit to Not Useed.
his tutorial, th
here are up to
t three SPI devices. Thuus two chip select pins, P
Pin0
In the examples in th
and Pin1, will be suff
fficient. The other pins, Pin2
P
and Pinn3, are not ussed.
-
SPI Buffer Size: Defin
ne the bufferr size of the SPI commannds. Each m
memory cell oof the
buffer sav
ves the index
x of a SPI co
ommand. Noormally, one can specify the buffer size as 1
-7-
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Usin
ng SPI in F2
2833x/F28033x Target
plus the number
n
of SP
PI command
ds (i.e. Start C
Conversion Command, R
Receiving D
Data
Command
d, Sending Data
D Commaand, and Synnc. Commannd) in all SPII Input/Outpuut
elements.
PI Device
evice block defines
d
the in
nformation of
o the corressponding SP
PI hardware ddevice. The number
evice blockss in the schem
matic must be
b same as thhe number oof SPI hardw
ware devices..
meters of the SPI Device block are:
Chip Seleect Pins: Speecify the state of the chipp select pins correspondiing to the paarticular
SPI devicce. When thee chip select pins are at thhis state, thiis SPI devicee is selected..
matic, the ch
hip select pin
ns of all the SPI devicess are connectted to the chhip select pinns of the
figuration bllock, withoutt defining ho
ow the chip select logic is implemennted. In the aactual
e, however, one
o would need
n
to impleement the coorrespondingg chip select logic accorddingly.
amples in th
his tutorial, Pins
P CS0 and
d CS1 of extternal A/D annd D/A convverters are
d to Pins CS
S0 and CS1 of
o the SPI Configurationn element.
Communiication Speed
d (MHz): Sp
pecify the SP
PI communiccation speedd, in MHz. N
Note that
different SPI
S devices can have diffferent comm
munication sspeeds.
Clock Typ
pe: F2833x DSP
D supportts four SPI cclock types: rrising edge w
without delaay, rising
edge with
h delay, fallin
ng edge with
hout delay, aand falling eddge with dellay, as show
wn in the
picture beelow.
t PSIM only supports thee situation where
w
the DS
SP and SPI ddevice latch ddata at the saame
ge or falling
g edge of the SPI clock siignal SPICL
LK.
-8-
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Usin
ng SPI in F2
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-
Command
d Word Leng
gth: Define the
t word lenngth, or the leength of the significant bbits, of
SPI comm
munication commands.
c
Itt can be from
m 1 to 16 bitts.
-
Sync. Actiive Mode: Sp
pecify the triggering moode of the synnchronizatioon signal of tthe SPI
device. It can be eitheer Rising edg
ge or Fallingg edge.
put device orr an output ddevice. For eexample, an external A/D
D
A SPI deevice can be either an inp
converterr is an input device. Usu
ually DSP wiill send one or multiple A
A/D converssion commannds to
the devicce, and then set the synch
hronization signal
s
to starrt the converrsion. The syynchronizatiion
signal is reset at the next
n comman
nd of the sam
me device.
A SPI inp
put device using
u
the syn
nchronization
n signal usuaally needs ann interrupt piin to trigger DSP to
enter the interrupt serrvice routinee.
On the otther hand, an
n external D/A converterr are an outpput device. U
Usually DSP
P sends one oor
multiple D/A conversion commaands to the deevice, and thhen sets the ssynchronizaation signal to start
s
tion signal iss reset at thee next comm
mand of the saame device.
the conveersion. The synchronizat
-
SPI Initia
al Command: Define the SPI comman
and that initiaalizes the SP
PI device.
-
Hardwaree Interrupt Mode:
M
Speciffy the type oof the interruupt signal thaat the SPI deevice
generates. This is valiid only when
n the SPI devvice's interruupt output noode is conneected to
the input of a digital output
o
elemeent. It can bee one of the ffollowings: N
No hardwarre
interrupt, Rising edgee, or Falling edge.
- Interrupt Timing: Speecify how a SPI
S input deevice generattes interrupt when it com
mpletes
conversio
on. It can be one of the fo
ollowing:

No in
nterrupt: No interrupt is generated. Inn this case, D
DSP sends tthe commandd to a
SPI in
nput device.. This devicee starts the c onversion annd returns thhe result in thhe same
comm
mand.

Multiiple interrup
pt in series: Multiple
M
inteerrupts are ggenerated in series after eeach
conveersion. This is for a SPI device that hhas one A/D
D conversionn unit and muultiple
inputt channels. In
n this case, DSP
D send thee first conveersion comm
mand, and thee SPI
devicce starts the conversion.
c
When the coonversion is complete, thhe SPI devicce will
generrate an interrrupt. In the interrupt
i
servvice routine,, DSP will seend a comm
mand to
fetch the converssion result, an
nd start a neew conversioon of anotherr channel off the
samee SPI input device.
d

One-time interrup
pt: Only onee interrupt iss generated aat the end off the conversion.
This is for a SPI device that can
c perform multiple chaannel conversions in onee
requeest. In this caase, DSP sen
nds the comm
mand to the SPI input deevice, and thhe SPI
devicce completess the converssion of multiiple input chhannels. Wheen all the
conveersions are complete,
c
thee SPI devicee will generaate an interruupt.
-
Command
d Gaps (ns): Define the gap
g betweenn two SPI coommands, in nsec.
-
Conversio
on Sequencee: Define the names of thhe SPI input elements, seeparated by ccomma
that determ
mine the con
nversion seq
quence. Notee that this paarameter is valid only whhen the
SPI devicce generates multiple inteerrupts in seeries.
A SPI co
ommand consists of a serries of 16-bitt numbers seeparated by ccomma. In thhe 16-bit nuumber,
only the lower bits arre the signifiicant bits useed by the com
mmand. Forr example, iff the Commaand
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Word Leength is 8, Biits 0 to 7 aree the comman
nd, and Bits 8 to 15 are not used. Ass an examplee,
"0x12, 7,, 0" is a com
mmand with 3 command words.
1.3
SP
PI Input
A SPI inp
put device may
m have mu
ultiple input channels. Thhe SPI Inputt block is useed to define the
propertiees of an input channel forr SPI commu
unication, annd one SPI IInput block ccorresponds to one
input chaannel.
The parameters of the SPI Input block
b
are ex
xplained beloow:
-
Device Na
ame: Definee the name off the SPI inpput device.
Start Con
nversion Com
mmand: Defiine the start conversion ccommand, inn hex numbeers,
separated by comma (for
( examplee, 0x23, 0x4 3, 0x00).
Receiving
g Data Comm
mand: Defin
ne the receiviing data com
mmand, in heex numbers,
separated by comma (for
( examplee, 0x23, 0x4 3, 0x00).
P
Deefine where the
t data bits are in the reeceiving dataa string. Thee format
Data Bit Position:
is:
ElementName={xn[MS
SB..LSB]}
where
-
ElementN
Name is the name
n
of the SPI
S input eleement. If it iis the currentt SPI input eelement,
use y insteead.
{} means that the item
m in the braccket repeats m
multiple tim
mes.
xn is the nth word receeived from the
t SPI inputt device, andd n starts froom 0.
MSB..LSB
B defines thee position off the significaant bits in thhe word.
This form
mula defines the data len
ngth of a SPII input devicce. For exam
mple, y=x1[3..0]x2[7..0], means
that the data
d length iss 12, and thee result is thee lower 4 bitts of the 2ndd word and thhe lower 8 bits of
the 3rd word.
w
If the received
r
dataa string is 0x
x12, 0x78, 0xxAF, then thhe result willl be 0x8AF.
-
Input Ran
nge: Specify
y the parameeter Vmax thaat defines thee input rangee. This param
meter is
valid onlly when the SPI
S device is an A/D connverter. If thhe device connversion moode is
DC, the input
i
ranges from 0 to Vmax; if the deevice converrsion mode iis AC, the innput
ranges frrom –Vmax/2 to Vmax/2.
-
Scale Factor: Specify
fy the output scale factorr Kscale. If thee scale factorr is 0, the SP
PI
device is not an A/D converter, and
a the resullt will be exaactly the sam
me as what D
DSP
ommunicatio
on. Otherwis e, the SPI deevice is an A
A/D converteer, and
receives from SPI co
the resultt is scaled baased on the following:
f
In the DC
C conversion
n mode:
- In simulattion: Output = Input * Kscale
V
* Kscalee / 2Data_Lengthh
- In hardwaare: Output = Result * Vmax
C conversion
n mode:
In the AC
- In simulattion: Output = Input * Kscale
- In hardwaare: Output = (Result - 2Data_Length-1) * Vmax * Kscale / 2Data_LLength-1
The parameter Data_
_Length is caalculated fro
om the Data Bit Positionn formula.
- ADC Mo
ode: Define the
t A/D conv
version modde of the devvice. It can bee either DC or AC.
Note thatt this parameeter is valid only when thhe device is an A/D connverter.
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Usin
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1.4
Initial Va
alue: Define the initial value
v
of the iinput.
SP
PI Output
A SPI ou
utput device may have multiple
m
outpu
ut channels. The SPI Ouutput block is used to deffine the
propertiees of an output channel for
fo SPI comm
munication, aand one SPII Output blocck corresponnds to
one outpu
ut channel.
The parameters of the SPI Outpu
ut block are explained
e
beelow:
- Device Name:
N
Definee the name of
o the SPI ouutput device..
- Scale Factor: Specify
fy the output scale factorr Kscale. The ooutput is callculated as foollows:
In the DC
C conversion
n mode:
- In simulaation:
Ou
utput = Inpu
ut * Kscale
- In hardw
ware:
Ou
utput = Resu
ult * Kscale * 2Data_Length / Vmax
In the AC
C conversion
n mode:
- In simulaation:
Ou
utput = Inpu
ut * Kscale
Data Length-1
- In hardw
ware:
Ou
utput = 2
+ Ressult * Kscale * 2Data_Length--1 / Vmax
The parameter Data_
_Length is caalculated fro
om the Data Bit Positionn formula, annd Vmax is tthe
Output Range.
R
-
Output Range:
R
Speciify the param
meter Vmax that defines the output rrange. This
parameteer is valid on
nly when thee SPI device is a D/A connverter. If thhe device connversion
mode is DC,
D the outp
put ranges frrom 0 to Vm
max; if the deevice conversion mode iss AC,
the outpu
ut ranges from –Vmax/2 to Vmax/2.
-
DAC Mo
ode: Define the
t D/A conv
version modde. It can be either DC orr AC. Note thhat this
parameteer is valid on
nly when thee device is a D/A convertter.
-
Sending Data
D
Comm
mand: Definee the commannd to send thhe output daata. The com
mmand is
a series of
o hex numbers separated
d by commaa (for exampple, 0x23,0x443,0x00).
-
Data Bit Position:
P
Deefine where the
t data bits are in the seending data sstring. The fformat
is:
ElementName={xn[MS
SB..LSB]}
where




he name of SPI
S output eelement. If itt is the currennt SPI outpuut
ElemeentName is th
element, use y insttead.
{} meeans that the item in the bracket
b
repeeats multiple times.
xn is the
t nth word sent to the SPI
S output ddevice, and n start from 00.
MSB..LSB definess the position
n of the signnificant bits iin the word.
For exam
mple, if y=x1
1[3..0]x2[7..0
0] and if the result is 0x88AF, the low
wer 4 bits off the 2nd worrd will
be 0x8, and
a the lower 8 bits of th
he 3rd word will
w be 0xAF
F.
-
Sync. Co
ommand: Deffine the com
mmand to synnchronize ouutput channeels of the SPII output
device. Itt consists off a series of hex
h numberss separated bby comma (ffor example,
0x23,0x4
43,0). This command
c
is used
u
when thhe SPI outpuut device does not have the
synchron
nization sign
nal.
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Usin
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2. SPI Command
d Sequencces
A typicall sequence fo
or a SPI inpu
ut device is shown
s
below
w:
- Send the device
d
initiaal command (optional).
s
commaand and wait for interruppt (optional).
- Send the start
ynchronizatio
on signal and
d wait for innterrupt (optiional).
- Set the sy
r
daata command
d.
- Send the receiving
- Receive th
he result and
d call a functtion to conti nue the nextt action.
or a SPI outp
put device iss shown beloow:
A typicall sequence fo
- Send the device
d
initiaal command (optional).
s
dataa command.
- Send the sending
ynchronizatio
on signal to enable the nnew value (opptional).
- Set the sy
3. Lim
mitations
There aree several lim
mitations in th
he SPI functtionality in P
PSIM.
-
SPI Operaation Mode:
PSIM onlly supports SPI
S in the maaster operatiion mode. It assumes thaat only one D
DSP
links to on
ne or more SPI
S devices, and all SPI devices are in the slave mode.
-
-
Data Latcch Timing:
TI F2833x
x/F2803x DSP assumes that input/ouutput data arre active at tthe same tim
me. The
latch timee can be either the falling
g edge or rissing edge of the SPI clocck. SPI devicces use
the same timing
t
to lattch data. A SPI
S device w
will be not suupported if itt latches the input
data at a different
d
tim
ming than the DSP. Note that this lim
mitation is froom the TI
F2833x/F
F2803x.
Other Lim
mitations:
- SPI co
ommand com
mbined with
h GPIO port aactions
PSIM doees not support the type of
o SPI devicee if its comm
mand is combbined with G
GPIO
actions. For
F example, a SPI LCD display mayy need a GPIIO port to deefine if the ddata is a
command
d or a display
y character I/O.
-
Check
king the SPI device busy
y status
PSIM doees not support the type of
o SPI devicee that needs tto check if thhe device is ready
to accept the next com
mmand. The device can bbe supportedd if it returnss the result inn the
same com
mmand or it triggers
t
an in
nterrupt wheen conversioon is complette.
-
Daisy
y chain
PSIM doees not support daisy chaiin.
4. Exam
mples
To illustrrate how SPII elements arre used, threee examples are providedd in PSIM:
- Extern
nal D/A conv
verter MCP4
4922
- Extern
nal A/D conv
verter MCP3
3204 (withouut interrupt))
- Extern
nal A/D conv
verter TLV1
1548 (with innterrupt)
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Usin
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These ex
xamples are located
l
in the folder “exaamples\SimC
Coder\F28333x Target” oor “exampless\
SimCodeer\F2803x Taarget\” in thee PSIM directory.
4.1
Ex
xternal D/A Converter Using
U
MCP
P4922
MCP492
22 is a D/A converter
c
fro
om Microchip
p Technologgy Inc. It hass two D/A chhannels. Thee
informatiion that PSIM
M needs from
m the manuffacturer dataasheet is listeed below:
- The SPI clock
c
frequen
ncy is up to 20MHz.
2
ming diagram
m of MCP49922, as show
wn below, inndicates that the
- The seriall interface tim
DSP SPI clock
c
type iss rising edgee with delay,, and the tim
me interval beetween two
conversio
on commands is 15ns.
-
There is no
n device iniitial comman
nd nor start cconversion ccommand.
There is no
n interrupt port.
p
There is a synchronizaation port to
o synchronizee output tim
ming.
The sendiing data com
mmand of Ch
hannel A is 00x7000, and the commannd of Channel B is
0xF000. The
T result wiill be placed
d in the last 112 bits of thee command.
4.1.1 Cirrcuit Schema
atic
This exam
mple is impllemented in both F2833x
x and F2803 x Targets, aand the impleementation iin each
target is identical
i
exccept the DSP
P is differentt. In this exam
mple, two siine wave siggnals are gennerated
in DSP. They
T
are theen sent to thee external D//A converterr MCP4922 vvia SPI as tw
wo analog ouutputs.
The files of this exam
mple are in th
he folder "ex
xamples\F28833x Target\\DAC with S
SPI" for F28833x and
"examplees\F2803x Target\DAC
T
with
w SPI" fo
or F2803x.
The hard
dware circuitt diagram forr the F2833x
x Target is shhown below
w.
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Similarly
y, the hardwaare circuit diiagram for th
he F2803x T
Target is shown below.
In both schematic, DSP's SPIDO
OUT pin (GPIO16) is connnected to M
MCP4922's S
SDI pin for ddata
transmisssion; SPICLK pin (GPIO
O18) is conn
nected to MC
CP4922's SC
CLK pin as S
SPI clock; the SPI
slave tran
nsmit-enablee pin SPISTE
E (GPIO19) is connectedd to MCP49922’s chip seelect pin CS; and
Port GPIO14 is conn
nected to MC
CP4922’s LD
DAC. This coonnection iss to synchronnize two D/A
A
outputs.
The correesponding PSIM schemaatic for the F2833x
F
Targget is shown below.
The correesponding PSIM schemaatic for the F2803x
F
Targget is shown below.
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In both schematic, th
he output D0
0 of the Digittal Output bllock is set too GPIO14 annd is connectted to
the sync input of MC
CP4922 for synchronization.
S
signaal, this circu
uit does not nneed any othher GPIO porrts to generaate the
With the use of the SPISTE
chip select signal. Th
hat is why in
n the circuit, the chip seleect pins CS00 to CS3 are not used.
Note thatt in PSIM, itt is implied that
t SPISTE, SPICLK, S
SPIDIN, andd SPIDOUT pins are connnected
between the SPI Con
nfiguration block
b
and thee SPI Devicee block. Thuus no externaal connectionn is
needed.
efining SPI Element
E
Parrameters
4.1.2 Def
Three typ
pes of SPI ellements are used
u
in the PSIM
P
schem
matic in this eexample: SP
PI Configuration,
SPI Deviice, and SPI Output. Theeir parameterrs are set as follows:
-
SPI Confiiguration: Th
here should be
b only one SPI Configuuration elem
ment in a scheematic.
Since therre is only on
ne SPI devicee in this casee, SPISTE iss used as thee chip select signal
in this casse. The param
meters of thee SPI Configguration blocck are defineed as follow
ws:
 SP
PI Port: GPIIO16-19. No
ote that this iis the only ggroup alloweed in the TI
Ex
xperiment's Kit.
K
 Ch
hip Select Piin0 to Pin3: "Not used"
 SP
PI Buffer Sizze: 32. In thiis example, tthe minimum
m length is 44.
-
SPI Devicce MCP4922
2: According
g to the datassheet inform
mation of MC
CP4922, the
parameterrs are defineed as below:
 Ch
hip Select Piins: 0000. No
N chip selecct pin is usedd.
 Co
ommunicatio
on Speed (M
MHz): 20
 Cllock Type: "Rising
"
edgee without dellay"
 Co
ommand Wo
ord Length: 8 bits
 Sy
ync. Active Mode:
M
"Hig
gh to low"
 SP
PI Initial Command: No
o initial comm
mand
 Hardware
Ha
Inteerrupt Modee: "No hardw
ware interruppt"
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Usin
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



Interrupt Timiing: Set to “N
No Interruptt”
Co
ommand Gaaps (ns): 15
Co
onversion Seequence: No
one
SP
PI Output MCP4922
M
Chaannel A
Accordin
ng to the dataasheet inform
mation of MCP4922,
M
thee parameterss are definedd as below:
-
Device Na
ame: “SP_D
DAC”
Scale Factor: 1
Output Raange: 3.3
DAC Mod
de: DC
Sending Data
D Commaand: 0x7000
0
Data Bit Position:
P
y = x0[3..0]x1[7..0]. The rresult will bee placed in thhe last 12 biits of
two 8-bit words.
Sync. Com
mmand: None
SPI Outpu
ut MCP4922
2 Channel B
nitions are th
he same as for
fo Channel A above, exccept that the Sending Daata Commannd is
The defin
"0xF000".
nd Running Code on DS
SP
4.1.3 Geenerating an
User can simulate an
nd generate code
c
in the fo
ollowing steeps:
-
Select File >> Open to
t load the example from
m "exampless\F2833x Tarrget\DAC w
with SPI"
or "examp
ples\F2803x Target\DAC
C with SPI"..
Select Sim
mulate >> Run
R Simulattion to run thhe simulation. Note that the value off the
SCI Inputt will not chaange during the simulati on.
Select Sim
mulate >> Generate
G
Co
ode to generaate the code..
Connect the DSP boarrd to the com
mputer physiically througgh a USB caable. If a RS--232
cable is ussed to conneect the DSP board
b
with thhe computerr for SCI datta monitorinng, be
sure to dissconnect thee RS-232 cab
ble from the computer. O
Otherwise thhe DSP boardd may
not be ablle to connectt to the comp
puter properrly.
d the generaated code and
d run this exxample follow
wing the stepps below.
For CCS v5.5, upload
-
-
Start CCS
S v5.5. In CC
CS, select Prroject >> Im
mport Legaccy CCSv3.3 project andd load
the generaated project from the sub
bfolder "DA
AC with SPI ((C code)" off the schemaatic
folder. In the dialog window,
w
click
k on Next annd then Finiish to transfeer the CCS vv3.3
project to CCS v5.1. The
T project name
n
will bee displayed iin the Projecct Explorer ppanel.
Right clicck on the pro
oject name in
n the Projectt Explorer paanel, and select Build Prroject
from the pop-up
p
menu
u to build thiis example.
Select Vieew >> Target Configurrations to oppen the targeet configurattion dialog w
window
and link th
he correspon
nding user defined confiiguration (.cccxml file) too this projectt.
Click the project nam
me in the Projject Explorerr panel to seet it as the cuurrent project, and
n >> Debug
g to upload program
p
to thhe target. Affter the progrram is uploaaded,
select Run
CCS will stop at the main()
m
functiion. Select R
Run >> Freee Run to runn the program
m.
With the code runnin
ng, connect the
t RS-232 cable
c
betweeen the DSP bboard and thhe computer, and use
PSIM's DSP
D Oscillosscope featuree to display the variabless inside the D
DSP. At the same time, use a
lab digitaal oscilloscop
pe to observ
ve the SPI sig
gnals and thee D/A outpuuts.
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Usin
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The figurres below sh
how the oscillloscope wav
veforms of th
the SPI chip select signaal SPISTE, thhe SPI
clock sig
gnal SPICLK
K, and D/A outputs
o
VouttA and VoutB
B. The figurre on the low
wer right shoows the
DSP Osccilloscope sccreen with th
he two sine siignals from inside the D
DSP, which vvalidate the aanalog
output waveforms.
SP
PICL
SPIST
TE
SP
PIDOU
SPIC
CL
(a) Chip select signall SPISTE vs. SPI clock
SPICLK
(b) SP
PI clock SPIICLK vs. SP
PI output
VoutB
VouttA
o
VouttA and VouttB
(c) D/A outputs
4.2
(d) Tw
wo sine wavveforms insidde DSP
External
E
A/D
D Converter Using MC
CP3204
MCP320
04 is an A/D converter frrom Microch
hip Technoloogy Inc. It haas four inputt channels, aand it
receives a conversion
n command and returns the
t result in the same coommand. The informatioon that
PSIM needs from thee manufacturrer datasheett is listed below:
-
The
T SPI clock
k frequency is up to 1MH
Hz
The
T serial interface timing diagram of MCP3204,, as shown bbelow, indicaates that the SPI
cllock type is rising edge with
w delay, and
a the time interval bettween two coonversion
co
ommands is 500ns.
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Usin
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There is no
n device iniitial comman
nd nor start cconversion ccommand.
There are no interruptt port and sy
ynchronizatioon port.
d comman
nd is used to start converrsion and gett the result.
The samee receiving data
The receiv
ving data co
ommand of Channel
C
0 is 0x06,0x00,00x00, and thhe command of
Channel 2 is 0x06,0x8
80,0x00. Th
he result will be placed inn the last 12 bits of the
command
d.
rcuit Schem
matic
xample, two analog voltaage signals are
a convertedd by MCP32204, and are sent to DSP
P via
files of this example aree in the foldeer "exampless\F2833x Taarget\ADC w
with SPI" forr
and "examplles\F2803x Target\ADC
T
with SPI" fo
for F2803x.
dware circuitt diagram forr the F2833x
x Target is shhown below
w.
dware circuitt diagram forr the F2803x
x Target is shhown below
w.
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Usin
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In this ex
xample, insteead of using only the SPISTE signall, it will use SPISTE as w
well as GPIO
O32 and
GPIO30, together wiith the decod
der chip 74H
HCT138, to ggenerate the chip select ssignal for thee A/D
converterr.
The correesponding PSIM schemaatic for F283
335 target is shown below.
The correesponding PSIM schemaatic for the F2803x
F
Targget is shown below.
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Usin
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Note thatt since two GPIO
G
pins arre used to geenerate the cchip select siignal, nodes CS0 and CS
S1 of the
SPI Conffiguration bllock and the SPI Device are connecteed.
4.2.2 Deffining SPI Element
E
Parrameters
Parameteers of the SP
PI blocks are set as follow
ws:
-
SPI Confiiguration
Two chip
p select pins are used in this examplee.
-
SPI Port: GPIO16-19
9
PIO32
Chip Seleect Pin0: GP
Chip Seleect Pin1: GP
PIO30
Chip Seleect Pin2 and Pin3: "Not used"
SPI Bufferr Size: 32. In
I this examp
ple, the miniimum is 4.
SPI Devicce MCP3204
4
ng to the dataasheet inform
mation of MCP2304,
M
thee parameterss are definedd as below:
Accordin
-
Chip Select Pins: 000
01. It means that GPIO322 = 1 and GP
PIO30 = 0.
Communiication Speed (MHz): 2.8
Clock Typ
pe: "Rising edge
e
with deelay"
Command
d Word Leng
gth: 8 bits
Sync. Acttive Mode: Do
D not care
SPI Initial Command:: No initial command.
c
Hardwaree Interrupt Mode:
M
Do no
ot care
Interrupt Timing: "No
o interrupt"
Command
d Gaps (ns): 0
Conversio
on Sequencee: None
SPI Input MCP3204 Channel
C
0
ng to the dataasheet inform
mation of MCP3204,
M
thee parameterss are definedd as below:
Accordin
-
Device Na
ame: "MCP3204"
Start Conv
version Com
mmand: Non
ne
Receiving
g Data Comm
mand: 0x06, 0x00, 0x000
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Usin
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-
Data Bit Position:
P
y=
=x1[3..0]x2[7
7..0]
Input Ran
nge: 3.3V
Scale Factor: 1
ADC Mod
de: DC
Initial Vallue: 0
SPI Input MCP3204 Channel
C
2
The defin
nitions are th
he same as for
fo Channel 0,
0 except thaat the Receivving Data Coommand is
0x06,0x8
80,0x00.
4.2.3 Ru
unning the Code
C
The proccess to generrate, compilee, and run thee code is sim
milar to whatt is describedd in Section 4.1.3.
Below arre some oscilloscope wav
veforms from
m lab experiiments.
SPIC
CL
SPISTE
SPID
DIN
SPIC
CL
(a) Signaal SPISTE vs.
v SPI clock
k SPICLK
(b) SP I clock SPIC
CLK vs. A/D
D output
SPICL
S
SPIDOU
S
K vs. A/D co
onversion co
ommand
(c) SPI clock SPICLK
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Usin
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4.3
External
E
A/D
D Converter with Interrrupt Usingg TLV1548
TLV1548
8 is an 8-chaannel A/D co
onverter from
m Texas Insttruments. It receives a conversion
command
d to start con
nversion, and
d it generatees an interruppt when connversion com
mpletes. Thenn it
receives the next chaannel conversion commaand and sendds the result ffrom the preevious conveersion in
s
the same command sequence.
The inforrmation that PSIM needss from the manufacturer
m
r datasheet iss listed below
w:
-
The
T SPI clock
k frequency is up to 2MH
Hz
The
T command
d word lengtth is found to be 14 bits (either 10 orr 12 bits wouuld not workk).
The
T serial interface timing diagram of TLV1548, as shown below, indicaates that the SPI
cllock type is rising edge with
w delay, and
a the time interval bettween two coonversion
co
ommands is 0ns.
-
There is no
n synchroniization signaal.
For the faast conversio
on mode, thee command i s 0x2400.
The hardw
ware interrup
pt is triggereed at the risinng edge of E
EOC (end off conversion)).
Since therre is only on
ne 10-bit AD
DC unit in TL
LV1548, if thhere are mulltiple input
channels, conversion needs to be done one chhannel at a tiime.
mple only uses Channel 0 and Channnel 2, and thee conversionn order is
This exam
TLV1548
8_CH0, TLV
V1548_CH2.
The conveersion comm
mand is 0x00
000 for Channnel 0; and is 0x1000 forr Channel 2..
atic
4.3.1 Cirrcuit Schema
In this ex
xample, two analog voltaage signals are
a convertedd by TLV15548, and are sent to DSP via
SPI. The files of this example aree in the foldeer "exampless\F2833x Taarget\ADC (interrupt) with SPI"
3x and "exam
mples\F2803
3x Target\AD
DC (interruppt) with SPI"" for F2803xx.
for F2833
The hard
dware circuitt diagram forr the F2833x
x Target is shhown below
w.
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Usin
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The hard
dware circuitt diagram forr the F2803x
x Target is shhown below
w.
This exam
mple uses th
he SPISTE pin as well ass GPIO30 annd GPIO32 tto generate thhe chip selecct
signal. TLV1548 gen
nerates interrrupt through
h Port GPIO115.
The correesponding PSIM schemaatic for the F2833x
F
targeet is shown bbelow.
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Usin
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The correesponding PSIM schemaatic for the F2803x
F
Targget is shown below.
In the sch
hematic, nod
des CS0 and CS1 of the SPI Configuuration blockk and the SP
PI Device bloock are
connected. Again, it is implied th
hat SPISTE, SPICLK, SP
PIDIN, and SPIDOUT ppins are connnected
between the SPI Con
nfiguration block
b
and thee SPI Devicee, and no extternal connection is needded.
The interrrupt output of the SPI device TLV1548 is conneected to the D0 pin of thhe digital inpput
block, an
nd D0 is defiined as GPIO
O15.
When TL
LV1548 receeives the starrt conversion
n command, it will start the conversiion on Channnel 0.
Once thee conversion is complete, TLV1548 will
w generatee an interruppt. DSP will respond to tthis
interrupt,, and send an
nother comm
mand. TLV1548 will starrt the converrsion on Chaannel 2, and will
send back
k the converrsion result of
o Channel 0.
0
4.3.2 Def
efining SPI Element
E
Parrameters
Parameteers of the SP
PI blocks are set as follow
ws:
-
SPI Confiiguration
p select pins are used in this examplee.
Two chip
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-
SPI Port: GPIO16-19
9
PIO32
Chip Seleect Pin0: GP
Chip Seleect Pin1: GP
PIO30
Chip Seleect Pin2 and 3: "Not useed"
SPI Buffeer Size: 32
SPI Devicce TLV1548
8
Accordin
ng to the dataasheet inform
mation of TL
LV1548, thee parameters are defined as below:
-
Chip Select Pins: 001
11. That is, GPIO32
G
= 1 and GPIO300 = 1.
Communiication Speed (MHz): 2
Clock Typ
pe: "Rising edge
e
with deelay"
Command
d Word Leng
gth: 14 bits
Sync. Acttive Mode: Do
D not care
SPI Initiall Command:: 0x2400
Hardwaree Interrupt Mode:
M
"Risin
ng edge"
Interrupt Timing: "M
Multiple interrrupt in seriees"
d Gap (ns): 0
Command
Conversio
on Sequence: "TLV1548
8_CH0,TLV
V1548_CH2""
SPI Input TLV1548 Channel
C
0
ng to the dataasheet inform
mation of TL
LV1548, thee parameters are defined as below:
Accordin
-
Device Na
ame: "TLV1
1548"
Start Conv
version Com
mmand: 0x0
0000
Receiving
g Data Comm
mand: 0x080
00. This is aalso the convversion comm
mand of Chaannel 2.
Data Bit Position:
P
y=
=x0[13..4]
Input Ran
nge: 3.3
Scale Factor: 1
de: DC
ADC Mod
Initial Vallue: 0
SPI Input TLV1548 Channel
C
2
he same as for
f Channel 0,
0 except thaat there is noo Start Conversion Comm
mand.
The parameters are th
The Receeive Data Co
ommand of Channel
C
0 iss also the connversion com
mmand of Chhannel 2. Allso, the
Receive Data
D Comm
mand is 0x200
00, and this is a dummy command.
4.3.3 Geenerating an
nd Running Code on DS
SP
The proccess to generrate, compilee, and run thee code is sim
milar to whatt is describedd in Section 4.1.3.
Below arre some oscilloscope wav
veforms from
m lab experiiments.
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Usin
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SPISTE
SPIS
STE
SPIC
CL
(a) Signal SPIST
TE vs. SPI clock SPICLK
K
SPIC
CL
(b) D
Detailed view
w of SPISTE vs. SPICLK
K
SPICL
SP
PICL
(b) SPI clock SPIICLK vs. A//D result
(d) SP
PI clock SPIICLK vs. conversion com
mmand
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