1. technology and computing
2. electronic components

IMPLEMENTATION OF A MOBILE 10 GHZ CONTINUOUS WAVE DOPPLER RADAR
A Project
Presented to the faculty of the Department of Electrical and Electronics Engineering
California State University, Sacramento
Submitted in partial satisfaction of
the requirements for the degree of
MASTER OF SCIENCE
in
Electrical and Electronics Engineering
by
Mick Khamphithoun Chanthaseth
SPRING
2015
© 2015
Mick Khamphithoun Chanthaseth
ALL RIGHTS RESERVED
ii
IMPLEMENTATION OF A MOBILE 10 GHZ CONTINUOUS WAVE DOPPLER RADAR
A Project
by
Mick Khamphithoun Chanthaseth
Approved by:
__________________________________, Committee Chair
Dr. Milica Markovic
__________________________________, Second Reader
Dr. Preetham Kumar
____________________________
Date
iii
Student: Mick Khamphithoun Chanthaseth
I certify that this student has met the requirements for format contained in the University format
manual, and that this project is suitable for shelving in the Library and credit is to be awarded for
the project.
__________________________, Graduate Coordinator ___________________
Dr. Preetham Kumar
Date
Department of Electrical and Electronics Engineering
iv
Abstract
of
10 GHZ DOPPLER RADAR
by
Mick Khamphithoun Chanthaseth
This project presents circuits necessary to create a mobile Continuous Wave Doppler
radar for fall detection. A radar as an assistive device for the elderly will solve the main
problem with current marketed devices because a radar does not require user interaction.
Currently, most radars are large and are not practical for mobile use. The project involves
design, fabrication, and testing of an oscillator, antennas, an amplifier, a power splitter, a
mixer, and a low pass filter. The end products are components with sizes ranging from
one inch by one inch to one inch by three inches, which makes it feasible to construct the
mobile radar.
_______________________, Committee Chair
Dr. Milica Markovic
_______________________
Date
v
TABLE OF CONTENTS
Page
List of Tables ........................................................................................................................ viii
List of Figures .......................................................................................................................... ix
Chapter
1. INTRODUCTION.…………….. ……………………………………………………….. 1
1.1 Overview................................................................................................................ 4
2. BACKGROUND THEORY ............................................................................................... 7
2.1 Oscillator................................................................................................................ 7
2.1.1 Negative Resistance Oscillator .............................................................. 8
2.2 Power Divider ...................................................................................................... 10
2.3 High Gain Amplifier ............................................................................................ 11
2.4 Transmitter and Receiver Antenna ...................................................................... 12
2.5 Low Noise Amplifier ........................................................................................... 15
2.6 Mixer………. ....................................................................................................... 17
2.7 Low Pass Filter .................................................................................................... 19
3. ADS AND HFSS SIMULATIONS .................................................................................. 20
3.1 Antenna ................................................................................................................ 20
3.2 Oscillator.............................................................................................................. 24
3.3 Amplifier.............................................................................................................. 35
3.3.1 Low Noise Amplifier (LNA) ............................................................... 35
3.3.2 Maximum Gain Amplifier ................................................................... 43
3.4 Power Divider ...................................................................................................... 47
vi
3.5 Mixer……............................................................................................................ 50
3.6 Low Pass Filter .................................................................................................... 53
4. CIRCUIT FABRICATION AND MEASUREMENTS ................................................... 55
4.1 Antenna ................................................................................................................ 56
4.2 Oscillator.............................................................................................................. 59
4.3 Amplifier.............................................................................................................. 62
4.3.1 High Gain Amplifier ............................................................................ 62
4.4 Power Divider ...................................................................................................... 66
4.5 Mixer…................................................................................................................ 70
5. CONCLUSION ................................................................................................................. 72
REFERENCES ....................................................................................................................... 74
vii
LIST OF TABLES
Tables
Page
1.
Substrate Properties for Antenna Fabrication……… .………………………………. 20
2.
Antenna Bill of Materials………………………….… .. ……………………………. 24
3.
Substrate Properties for Oscillator Fabrication..….…………………………………. 24
4.
Oscillator Bill of Materials……………………….……… …………………………. 34
5.
Substrate Properties for Amplifier Fabrication….……… . …………………………. 35
6.
LNA Bill of Materials……….……… ............................... …………………………. 43
7.
Maximum Gain Amplifier Bill of Materials…….……… . …………………………. 46
8.
Power Divider Bill of Materials………………….……… …………………………. 50
9.
Mixer Bill of Materials……………………….……… ..... …………………………. 52
10.
Comparison of Simulated and Actual Results for Antenna …………………………. 58
11.
Comparison of Simulated and Actual Results for Oscillator..………………………. 61
12.
Comparison of Simulated and Actual Results for Max Gain Amplifier.……………. 64
13.
Comparison of Simulated and Actual Results for Power Divider..…………………. 70
viii
LIST OF FIGURES
Figures
Page
1.
Radar Overview………………………………… ...... .………………………………. 6
2.
Quadrature Hybrid Circuit Diagram in ADS…….… .... ……………………………. 11
3.
Far Field Region………………………….… ............... ……………………………. 13
4.
Gamma Compromise………………………….… ........ ……………………………. 16
5.
Printed Dipole Model……………………….… ............ ……………………………. 21
6.
3D Radiation Pattern of Antenna………………….… .. ……………………………. 21
7.
Return Loss of Antenna………………………….… .... ……………………………. 22
8.
VSWR of Antenna………………………….… ............ ……………………………. 22
9.
HFSS Antenna Parameters………………………….… ……………………………. 23
10.
Schematic for Oscillator Bias Sweep……………….… ……………………………. 25
11.
Oscillator Bias Simulation Results………………….… ……………………………. 25
12.
Oscillator Bias Network with Simulation Results….… ……………………………. 26
13.
Schematic for Oscillator Feedback Inductor Sweep.… . ……………………………. 26
14.
Stability Factor Mu as a Function of Base Inductor for Circuit in Figure
13………………………….…....................................... ……………………………. 27
15.
Schematic for Oscillator Instability Sweep……….… ... ……………………………. 27
16.
Smith Chart to Determine the Load and Terminal Impedances..……………………. 28
17.
Schematic for Oscillation Test Using Ideal Equations....……………………………. 29
18.
Simulation Results for Oscillation Test Using Ideal Equations…..…………………. 30
19.
Schematic for Oscillation Test from Using Stubs.......... ……………………………. 30
20.
Oscillation Test Results from Using Stubs………….… ……………………………. 31
ix
21.
Recalculations of Microstrip Components Simulation Results...……………………. 32
22.
Schematic for Oscillator with Microstrip Lines…….… ……………………………. 33
23.
Oscillator Simulation Results…….… ........................... ……………………………. 34
24.
LNA Bias Circuit………………………….… .............. ……………………………. 36
25.
Amplifier S-Parameters before Matching Circuit….… . ……………………………. 37
26.
Stability Plot before Adding the Stability Circuit….… . ……………………………. 37
27.
LNA Stability Circuit………………………….… ........ ……………………………. 38
28.
LNA S-Parameters after Stability Circuit………….… . ……………………………. 39
29.
LNA Stability…………………….… ............................ ……………………………. 39
30.
Max Gain Point and Lowest Noise Point………….… .. ……………………………. 40
31.
Transistor Noise before Matching Circuits………….… ……………………………. 40
32.
Matching Circuits……………………….….................. ……………………………. 41
33.
Noise Factor Reduction after Matching Circuits….… .. ……………………………. 42
34.
Final Gain of LNA………………………….… ............ ……………………………. 42
35.
Schematic for Maximum Gain Amplifier………….… . ……………………………. 44
36.
Maximum Gain Amplifier S-Parameters after Being Matched...……………………. 45
37.
Max Gain Amplifier Stability Plot………………….… ……………………………. 46
38.
Schematic for Ideal Power Divider………………….… ……………………………. 47
39.
Ideal Power Divider Simulation Results…………….… ……………………………. 48
40.
Power Divider Microstrip Model………………….… .. ……………………………. 49
41.
Power Divider Simulation Results………………….… ……………………………. 49
42.
Schematic for an Ideal Mixer……………………….… ……………………………. 51
43.
Mixer Output from Different Input Frequencies…….………………………………. 51
x
44.
Schematic for Mixer ………………………….…......... ……………………………. 52
45.
Simulation Results for Mixer Circuit……………….… ……………………………. 52
46.
ADS Filter Design Guide………………………….… .. ……………………………. 53
47.
Schematic for Lumped Elements Filter…………….… ……………………………. 54
48.
Low Pass Filter Simulation Results……………….… .. ……………………………. 54
49.
Layout of Signal and Ground Layers for Antenna….… ……………………………. 56
50.
Antenna Signal Path……………………….… .............. ……………………………. 57
51.
Antenna Ground Path……………………….… ............ ……………………………. 57
52.
Antenna Test Setup………………………….… ........... ……………………………. 57
53.
Antenna Test Results on Network Analyzer……….… . ……………………………. 58
54.
Layout of the Oscillator………………………….… .... ……………………………. 59
55.
Fabricated Oscillator………………………….… ......... ……………………………. 60
56.
Oscillator Test Setup with Spectrum Analyzer…….… . ……………………………. 60
57.
Oscillator Test Results on Spectrum Analyzer…….… . ……………………………. 61
58.
High Gain Amplifier Layout…………………….… ..... ……………………………. 62
59.
Max Gain Amplifier Fabricated Circuit…………….… ……………………………. 63
60.
Amplifier Test Setup with Spectrum Analyzer…….… . ……………………………. 63
61.
Max Gain Amplifier at 5 GHz on Spectrum Analyzer .. ……………………………. 64
62.
Power Divider Layout………………………….… ....... ……………………………. 66
63.
50 Ohm Terminal………………………….… .............. ……………………………. 67
64.
Fabricated Power Divider………………………….… . ……………………………. 67
65.
Power Divider Test Setups with Network Analyzer.… . ……………………………. 68
66.
Port 3 Test Connection………………………….…...... ……………………………. 69
xi
67.
Port 2 Test Connection………………………….…...... ……………………………. 69
68.
Forward Transmission at Port 3, S31……………….… ……………………………. 69
69.
Forward Transmission at Port 2, S21……………….… ……………………………. 69
70.
Return Loss at Port 1, S11………………………….… ……………………………. 69
71.
Layout of the Mixer………………………….… .......... ……………………………. 71
72.
Fabricated Mixer………………………….… ............... ……………………………. 71
xii
1
Chapter 1
INTRODUCTION
We often associate the term radar with the military and the term Doppler radar with the
meteorologist, but there are many more applications to radars. The latest vehicles are equipped
with radars as proximity sensors. Even some children’s toys are equipped with radars to track
position. Radar is an acronym for Radio-Detection-And-Ranging. It operates by transmitting a
signal and analyzing the signal that reflects from an object. Through analysis, one could
determine whether the object is a vehicle, a cloud, or other. This project demonstrates design of
electronic circuits necessary to develop a device for mobile radar. This radar could be used to
detect a falling person, specifically how close a person is to the ground.
Devices such as accelerometers, radars, and cameras, are typical devices for fall
detection. Accelerometers are mechanical devices that, in conjunction with electronics, sense
movements. Accelerometers have short lifetime because of their mechanical nature. Another
device for object detection is a camera. Cameras record movements, but they do not work well in
low or no light setting. Another disadvantage is that even the slowest frame rate and the smallest
resolution can overload a processor with complex algorithms. Radar is a better choice than a
camera or an accelerometer because it does not need complex algorithms or moving parts.
The radar in this project is a Continuous Wave Doppler radar. A Doppler radar detects a
moving object by analyzing the frequency shift between the transmitted signal and the received
signal. Components needed to construct a Doppler radar are an oscillator, amplifiers, power
splitter, a mixer, and antennas. Design and implementation of these circuits are described in
Chapters 3 and 4.
2
Radars for physiological uses are a timely topic. Some state-of-the-art topics in recent
years are cooperative fall detection [13], comparison between frequencies for vital sensing [7],
and RCS of human movements [8]. These topics arise from a common consensus that the
population of senior citizens will increase in the future.
In the paper Cooperative Fall Detection Using Doppler Radar and Array Sensor [13],
Hong described using radar along with machine learning for fall detection. The radar used was a
stationary Continuous Wave Doppler radar. Hong recognized that the percentage of senior
citizens would double by the year 2050, and in Japan, there is a large percentage of seniors living
alone. This population could benefit from fall detection technology. The research was conducted
because there was not much information available on non-line-of-sight radars (NLOS). Most
radars require line-of-sight (LOS) because the reception is best with LOS. To assist with NLOS
losses, Hong used an antenna array, which increases gain for the receiver antenna. Antenna gains
are proportional to aperture size; therefore, adding more antennas is equivalent to increasing the
aperture size. Aside from the antenna array, Hong also used a Support Vector Machine (SVM)
learning algorithm to categorize features of a fall. The advantage of Hong’s system is that the
radar could be stationary and not be placed directly on the subject, which could also be a
disadvantage because sensing range is limited. Another disadvantage is that it requires post
processing using machine learning. The SVM algorithm must be trained to learn what to
categorize as a fall and what not to categorize as a fall.
Another similar project is radar-based fall detection based on Doppler time–frequency
signatures for assisted living [14]. In this project, Wu experiments with Bayesian classification
technique, rather than SVM, for a fall detection algorithm. Like the previous project, this project
uses a stationary Continuous Wave Doppler radar. The Bayesian classification technique is used
to categorize different types of falls. It uses Relevance Vectors Machine (RVM) rather than
3
Support Vectors, which reduces computation time and provides better results. From the return
signal, Wu analyzes the Short-time Fourier transform of the returned signal and classifies its
features through RVM.
A couple of other projects are using radars for different purposes, but like fall detection,
those other projects contribute to understanding human physiology. One compares sensing vitals
at a couple of frequencies [7]. The other compares RCS at multiple frequencies [8]. Both of these
projects experiment detecting heartbeats using the Continuous Wave Doppler radar. In the first
project, Jun researches radar operating at 2.4 𝐺𝐺𝐺 and at 10 𝐺𝐺𝐺 combined with digital signal
processing to detect heartbeats. In his paper, Yong-Jun shows advantages of operating at 10 𝐺𝐺𝐺
versus 2.4 𝐺𝐺𝐺. Operating at 10 𝐺𝐺𝐺 gives better radar cross section (RCS), better gain, and
shows better Doppler effects. In the second project, G. De Pasquale also develops models to
detect the human heart using frequencies from 1 𝐺𝐺𝐺 to 10 𝐺𝐺𝐺. Both works show that modern
physiological science could benefit from radars.
In the projects previously mentioned, the radars are all stationary radars. While these
works focuses on signatures of the reflected signal, this project focuses on the hardware required
to build a mobile radar. It could then be used in conjunction with software algorithms to classify
falls.
In this project, software and hardware available in the Microwave Laboratory at
California State University, Sacramento is used. Software used for this project are Agilent’s
Advanced Design System (ADS) [18] and Ansys High-Frequency Structure Simulator (HFSS)
[19]. Hardware used for this project is Roger’s Duroid 4003C and 5880 laminates, Infineon
BFP740 BJT transistor, Infineon BFP840 BJT transistor, and various passive lumped element
components. For manufacturing, the T-TECH 9000 PCB router is used to mill the PCBs.
4
1.1 Overview
This project demonstrates design of seven components that make up the radar: oscillator,
power divider, high gain amplifier, low noise amplifier, transmitter antenna, receiver antenna, a
mixer, and a low pass filter. Figure 1 shows a block diagram of the radar.
All of the radars mentioned in the previous section, as well as in this project, are
Continuous Wave Doppler radars. This type of radar transmits a signal at a single frequency and,
if the target is moving, it receives a reflection of the same signal at slightly higher or lower
frequency. From this frequency shift, the speed of the monitored object can be deduced. Another
type of radar is the pulse Doppler radar. A pulse Doppler radar sends pulses and waits for the
pulses to arrive at the receiver. The advantage to the pulse radar is the ability to detect a
stationary object. The disadvantage is the complexity of the system because it needs post
processing of the received signal to calculate time delays. The simplicity of the Continuous Wave
Doppler radar, as opposed to the pulsed Doppler radar, makes it more favorable to construct.
The block diagram of typical radar is shown in Figure 1. The output of the oscillator
connects to a power splitter. A power splitter splits an input signal evenly to two output ports.
The signals at the output ports have the same frequency but different phase shifts. One of the
outputs connects to the transmitter, and the other output connects to the receiver. The transmitter
consists of a power amplifier and an antenna. In this project, a small-signal high-gain amplifier is
used. This amplifier would drive a power-amplifier in a future implementation of the radar. An
amplifier is a transistor driven in linear stable mode and matched to amplify a signal at a specific
frequency. The last component of the transmitter circuit is an antenna. An antenna radiates a
signal from the transmitter circuit into free space. The signal reflects from an object and then it is
detected by the receiver antenna. Throughout its travel path, the signal loses strength, but the
signal is amplified by the low-noise receiving amplifier. The signal then mixes with a local signal
5
at the mixer. The output of the mixer is a signal at multiple frequencies; one of the frequencies is
the difference between the transmitted frequency and the received frequency. A low pass filter is
used to extract the difference frequency. The difference between two frequencies equates to the
speed of the tracked object. The Doppler shift is calculated by
𝑓𝑑 =
2𝑣𝑓𝑐
𝑐−𝑣
If a person fell from two meters, their speed, using kinematics, would be
𝑣𝑓 = �𝑣02 + 2𝑎(𝑥 − 𝑥0 )
𝑣𝑓 = �2(9.8)(2)
𝑣𝑓 = 6.26 𝑚/𝑠
Using equation 1.1, the Doppler frequency is
𝑓𝑑 =
2(6.26)(1010 )
= 1.3 𝑘𝑘𝑘
108 − (6.26)
(1.1)
6
Figure 1 - Radar Overview
This project is organized as follows: Chapter 1 presents the motivation for the project,
Chapter 2 presents the review of background theory, Chapter 3 contains design and computer
simulations for the circuits, Chapter 4 contains the results from circuit fabrication and
measurements, and chapter 5 concludes the project.
7
Chapter 2
BACKGROUND THEORY
Microwave Engineering is the study of communication circuits within the frequencies
ranging from 300 MHz to 300 GHz with corresponding wavelengths from one meter to one
millimeter. To create a 10 GHz Doppler radar, oscillator, power splitter, amplifiers, antennas,
mixer, and low pass filter design, are discussed.
2.1 Oscillator
An oscillator is a device that generates an RF signal. Some popular oscillator design
methods are Colpitts, Hartley, negative feedback, and crystal oscillator. The oscillator chosen for
this project is a negative feedback oscillator. This configuration is best since the oscillation
frequency for this project is 10 GHz. Lumped elements such as inductors and capacitors do not
behave like ideal components at high frequencies [3]; therefore, the other choices for oscillator
design are difficult to implement. The only capacitors and inductors used in this project are DC
Block and RF Choke components. DC Block components are capacitors placed at the input and
the output of a transistor circuit; Bypass Capacitor is another name for these components. Its
purpose is to contain the DC current in the bias circuit, and to bypass the AC signal. RF Choke
components are inductors placed on the DC bias to allow DC current to pass, but not AC current.
The input and output capacitors must have resistance small enough to not disrupt the
input and output impedances of the transistor circuit. Equations 2.1 and 2.2 show that high
capacitor values correspond to lower capacitor impedance. Choosing a high value capacitor
should work for all cases, but the caveat is the physical limitation of the capacitor [15]. Loop
inductance associated with the connection terminals makes the capacitor look like an inductor at
8
high frequencies. The bypass capacitors chosen for the input and output should exceed the criteria
in equations 2.1 and 2.2.
1
≪ 𝑅𝑖𝑖
2𝜋𝜋𝐶𝑖𝑖
1
≪ 𝑅𝑜𝑢𝑢
2𝜋𝜋𝐶𝑜𝑜𝑜
(2.1)
(2.2)
where 𝐶𝑖𝑖 is the capacitor at the input circuit, 𝑅𝑖𝑖 is the resistance at the input of the capacitor,
𝐶𝑜𝑜𝑜 is the capacitor at the output circuit, and 𝑅𝑜𝑜𝑜 is the resistance at the output of the capacitor.
Frequency dictates inductance needed for RF chokes. Much like the capacitors, high
inductor values are favored; however, larger inductances usually have larger parasitic
capacitances. Equation 2.3 determines the inductance values.
𝐿=
𝑍
2𝜋𝜋
(2.3)
2.1.1 Negative Resistance Oscillator
Oscillation occurs when a circuit is unstable. For oscillation to occur, input or output
reflection coefficient |Γ𝐼𝐼 | 𝑜𝑜 |Γ𝑂𝑂𝑂 | should be greater than one. If Γ𝐼𝐼 is greater than one, then
Γ𝑂𝑂𝑂 is greater than one too. Overlapping plot of Γ𝑇 and Γ𝑖𝑖 on a Smith chart is used to determine
the terminal and load impedances that generate instability [2]. Γ𝑇 is the reflection that the
transistor wants to see at the output terminal, the connection at the collector. Γ𝑖𝑖 is the reflection
that is present at the input of the transistor; the connection at the base.
9
Kurokawa’s [10] condition for stable oscillation is
𝜕𝑋𝐿 (𝜔)
𝜕𝑅𝐼𝐼 (𝐴)
|𝐴=𝐴0
|
>0
𝜕𝜕
𝜕𝜕 𝜔=𝜔0
Where 𝑅𝐼𝐼 (𝐴) is the input resistance as a function of the amplitude of the current through the
transistor, 𝐴0 is the amplitude of the current at the frequency of oscillation, 𝑋𝐿 (𝜔) is the
reactance of the load as a function of the frequency of the current through the transistor, and 𝜔0 is
the frequency of oscillation.
𝑅𝐼𝐼 and 𝑃 is
𝑅𝐼𝐼 = −𝑅𝑜 �1 −
𝐴
�
𝐴𝑀
𝐴
1
1
�
𝑃 = |𝐼|2 |𝑅𝐼𝐼 | = 𝐴2 �1 −
𝐴𝑀
2
2
where 𝑃 is the power generated by the transistor, 𝐴 is the amplitude of the current through the
transistor, 𝐴𝑀 is the maximum current through the transistor, and 𝑅0 is the maximum input
resistance of the transistor.
The derivative of power should be zero for max power.
𝜕𝜕
𝜕 1 2
𝐴
=
𝐴 �1 −
�=0
𝜕𝜕 𝜕𝜕 2
𝐴𝑀
𝜕 1 2
𝜕 1 2 𝐴
𝐴 −
𝐴
=0
𝜕𝜕 2
𝜕𝜕 2 𝐴𝑀
𝐴−
𝐴=
3 𝐴2
=0
2 𝐴𝑀
2
3 𝐴2
→ 𝐴𝑀 = 𝐴
2 𝐴𝑀 3
2
𝐴 = 𝐴𝑀
3
(2.4)
10
For optimal load resistance:
∗
∗
𝑅𝐿 = 𝑅𝐼𝐼
, and 𝑅𝐼𝐼
= 𝑟𝑟𝑟𝑟 ∴ 𝑅𝐿 = 𝑅𝐼𝐼
2
𝐴𝑀
𝐴
𝑅0
� → 𝑅𝐿 = −𝑅0 �1 − 3
� → 𝑅𝐿 = −
𝑅𝐿 = −𝑅0 �1 −
𝐴𝑀
3
𝐴𝑀
𝑅𝐿 = −
𝑅0
3
(2.5)
The above equation means that if the load resistance is negative 1/3 of the maximum input
resistance, the output power is maximized.
2.2 Power Divider
A power divider splits the power exerted at one port into multiple paths. Many types of
dividers exist, such as T-Junction, Resistive, Wilkinson, etc. The one used for this project is a
Quadrature (90°) Hybrid.
The scattering matrix for a Quadrature Hybrid is
0 𝑗
𝑗 0
[𝑆] = −
�
√2 1 0
0 1
1
1 0
0 1
�
0 𝑗
𝑗 0
(2.6)
Assuming that the intrinsic impedance of the ports is 50 Ω, Figure 2 displays a Quadrature
Hybrid.
11
Figure 2 - Quadrature Hybrid Circuit Diagram in ADS
The power from port one splits to port two and port three. The power at port two is half
of port one and has a phase shift of negative 90°. The power at port three is half of port one and
has a phase shift of negative 180°. The power at port two and port three is 90° apart.
2.3 High Gain Amplifier
A high-gain amplifier at microwave frequencies is an amplifier that has its impedance
matched at the input and output for maximum gain. The transistor gain is given in a datasheet as
𝑆21. Matching the input of the transistor results in gain improvement at the input and matching
the output of the transistor results in gain improvement at the output. The maximum unilateral
transducer gain equations are given below.
𝐺𝐼𝐼𝐼𝐼𝐼 =
1
1 − |𝑆11 |2
𝐺𝑂𝑂𝑂𝑂𝑂𝑂 =
1
1 − |𝑆22 |2
𝐺0 = |S21 |2
(2.7)
(2.8)
(2.9)
12
𝑇𝑇𝑇𝑇𝑇 𝐺𝐺𝐺𝐺 = 𝐺𝐼𝐼𝐼𝐼𝐼 𝐺0 𝐺𝑂𝑂𝑂𝑂𝑂𝑂
(2.10)
Before any of the matching circuit, the transistor must be biased. Subsequently, the
transistor has to be stable for every frequency up to the transition frequency found in the
datasheet. If the transistor is not stabilized in the entire frequency range, the transistor could
oscillate when presented with a load at a frequency that makes it unstable. Oscillations could
damage circuits as well as reduce gain in its operating points. There are a couple of parameters
that ensure that the circuit is stable, which are Mu and MuPrime [13].
Δ = 𝑆11 𝑆22 − 𝑆12 𝑆21
𝑀𝑀 =
1 − |𝑆11 |2
∗
|𝑆22 − 𝑆11
Δ| + |𝑆21 𝑆12 |
𝑀𝑀𝑀𝑀𝑀𝑀𝑀 =
1 − |𝑆22 |2
∗
|𝑆11 − 𝑆22
Δ| + |𝑆21 𝑆12 |
(2.11)
(2.12)
(2.13)
To have an unconditionally stable transistor, the values Mu and MuPrime must both be
greater than one. In general, mu represents the distance between the center of the Smith Chart and
the circle where the transistor is unstable. Mu represents the stability of the source, and MuPrime
represents the stability of the load side. If Mu and MuPrime are less than one, the transistor has
the potential to oscillate.
2.4 Transmitter and Receiver Antenna
Antennas radiate signal energy into the air. The antenna for this project is a half-wave
printed dipole antenna. The energy radiates from a dipole because the current from the signal path
13
and the ground path are separated and the currents are in the same direction. The antenna is
designed in HFSS on a Duroid 4003C 32mil board.
The radiation can be estimated with equations for a thin dipole where the cross area of
each dipole is zero. In the following derivation [1], current components in the x and y directions
are zero because the area of the dipole is assumed to be zero. There is only current in the 𝑧
direction, given as follows:
𝑙
𝑙
� 𝑧 𝐼0 sin �𝑘 � − 𝑧′�� , 0 ≤ 𝑧′ ≤
𝒂
2
2
𝐼𝑒 (𝑥 ′ = 0, 𝑦 ′ = 0, 𝑧 ′ ) = �
𝑙
𝑙
� 𝑧 𝐼0 sin �𝑘 � + 𝑧′�� , − ≤ 𝑧 ′ ≤ 0
𝒂
2
2
The previous equation describes the current as a function of 𝑧. 𝑙 is the length of each dipole, 𝑘 is
the wave number, and 𝐼0 is a constant describing the amplitude of the current. In a far field
region, the received wave is a plane wave; it is the distance where 𝑟 is approximately equal to 𝑅
as shown in Figure 3. Equation 2.14 defines the far field distance.
𝑑𝑓𝑓𝑓 𝑓𝑓𝑓𝑓𝑓 =
2𝐷2
𝜆
(2.14)
where 𝐷 is the largest dimension of the antenna, and 𝜆 is the wavelength.
Figure 3 - Far Field Region
In Figure 3, 𝑅 is the distance from the transmitter antenna to the farthest end of the
receiver antenna, and 𝑟 is the distance from the transmitter antenna to the nearest point of the
receiver antenna.
14
When the distance of the receiver is in the far field region, the electric field is in the form:
𝑑𝐸𝜃 ≈ 𝑗𝑗
𝑙
2
𝑘𝐼𝑒 (𝑥 ′ , 𝑦 ′ , 𝑧′)
𝑠𝑠𝑠𝑠𝑠𝑠′
4𝜋𝜋
𝑙
𝑘𝑒 −𝑗𝑗𝑗
2
′
𝑠𝑠𝑠𝑠 �� 𝐼𝑒 (𝑥 ′ , 𝑦 ′ , 𝑧′)𝑒 𝑗𝑗𝑧 𝑐𝑐𝑐𝑐 𝑑𝑑′�
𝐸𝜃 = � 𝑑𝐸𝜃 = 𝑗𝑗
𝑙
𝑙
4𝜋𝜋
−
−
2
𝑘𝑘
2
𝑘𝑘
𝑘𝐼0 𝑒 −𝑗𝑗𝑗 cos � 2 𝑐𝑐𝑐𝑐� − cos � 2 �
𝐸𝜃 ≈ 𝑗𝑗
�
�
𝑠𝑠𝑠𝑠
2𝜋𝜋
𝑘𝑘
𝑘𝑘
𝐸𝜃
𝐼0 𝑒 −𝑗𝑗𝑗 cos � 2 𝑐𝑐𝑐𝑐� − cos � 2 �
𝐻𝜙 ≈
≈𝑗
�
�
𝑠𝑠𝑠𝑠
𝜂
2𝜋𝜋
The last couple of equations can be reduced to:
𝜋
𝐼0 𝑒 −𝑗𝑗𝑗 cos � 2 𝑐𝑐𝑐𝑐�
𝐸𝜃 ≈ 𝑗𝑗
�
�
𝑠𝑠𝑠𝑠
2𝜋𝜋
𝜋
𝐼0 𝑒 −𝑗𝑗𝑗 cos � 2 𝑐𝑐𝑐𝑐�
𝐻𝜙 ≈ 𝑗
�
�
𝑠𝑠𝑠𝑠
2𝜋𝜋
The previous equations describe the electric and magnetic fields. 𝑟 is the distance from the dipole,
𝜂 is the impedance of free space, 𝜃 is the elevation, and 𝜙 is the azimuth.
The power density is:
𝜋
2
|𝐼0 |2 cos � 2 𝑐𝑐𝑐𝑐�
|𝐼0 |2
𝑊𝑎𝑎 = 𝜂 2 2 �
� ≈ 𝜂 2 2 sin3 𝜃
𝑠𝑠𝑠𝑠
8𝜋 𝑟
8𝜋 𝑟
The radiation intensity is:
15
2
𝜋
|𝐼0 |2 cos � 2 𝑐𝑐𝑐𝑐�
|𝐼0 |2 3
𝑈 = 𝑟 2 𝑊𝑎𝑎 = 𝜂
≈
𝜂
sin 𝜃
�
�
𝑠𝑠𝑠𝑠
8𝜋 2
8𝜋 2
The radiation power is:
The directivity is:
𝑃𝑟𝑟𝑟
𝜋
2
|𝐼0 |2 𝜋 cos � 2 𝑐𝑐𝑐𝑐�
=𝜂
�
𝑑𝑑
𝑠𝑠𝑠𝑠
4𝜋 0
𝐷0 = 4𝜋
𝑈𝑚𝑚𝑚
≈ 1.6
𝑃𝑟𝑟𝑟
2.5 Low Noise Amplifier
A low noise amplifier (LNA) is an amplifier that compromises between high gain and
low noise operation of a transistor. The reflection coefficient at the input is Γ𝑐𝑐𝑐𝑐 , and the
reflection coefficient at the output is Γ𝑜𝑜𝑜 . Γ𝑐𝑐𝑐𝑐 is the compromise reflection coefficient between
maximum gain and minimum noise; Γ𝑐𝑐𝑐𝑐 is, typically, a point that lies on a straight line drawn
on the Smith chart from the point of maximum gain and the point of minimum noise, as shown in
Figure 4 labeled as m6.
1.8
0
2.
5
0.
4
0.
0
3.
m4
m7
m6
0.3
0.2
10
5.0
4.0
3.0
1.6
1.8
2.0
1.4
0.9
1.0
-1.0
1.2
0.8
0.7
-0.9
0.6
0.5
0.4
0.3
0.2
0.1
0.1
-20
-0.1
-10
GAcircles
Noise_circles
m5
m4
ndep(m4)= 51
GAcircles=0.414 / 98.148
gain=8.457
mpedance = Z0 * (0.642 + j0.636)
m6
0
.
4
5.0
ndep(m6)= 46
GAcircles=0.308 / 74.130
10 gain=8.297
20 mpedance = Z0 * (0.977 + j0.639)
m7
ndep(m7)= 16
Noise_circles=0.413 / 61.418
ns figure=1.463
mpedance = Z0 * (1.069 + j0.936)
m5
ndep(m5)= 51
Noise_circles=0.347 / 24.955
ns figure=1.303
mpedance = Z0 * (1.792 + j0.598)
20
1.4
1.6
1.2
1.0
0.9
0.6
0.7
0.8
16
-0.2
-5.0
0
-4.
3
-0.
.0
-3
.4
8
-1.
6
-1.
-1.4
-1.2
-0.7
-0.8
6
-0.
-2
-0
.0
.5
-0
cir_pts (0.000 to 51.000)
Figure 4 - Gamma Compromise
Figure 4 is an example of how the compromise point is chosen. Γ𝑜𝑜𝑜 is the point where
the lowest noise figure is (noted by marker m5) and Γ𝑐𝑐𝑐𝑐 is the compromise point (noted by
marker m6). Marker m7 shows how much the noise would increase by choosing Γ𝑐𝑐𝑐𝑐 . While
the input is matched to Γ𝑐𝑐𝑐𝑐 , the output is matched to Γ𝑜𝑜𝑜 . Γ𝑜𝑜𝑜 is dependent on Γ𝑐𝑐𝑐𝑐 in
bilateral transistors.
Γ𝑜𝑜𝑜 = 𝑆22 +
𝑆12 𝑆21 Γ𝑐𝑐𝑐𝑐
1 − 𝑆11 Γ𝑐𝑐𝑐𝑐
(2.15)
17
2.6 Mixer
A microwave mixer is a three-port device with two input ports and one output port. The
output signal consists of the difference between the frequencies of signals at two inputs. The two
types of mixers are up-conversion mixer and down-conversion mixer. An up-conversion mixer
mixes the local oscillator frequency and the intermediate frequency and produces the higher radio
frequency. A down-conversion mixer mixes the radio frequency and the local oscillator frequency
and produces the lower intermediate frequency. Illustrations of the types of mixers can be found
in Pozar [9]. This project utilizes the down-conversion mixer where the signals at the input ports
are the local oscillator signal and the signal from the receiver antenna.
𝑣𝐿𝐿 (𝑡) = 𝑐𝑐𝑐2𝜋𝑓𝐿𝐿 𝑡
(2.16)
𝑣𝑅𝑅 (𝑡) = 𝑐𝑐𝑐2𝜋𝑓𝑅𝑅 𝑡
(2.17)
𝑣𝐼𝐼 (𝑡) = 𝐾𝑣𝑅𝑅 (𝑡)𝑣𝐿𝐿 (𝑡) =
𝐾
[𝑐𝑐𝑐2𝜋(𝑓𝑅𝑅 − 𝑓𝐿𝐿 )𝑡 + 𝑐𝑐𝑐2𝜋(𝑓𝑅𝑅 + 𝑓𝐿𝐿 (𝑡)]
2
(2.18)
Equations 2.16 through equations 2.18 describe the waveforms at the terminals of the mixer.
Although mixers should behave the same, there are many ways to design a mixer.
Various designs are a single-ended FET, 90° balanced, 180° balanced, double balanced,
and image reject. Pozar [9] showed the differences in characteristics of different types of mixers.
The design chosen for this project is the 90° balanced mixer because the simplicity of its design
outweighs its average performance.
The 90° balanced mixer consists of a 90° coupler, which is the same design as section
2.2. The difference is that two input ports are used, and the output ports are combined after
passing through a couple of diodes. Mixer design is presented in section 3.5.
18
From section 2.2, the voltage at port two is half of the voltage at port one with a delay of
90°. The voltage at port three is half of the voltage at port one with a delay of 180°. Since the
input into port four is the local oscillator voltage, the voltage is transferred to port three at 90° and
to port two at 180°. In equation form, those voltages are
𝑣1 (𝑡) =
𝑣1 (𝑡) =
𝑣2 (𝑡) =
𝑣2 (𝑡) =
1
√2
1
√2
1
√2
1
√2
[𝑉𝑅𝑅 cos(𝜔𝑅𝑅 𝑡 − 90°) + 𝑉𝐿𝐿 cos(𝜔𝐿𝐿 𝑡 − 180°)]
(2.19)
(𝑉𝑅𝑅 𝑠𝑠𝑠𝜔𝑅𝑅 𝑡 − 𝑉𝐿𝐿 𝑐𝑐𝑐𝜔𝐿𝐿 𝑡)
[𝑉𝑅𝑅 cos(𝜔𝑅𝑅 𝑡 − 180°) + 𝑉𝐿𝐿 cos(𝜔𝐿𝐿 𝑡 − 90°)]
(2.20)
(−𝑉𝑅𝑅 cos 𝜔𝑅𝑅 𝑡 + 𝑉𝐿𝐿 𝑠𝑠𝑠𝜔𝐿𝐿 𝑡)
The current through the diodes is
𝑖1 (𝑡) = 𝐾𝑣12
𝑖2 (𝑡) = −𝐾𝑣22
(2.21)
(2.22)
K in the above equations is a constant and the current out of port three is negative because of the
orientation of the diode.
The resulting current is
𝑖𝐼𝐼 (𝑡) = −𝐾𝑉𝑅𝑅 𝑉𝐿𝐿 𝑠𝑠𝑠𝜔𝐼𝐼 𝑡
The relevant parameter is the frequency (𝜔𝐼𝐼 ).
(2.23)
19
2.7 Low Pass Filter
A microwave low pass filter is a low pass filter that could be constructed using lumped
elements or transmission lines. Its purpose is to filter out high frequency signals and pass lower
frequency signals; it works in conjunction with the microwave mixer. It filters everything but the
intermediate frequency.
Designing a low pass filter starts with choosing a type of filter. Two types considered for
this project are Butterworth and Chebyshev. The tradeoff between a Butterworth filter and a
Chebyshev filter is that the Butterworth has a flat pass band with smaller difference between the
pass band attenuation and the stop band attenuation, and the Chebyshev filter has ripples in the
pass band and has a steeper roll off.
The insertion-loss method design starts with selecting the order of the filter from the
required attenuation in the stop-band. Then the filter coefficients are selected from the tables [9].
The coefficients are normalized lumped element component values, normalized to cut off
frequency of one. These values are then scaled to the desired frequency. A final step in high
frequency circuits is converting the lumped components into transmission lines, if necessary.
After the background necessary to create the components, chapter 3 provides computer
simulations on how each of these components operates. The computer simulations contain
schematics and simulation results using Agilent’s Advanced Design System and Ansys High
Frequency Structure Simulator.
20
Chapter 3
ADS AND HFSS SIMULATIONS
In this chapter, circuit design and simulations are presented for the Antenna, Oscillator,
Amplifiers, Power Divider, Mixer, and Low Pass Filter.
3.1 Antenna
A printed dipole is designed using HFSS. The substrate is a Rogers Duroid 4003C high
frequency laminate. The substrate properties entered into HFSS are shown in Table 1.
Property
value
Height
32 𝑚𝑚𝑚𝑚
Relative Dielectric Constant (𝜖𝑟 )
3.55
Table 1 –Substrate Properties for Antenna Fabrication
Material properties that are not considered are the loss tangent, thickness of metal and
dielectric roughness. These might affect the differences between the simulated result and
fabricated result. The same printed dipole antenna is used for both the transmitter and receiver
antenna.
21
Figure 5 - Printed Dipole Model
The printed dipole antenna is shown in Figure 5. The wave enters the dipole from the
wave-port connected to the signal path that is parallel to the Y-axis, and then splits the dipole on
the X-axis, which radiates radially on the Y-Z plane. The dipole is designed with the length
of
𝜆
2
=
𝑐
𝑓
√𝜖𝑟
2
=
𝑐
.
2𝑓√𝜖𝑟
Then the length of the dipole is tuned in HFSS in order to have minimal
reflections at 10 GHz.
Figure 6 - 3D Radiation Pattern of Antenna
22
The 3D radiation pattern shows the "donut" shape that is expected from a dipole antenna.
The shape is not uniform radially on the Y-Z plane because of the difference between the electric
field traveling in the air and inside of the substrate.
Figure 7 – Return Loss of Antenna
The reflection coefficient plot shows the frequency of operation for the antenna. At 10
GHz, the refection coefficient is at negative 11.8 dB. Between 9.5 GHz and 10.5 GHz, the
reflection coefficient is also below negative 10 dB.
Figure 8 – VSWR of Antenna
23
Another way of looking at the performance of the antenna is by analyzing the VSWR
plot. The VSWR at 10 GHz is 1.7. Since the simulated value is close to the ideal value of 1, this
shows that the designed antenna works well. The HFSS antenna parameters are shown in Figure
9. The input power into the port is 1W.
Figure 9 - HFSS Antenna Parameters
24
Item
Quantity
Rogers Duroid 4003C Substrate
1
Pasternack SMA Jack (up to 18 GHz)
2
Table 2 – Antenna Bill of Materials
3.2 Oscillator
The oscillator is designed using ADS. Unlike designing the antenna in section 3.1, more
parameters are considered for the substrate as shown in Table 3.
Property
Height
Relative Dielectric Constant (𝜖𝑟 )
value
32 𝑚𝑚𝑚𝑚
3.55
Loss Tangent (tan 𝛿)
0.0027
Copper conductivity
4.7 × 107
Copper thickness
Surface roughness
35 𝜇𝜇
4 𝜇𝜇
𝑆
𝑚
Table 3 – Substrate Properties for Oscillator Fabrication
The simulation setup is shown in Figure 10. To obtain the bias points, the collectoremitter voltage is swept from 3 𝑉 to 5 𝑉 and the base current is swept from 50 𝜇𝜇 to 75 𝜇𝜇, as
shown in Figure 11. The sweep shows the values where the transistor operates as on or off.
25
Figure 10 – Schematic for Oscillator Bias Sweep
After obtaining the transistor’s performance in forward active mode, the collector emitter
voltage is chosen to be 3 𝑉. The plots in Figure 11 show that the bias points should be
𝑉𝐶𝐶 = 3 𝑉
𝑉𝐵𝐵 = 0.84 𝑉
𝑖𝐶 = 20 𝑚𝑚
m2
VBE= 0.840
plot_vs(I_Probe1.i, VBE)=0.019
VC=0.400
m1
m2
0.020
0.020
0.015
I_Probe1.i
I_Probe1.i
0.015
0.010
0.005
0.010
0.005
0.000
0.000
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0.0
0.5
1.0
1.5
VBE
Figure 11 - Oscillator Bias Simulation Results
2.0
2.5
VC
3.0
3.5
4.0
4.5
5.0
26
The collector-emitter resistor and the emitter-ground resistor values of 120 Ω and 50 Ω
allow for the desired bias values.
Figure 12 - Oscillator Bias Network with Simulation Results
After biasing the circuit, the value for the inductor connected to the base of the transistor
is swept from 1 nH to 10 nH. The sweep shows where the transistor is most unstable; it shows
that the lower the inductance value is, the more unstable it is. The value of 1 nH is chosen for the
simulation.
Figure 13 – Schematic for Oscillator Feedback Inductor Sweep
27
Figure 14 – Stability Factor Mu as a Function of Base Inductor for Circuit in Figure 13
After the inductor is chosen, the load is swept to find the most unstable point, as shown in
Figure 15 and Figure 16.
Figure 15 – Schematic for Oscillator Instability Sweep
28
Figure 16 – Smith Chart to Determine the Load and Terminal Impedances
The Smith chart in Figure 16 show two Smith charts; the main Smith chart represents
Gamma-In, and the Smith chart drawn on top Gamma-In is Gamma-T. These reflection
coefficients show what the input and output should be matched to. From the results shown in
Figure 16, the load and terminal impedances that gave the transistor the most unstable
configuration are 20.122 − 𝑗224.672 and 50 − 𝑗94.000. The load impedance is the impedance
of the circuit attached to the emitter and the terminal impedance is the impedance of the circuit
attached to the collector, just before the output port. The terminal impedance is only matched to
the imaginary value because the real value, 50 Ω, represents a device connected to the output.
29
Figure 17 – Schematic for Oscillation Test Using Ideal Equations
There are two ADS simulation devices in Figure 17 that check for oscillation. Those
devices are OscPort and OscTest. OscPort simulates a time domain of the oscillation, and
OscTest simulates a frequency domain of the oscillation. After simulating with optimal
impedance represented by a Z1P_Eqn block in ADS, the transistor oscillated at about 10 GHz.
The period of oscillation is at 56.69 picoseconds and 155.5 picoseconds, which represents the
frequency at about 9.7 GHz as shown in Figure 18.
30
Figure 18 – Simulation Results for Oscillation Test Using Ideal Equations
Once it is determined that the presented load impedance allows oscillation, the lumped
elements are replaced with ideal transmission lines. Using the transmission lines minimizes the
number of lumped components and it minimizes the total discontinuities during fabrication.
Figure 19 – Schematic for Oscillation Test from Using Stubs
31
After the transmission line is added, the circuit is re-simulated to verify that it still
oscillates. The shape of the oscillation from the transmission line circuit follows a sine wave
shape better than the circuit with the ideal load blocks, which may be because the transmission
line’s impedance is equal to the load impedance only at the one frequency.
Figure 20 - Oscillation Test Results from Using Stubs
Incremental steps are taken to make sure that oscillation still occurs after a small change.
The oscillation is checked after converting transmission line from lumped elements. Then the
oscillation is checked after converting from series transmission line, which cannot be constructed
on a microstrip board, to parallel transmission lines.
32
Figure 21 - Recalculations of Microstrip Components Simulation Results
Microstrip lines are inserted into the circuit and new load and terminal impedances are
calculated since the microstrip lines shifts some of the parameters. The new impedances to match
to are shown in Figure 21. The new load and impedances are then converted into parallel
microstrip lines and are inserted into the circuit, as shown in Figure 22, and the final simulation
results is shown in Figure 23.
33
Figure 22 – Schematic for Oscillator with Microstrip Lines
34
Figure 23 – Oscillator Simulation Results
Item
Quantity
Rogers Duroid 4003C Substrate
1
Pasternack SMA Jack (up to 18 GHz)
1
20 Ω Resistor
1
125 Ω Resistor
1
1 𝜇𝜇 Capacitor
2
50 Ω Resistor
1
47 𝑛𝑛 Inductor
2
Table 4 – Oscillator Bill of Materials
35
3.3 Amplifier
The amplifier design and simulation is presented in this section. The substrate used here
is a Rogers Duroid 5880. The properties are shown in Table 5.
property
Height
Relative Dielectric Constant (𝜖𝑟 )
value
31 𝑚𝑚𝑚𝑚
2.2
Loss Tangent (tan 𝛿)
0.0009
Copper conductivity
4.7 × 107
Copper thickness
Surface roughness
35 𝜇𝜇
4 𝜇𝜇
𝑆
𝑚
Table 5 – Substrate Properties for Amplifier Fabrication
The noticeable difference in the properties is the loss tangent and the relative dielectric constant.
These values are lower; therefore, the material impedes a signal less than the Rogers Duroid
4003C.
3.3.1 Low Noise Amplifier (LNA)
The optimization feature in ADS determines the bias circuit for the LNA. The base and
collector resistors are swept until the collector-emitter voltage is 1.8 𝑉 and the collector current
is 15 𝑚𝑚. Then the values of the resistors are substituted with resistor values found in the lab.
After substituting with the lab values, the bias points remain near the same.
36
V_DC
SRC1
Vdc=3 V
R
R3
R=44.2 Ohm
vc
R
R1
R=12.1 kOhm
DC_Feed
DC_Feed1
Term
Term1
Num=1
Z=50 Ohm
I_Probe
I_Probe1
DC_Feed
DC_Feed2
DC_Block
DC_Block2
DC_Block
DC_Block1
Term
Term2
Num=2
Z=50 Ohm
BFP840ESD
X1
_M=1
Figure 24 - LNA Bias Circuit
Having only the transistor biased, the transistor gain output looks very desirable. The
gain at 10 GHz is about 12 dB, but that gain value cannot be achieved since the circuit is not
unconditionally stable, as shown in Figure 26, where the Mu factors are less than one at most
frequencies.
37
40
30
dB(S(2,2))
dB(S(2,1))
dB(S(1,2))
dB(S(1,1))
20
10
0
-10
-20
-30
-40
4
2
0
6
8
10
12
14
16
18
freq, GHz
Figure 25 - Amplifier S-Parameters before Matching Circuit
1.2
MuPrime1
Mu1
1.0
0.8
0.6
0.4
0.2
0
2
4
6
8
10
12
14
16
freq, GHz
Figure 26 - Stability Plot before Adding the Stability Circuit
18
38
After creating the bias circuit, the amplifier has to be stabilized. The stability circuit
consists of a branch to ground immediately following the collector and a parallel branch. The
branch to ground provides stability at low frequencies where the parallel branch provides stability
at high frequencies.
By adding the stability circuits, the maximum achievable gain at 10 GHz reduces from 12
dB to 7.5 dB. Another stage that slightly reduces the gain is the noise compensation circuit. The
100 Ω resistor from collector to ground stabilizes the circuit at lower frequencies, and the 48.7 Ω
resistor in parallel with the 22 𝑛𝑛 inductor stabilizes the circuit at higher frequencies.
V_DC
SRC1
Vdc=3 V
R
R3
R=44.2 Ohm
vc
R
R1
R=12.1 kOhm
DC_Feed
DC_Feed1
I_Probe
I_Probe1
DC_Feed
DC_Feed2
DC_Block
DC_Block3
DC_Block
Term
DC_Block1
Term1
Num=1
Z=50 Ohm
BFP840ESD
X1
_M=1
R
R4
R=48.7 Ohm
L
L1
L=22 nH
R=
R
R5
R=100 Ohm
Figure 27 - LNA Stability Circuit
DC_Block
DC_Block2
Term
Term2
Num=2
Z=50 Ohm
39
40
m1
freq=10.00GHz
m1 dB(S(2,1))=7.599
dB(S(2,2))
dB(S(2,1))
dB(S(1,2))
dB(S(1,1))
20
0
-20
-40
-60
4
2
0
6
8
10
12
14
16
18
freq, GHz
Figure 28 - LNA S-Parameters after Stability Circuit
3.5
MuPrime1
Mu1
3.0
2.5
2.0
1.5
1.0
0
2
4
6
8
10
freq, GHz
Figure 29 - LNA Stability
12
14
16
18
5
0.
2.
0
1.0
40
0.2
Noise_circles
GAcircles
m3
indep(m3)= 34
Noise_circles=0.684 / -91.502
ns figure=2.057
impedance = Z0 * (0.353 - j0.910)
5.0
10
10
20
5.0
2.0
1.0
0.5
20
-10
-20
Zout
freq
-0.2
-5.0
m3
-1.0
.0
-2
-0
.5
7.571 + j0.644
7.295 + j0.402
7.027 + j0.135
10.00 GHz
10.10 GHz
10.20 GHz
cir_pts (0.000 to 51.000)
Figure 30 - Max Gain Point and Lowest Noise Point
10
8
m4
freq=10.00GHz
nf(2)=3.129
nf(2)
6
m4
4
2
0
0
2
4
6
8
10
12
14
16
18
freq, GHz
Figure 31 – Transistor Noise before Matching Circuits
Once the circuit is stable, noise circles and gain circles are plotted on the Smith chart, as
described in section 2.5. The gamma compromise point is shown in Figure 30. The input
41
impedance is defined by gamma compromise, and the output impedance is calculated by equation
2.15. The simulated s-parameters are
𝑆11 = 0.763∠95.069°
𝑆12 = 0.036∠11.759°
𝑆21 = 2.399∠ − 20.202°
𝑆22 = 0.197∠33.463°
The value of the input impedance obtained from Figure 30 is 7.571 − 𝑗0.644. The value of
output circuit is calculated to be 17.674 + 𝑗45.48. Figure 32 shows the matched circuit. Figure
33 and Figure 34 show that the noise is reduced from 3.129 𝑑𝑑 to 2.057 𝑑𝑑 and the gain is
reduced from 7.599 𝑑𝑑 to 6.908 𝑑𝑑.
V_DC
SRC1
Vdc=3 V
R
R3
R=44.2 Ohm
vc
R
R1
R=12.1 kOhm
DC_Feed
DC_Feed1
Term
Term1
Num=1
Z=50 Ohm
Ref
TLIN
DC_Block
TLOC
TL1
TL2
Z=50.0 Ohm DC_Block1
Z=50.0 Ohm E=112.3421
E=118.0471 F=10 GHz
F=10 GHz
I_Probe
I_Probe1
DC_Feed
DC_Feed2
DC_Block
DC_Block3
BFP840ESD
X1
_M=1
R
R4
R=48.7 Ohm
L
L1
L=22 nH
R=
R
R5
R=100 Ohm
Figure 32 - Matching Circuits
DC_Block
DC_Block2
TLIN
TL3
Z=50.0 Ohm
E=157.984
F=10 GHz
Ref
TLOC
TL4
Z=50.0 Ohm
E=114.6319
F=10 GHz
Term
Term2
Num=2
Z=50 Ohm
42
50
40
m4
freq=10.00GHz
nf(2)=2.057
nf(2)
30
20
10
m4
0
4
2
0
6
10
8
14
12
16
18
freq, GHz
Figure 33 - Noise Factor Reduction after Matching Circuits
40
20
m5
m5
freq=10.00GHz
dB(S(2,1))=6.908
dB(S(2,2))
dB(S(2,1))
dB(S(1,2))
dB(S(1,1))
0
-20
-40
-60
-80
-100
0
2
4
6
8
10
12
freq, GHz
Figure 34 - Final Gain of LNA
14
16
18
43
Item
Quantity
Rogers Duroid 5880 Substrate
1
Infineon BFP 840 transistor
1
Pasternack SMA Jack (up to 18 GHz)
2
44.2 Ω Resistor
1
100 Ω Resistor
1
22 𝑛𝑛 Inductor
3
48.7 Ω Resistor
1
12.1 𝑘Ω Resistor
1
1000 𝑝𝑝 Capacitor
3
Table 6 – LNA Bill of Materials
3.3.2 Maximum Gain Amplifier
The two main design features for a maximum gain amplifier are stability for all
frequencies and terminal matching circuits. Ensuring that the amplifier is stable for all
frequencies removes any ambiguity that the transistor may oscillate at any frequency as described
in Chapter 2.4.
44
Figure 35 – Schematic for Maximum Gain Amplifier
The full circuit for the maximum gain amplifier is shown in Figure 35. The bias circuit is
determined through an optimization process in ADS with a desired collector-emitter voltage at
2 𝑉 and the collector current at 20 𝑚𝑚. The stability circuit follows the collector circuit with a
branch to ground and parallel branches. The branch to ground allows for stability at lower
frequencies and the parallel branch stabilizes higher frequencies. At the ends of each side there is
45
an input matching circuit and an output matching circuit. These circuits are also determined by
optimization inside ADS. The single stub matching circuits is inserted into the transistor circuit
and is optimized until the gain at 10 𝐺𝐺𝐺 is at its maximum while keeping the circuit stable.
Figure 36 – Maximum Gain Amplifier S-Parameters after Being Matched
The input and output stability is shown in Figure 37. At all frequencies, the factor is
above one; therefore, it is unconditionally stable. The circuit is more stable before the matching
circuits, and it became borderline stable after adding the matching circuit. These are shown at
frequencies between 5 and 8 GHz where the stability factor is closer to one.
46
Figure 37 - Max Gain Amplifier Stability Plot
Item
Quantity
Rogers Duroid 5880 Substrate
1
Infineon BFP 840 transistor
1
Pasternack SMA Jack (up to 18 GHz)
2
16.5 Ω Resistor
1
44.2 Ω Resistor
1
12.1 kΩ Resistor
1
33 𝑛𝑛 Inductor
1
32 Ω Resistor
1
110 Ω Resistor
1
47 𝑛𝑛 Inductor
2
1000 𝑝𝑝 Capacitor
3
Table 7 – Maximum Gain Amplifier Bill of Materials
47
3.4 Power Divider
The design of an ideal power divider is shown in Figure 38. The input port is port 1. The
output ports are ports 2 and 3. The isolation port is the port terminated with a 50 Ω resistor.
Term
Term1
Num=1
Z=50 Ohm
TLIN
TL2
Z=50.0 Ohm
E=90
F=10 GHz
S-PARAMETERS
S_Param
SP1
Start=1 GHz
Stop=18 GHz
Step=0.1 GHz
TLIN
TL1
Z=50.0/sqrt(2) Ohm
E=90
F=10 GHz
R
R1
R=50 Ohm
TLIN
TL4
Z=50.0/sqrt(2) Ohm
E=90
F=10 GHz
TLIN
TL3
Z=50.0 Ohm
E=90
F=10 GHz
Term
Term2
Num=2
Z=50 Ohm
Term
Term3
Num=3
Z=50 Ohm
Figure 38 – Schematic for Ideal Power Divider
The results of the simulation in Figure 39 show that the power at ports two and three are
the same at negative 3 𝑑𝑑 at 10 𝐺𝐺𝐺. The circuit is a matched circuit because the return loss, 𝑆11,
is negative 300 dB. This value is very low because all components used in the simulation are
ideal transmission lines.
48
m1
0
dB(S(3,1))
dB(S(2,1))
dB(S(1,1))
-10
m1
freq=10.00GHz
dB(S(1,1))=-322.625
dB(S(2,1))=-3.010
dB(S(3,1))=-3.010
-20
-30
-40
-50
0
2
4
6
8
10
12
14
16
18
freq, GHz
Figure 39 - Ideal Power Divider Simulation Results
The Power Divider circuit has a minor deviation from the original circuit. The deviation
is at terminal two. The output port cannot be on the same side of the PCB due to the SMA Jack
being too large and the 90° length being not long enough to compensate for the large jack.
Terminal two has to be outputted on the top side of the PCB. This can be seen in Figure 64.
49
Figure 40 - Power Divider Microstrip Model
Figure 41 – Power Divider Simulation Results
50
Originally, the simulation is operating at 8 GHz. The original circuit is using 90° lengths
along with 35 Ω and 50 Ω widths. These parameters have to be tuned until the circuit operates at
10 GHz. This is done using the optimizer in ADS.
Item
Quantity
Rogers Duroid 5880 Substrate
1
Pasternack SMA Jack (up to 18 GHz)
3
50 Ω Resistor
1
Table 8 – Power Divider Bill of Materials
3.5 Mixer
The ideal 90° balanced mixer is shown in Figure 42. SRC1 and SRC2 are input sources;
they represent the signal from the local oscillator and the signal from the receiver antenna. When
the input signals are at different frequencies f1 and f2, the signal at the output is at the difference
frequency, 𝑓𝑑 = 𝑓1 − 𝑓2. When the inputs are at the same frequency, only the local oscillator
frequency shows at the output of the mixer. Figure 43 shows the simulation for when the inputs
are at different frequencies. The circuit is simulated with a frequency difference of 100 MHz to
show the Doppler Effect.
51
Figure 42 – Schematic for an Ideal Mixer
Figure 43 - Mixer Output from Different Input Frequencies
Then the Mixer is converted to microstrip lines. The difference between the microstrip
circuit and the ideal circuit is the attenuation in the signals. There is attenuation in both the local
oscillator signal and the signal from the receiver in the microstrip circuit.
52
Figure 44 – Schematic for Mixer
Figure 45 – Simulation Results for Mixer Circuit
Item
Quantity
Rogers Duroid 5880 Substrate
1
PIN Diode
2
Pasternack SMA Jack (up to 18 GHz)
3
Table 9 – Mixer Bill of Materials
53
3.6 Low Pass Filter
The design for this filter is completed using the Filter Design tool in ADS. The low pass
filter specification is a maximally flat filter with a cut off frequency of 2 kHz.
Figure 46 - ADS Filter Design Guide
54
Figure 47 – Schematic for Lumped Elements Filter
.
Figure 48 - Low Pass Filter Simulation Results
The simulation results match the expected results from the filter design guide; the
negative 3 dB is about 2 kHz, and the negative 20 dB frequency is about 5 kHz. These
frequencies are chosen to keep a maximum of three components.
55
Chapter 4
CIRCUIT FABRICATION AND MEASUREMENTS
All of the PCBs are milled using a T-TECH QC5000 PCB mill [17]. When using the
PCB mill, the substrate has to be held still in order to get the best cut. There are pins protruding
from the waste board through the substrate on the center top and center bottom ends. These pins
roughly secure the substrate, but since the holes on the substrate are slightly larger than the pins,
it allows the substrate to shift up to five mils during milling. When the end mill etches the board,
it is plunged down by an air compressor and is stopped by a plastic foot. The plastic foot grips the
substrate tightly, which shifts the board if it is not secured properly. Taping the substrate down
with masking tape at its edges helps keep the board from shifting. The substrates are sometimes
warped in various areas and they need to be physically pressed down by hand while the QC5000
mills the substrate. In addition, the end mill’s height has to be adjusted by using the dials on the
QC5000 throughout the milling duration because the height of the copper is sometimes uneven
throughout the substrate. The speed of the cutting bit has to be specific. Slow speeds could
damage the routing bit, and high speeds do not cut the material well. For the mill that is set up in
the microwave lab, a 20-mil end mill at 25000 RPMs makes the best cuts after trying with 29000
RPMs and 31000 RPMs.
After the milling process, the components of the circuit are soldered onto the PCBs. The
difficulty with soldering chip components, such as resistors and capacitors (most components in
this project are 0805 size), is dealing with the heat. The components are small enough that heat
quickly travels to the other end of the component, melting a different soldering point; it could
also damage the component. To contain the heat at a specific area, a large metal block is placed
56
under the circuit board while soldering. The large metal block acts like a heat sink. This helps
when soldering chip components.
The fabricated circuits in this project are antennas, oscillator, high gain amplifier, power
divider, and mixer. All of the components, except the mixer, are tested after fabrication. The
equipments used for testing the fabricated circuits are an HP8720C Network Analyzer, an HP
8350B Sweep Oscillator, an HP 8592L Spectrum Analyzer, and a Power Designs TP340 Power
Supply. The HP8720C is a two port Network Analyzer that operates between the frequencies of
50 𝑀𝑀𝑀 and 20 𝐺𝐺𝐺. The HP 8350B is an oscillator that operates between the frequencies of
10 𝑀𝑀𝑀 and 20 𝐺𝐺𝐺. Lastly, the 8720C is a Spectrum Analyzer that operates between the
frequencies of 9 𝑘𝑘𝑘 and 22 𝐺𝐺𝐺.
4.1 Antenna
The properties of the PCB are described in section 3.1 Antenna. The layout for the
antenna is shown in Figure 49. In order to connect the ground path, two small tabs to the left and
right of the trace are added to attach the solder. Once the soldering is done, a razor blade is used
to remove excess trace.
Figure 49 - Layout of Signal and Ground Layers for Antenna
57
Figure 50 – Antenna Signal Path
Figure 51 – Antenna Ground Path
Two antennas are fabricated, but the above figures only show one antenna. The second
antenna is very similar to the first antenna and is fabricated using the same Gerber files; therefore,
it is not displayed.
NETWORK ANALYZER
PORT 1
PORT 2
COAX
DUT
Figure 52 - Antenna Test Setup
To test the antenna, a network analyzer, and a coax cable is used. S-Parameters for a oneport circuit are tested for frequencies from 50 𝑀𝑀𝑀 to 20 𝐺𝐺𝐺.
58
Figure 53 – Antenna Test Results on Network Analyzer
Parameter
Return Loss, |𝑆11 | at 10 𝐺𝐺𝐺
Simulated Result Actual Result Percent Difference
−12 𝑑𝑑
−7 𝑑𝑑
42 %
Table 10 - Comparison of Simulated and Actual Results for Antenna
The results from the Network Analyzer show that the reflection at 10 GHz is negative 7
dB. The lowest value of the output is at 11.2 GHz. The actual results are better at some
frequencies and worse at some frequencies, as shown in the simulation in Figure 7. The suspected
reason that the test results are different from the simulated results is because the input port is not
modeled properly in the simulation. The ground path of the antenna has extra tabs where the
ground of the SMA jack is soldered. The conductor that extended beyond the length of the SMA
jack is cut off, which is not part of the simulation. In a future implementation, the SMA jack will
be part of the HFSS model.
59
4.2 Oscillator
The properties of the PCB are described in section 3.2. The layout for the oscillator is
shown in Figure 54. The connection for the SMA jack is fed in from the ground layer of the PCB
then soldered onto the output port.
Figure 54 - Layout of the Oscillator
60
Figure 55 - Fabricated Oscillator
POWER
SUPPLY
DUT
COAX
SPECTRUM ANALYZER
Figure 56 - Oscillator Test Setup with Spectrum Analyzer
To test the oscillator, a spectrum analyzer, and a coax cable is used. A bias-tee is used at
the output of the DUT and acts as an extra capacitor in case the DC Block capacitor on the circuit
fails.
61
Figure 57 - Oscillator Test Results on Spectrum Analyzer
Parameter
Frequency of Oscillation
Simulated Result Actual Result Percent Difference
9.7 𝐺𝐺𝐺
10.07 𝐺𝐺𝐺
3.8 %
Table 11 - Comparison of Simulated and Actual Results for Oscillator
The results from the Spectrum Analyzer show that the oscillation is 10.07 𝐺𝐺𝐺 with a
power of negative 27.05 𝑑𝑑𝑑. The simulated oscillation is 9.7 𝐺𝐺𝐺; therefore, the difference
is 3.8 %. The obvious reason for the difference is due to the terminal transmission line. The width
is originally four mils, but has to be increased to 15 mils for fabrication. There is also a microstrip
tee on the load side, which is not accounted for in the simulation.
62
4.3 Amplifier
The high gain amplifier is fabricated on a Duroid 5880 substrate. To make sure there is
enough ground for the circuit, large ground pads are connected to each emitter. The ground pads
contain multiple connections to the ground layer using a copper wire.
4.3.1 High Gain Amplifier
The properties of the PCB are described in section 3.3.2. The layout for the amplifier is
shown in Figure 58. SMA Jacks are soldered to edge of the board for input and the output.
Figure 58 - High Gain Amplifier Layout
63
Figure 59 - Max Gain Amplifier Fabricated Circuit
POWER
SUPPLY
FUNCTION GENERATOR
COAX
DUT
COAX
SPECTRUM ANALYZER
Figure 60 - Amplifier Test Setup with Spectrum Analyzer
To test the amplifier, a spectrum analyzer, and a coax cable is used at the output. A
function generator and a coax cable is used at the input. Each port of the DUT, the input and the
output, had a bias-tee connected and acts as extra capacitors in case the DC Block capacitors on
the circuit fail.
64
Figure 61 - Max Gain Amplifier at 5 GHz on Spectrum Analyzer
Frequency (GHz) Simulated Gain (dB) Actual Gain (dB) Percent Difference
1
19.362
𝑁𝑁𝑁𝑁
𝑁/𝐴
3
9.437
7.9
17 %
2
4
16.292
−7.374
𝑁𝑁𝑁𝑁
𝑁/𝐴
5.3
170 %
𝑁𝑁𝑁𝑁
𝑁/𝐴
5
−10.988
−12.5
7
−25.038
−6
76 %
9
0.546
𝑁𝑁𝑁𝑁
𝑁/𝐴
6
8
10
−0.985
−8.933
−6.4
7.161
−12
13 %
28 %
267 %
65
11
−0.196
13
−5.238
12
14
−6.4
3165 %
𝑁𝑁𝑁𝑁
𝑁/𝐴
−4.052
−15.8
−11.821
𝑁𝑁𝑁𝑁
289 %
𝑁/𝐴
Table 12 - Comparison of Simulated and Actual Results for Max Gain Amplifier
The circuit is tested using the HP8350B oscillator to power the input and the Spectrum
Analyzer to display the output. Although the amplifier does not work quite as expected at the
intended frequency, it amplifies signals at other frequencies. The best gain is 8 dB at 3 GHz.
Since the performance of the amplifier is not what is expected, there are a few possible reasons
for the cause. The main reason is improper modeling of transistor ground connection, which may
have caused instability at another frequency, but the oscillation amplitudes are not high enough to
be registered by the Spectrum Analyzer. The other reasons are improper modeling of the RF
Choke inductors. The RF Chokes should have been modeled with interconnects between them
and the microstrip tees instead of modeling the connection straight on to the tees. Lastly, the
components may have been placed too close to each other and they introduced parasitic
capacitance. In a future implementation, more distance will be maintained between the
components by using longer interconnects, and to properly model the transistor’s ground
connection.
66
4.4 Power Divider
The properties of the PCB are described in section 3.4. The layout for the power divider
is shown in Figure 62. SMA Jacks are soldered to the edges of the board. To secure the ground
for the 50 Ω terminated port, a strip of copper is soldered from the grounded end of the resistor to
the ground layer. The strip is also soldered to the ground of the SMA jack connected to port 1.
Figure 62 - Power Divider Layout
67
A 50 Ω terminal has to be fabricated in order to test the power divider on a two-port
Network Analyzer. This is done by cutting the signal path from an SMA jack and soldering a
50 Ω resistor from the signal path to the ground. During the tests, this terminal emulates a device
connected to it and absorbs half of the power.
Figure 63 - 50 Ohm Terminal
Figure 64 - Fabricated Power Divider
68
NETWORK ANALYZER
PORT 1
PORT 2
NETWORK ANALYZER
PORT 1
PORT 2
50 Ohm
Terminal
2
1 DUT
3
Port 3, Forward Transmission
Test Setup
2
1 DUT
3
50 Ohm
Terminal
Port 2, Forward Transmission
Test Setup
Figure 65 - Power Divider Test Setups with Network Analyzer
To test the power divider, a network analyzer, a 50 Ω terminal, and a coax cable is used.
S-Parameters for a two-port circuit are tested for frequencies from 50 𝑀𝑀𝑀 to 20 𝐺𝐺𝐺. First, port
2 is terminated with the 50 Ω terminal, and port 3 is tested. Then port 3 is terminated with the
50 Ω terminal, and port 2 is tested.
69
Figure 66 - Port 3 Test Connection
Figure 68 – Forward Transmission at Port 3, S31
Figure 67 - Port 2 Test Connection
Figure 69 – Forward Transmission at Port 2, S21
Figure 70 – Return Loss at Port 1, S11
70
Parameter
Simulated Result Actual Result Percent Difference
Forward Transmission at Port 2, 𝑆21
−3.216 𝑑𝑑
−4.027 𝑑𝑑
25 %
Return Loss, 𝑆11
−300 𝑑𝑑
−14.642 𝑑𝑑
95 %
Forward Transmission at Port 3, 𝑆31
−3.214 𝑑𝑑
−3.726 𝑑𝑑
16 %
Table 13 - Comparison of Simulated and Actual Results for Power Divider
Figure 66 and Figure 67 show the test setup on the Network Analyzer. The isolated port
is terminated with a 50 Ω resistor and the open port is terminated with a 50 Ω connector. Figure
68 and Figure 69 show that the outputs from the two ports are very similar to each other and are
close to the simulated circuit. The output at port 3 shows negative 4 dB and the output at port 2 is
negative 3.7 dB. Figure 70 shows that the circuit is matched because the reflection is negative
14.6 dB. It is an acceptable number although the percent difference of the actual result from the
simulated result is very high. The cause may have been from the isolated port not being grounded
properly. In a future implementation, the resistor at the isolated port will have shorter connection
to ground.
4.5 Mixer
The properties of the PCB are described in section 3.5. The layout for the mixer is shown
in Figure 71. SMA Jacks are soldered to the edges of the board.
71
Figure 71 – Layout of the Mixer
Figure 72 - Fabricated Mixer
The mixer is fabricated, but it is not tested. The difficulty in the fabrication is connecting
the SMA jacks. The mount on the jacks is large and it barely touches the circuit. This can cause
unintended reflections. The diodes used are PIN diodes that are able to operate at high
frequencies. The mixer is not tested because the low pass filter is not fabricated. The mixer and
the low pass filter are needed to feed in signals of two frequencies and output the intermediate
frequency. Measurements for this component will be in a future work.
72
Chapter 5
CONCLUSION
This project presents circuits necessary to create a mobile radar. The population of senior
citizens is increasing and they could benefit from such a device. A radar provides an advantage
over accelerometers and cameras. This circuits in this project is designed using minimal
components and a 10 𝐺𝐺𝐺 frequency to keep a small footprint. The smallest board size is the
antenna at one-inch by one-inch and the largest board size is the amplifier at a one-inch length
and three-inch width. Since there are seven total components, to make this device wearable, it
would work best if each board is layered on top of one another.
All of the components are designed, but not all are fabricated and tested. Two substrates
used for all components are Roger’s Duroid 4003C and Roger’s Duroid 5880. The antenna and
oscillator are designed using the 4003C, and all other components are designed using the 5880.
Design software used for the antenna is HFSS, and for all other components is ADS.
Test results varied for the different components. The circuits with acceptable
performance are antennas, power divider, and oscillator. The circuit that does not behave as
expected is the amplifier, which does not amplify the signal at the desired frequency. The antenna
had a 42 percent difference between the simulated results and the actual results, but the antenna
still tested well with a return loss of negative 7 dB. The oscillator’s actual result came to be closer
to the desired frequency than the simulated result. The oscillator simulated an oscillation
frequency of 9.7 GHz, and the actual oscillation frequency is 10.07 GHz. The oscillator had a 3.8
percent difference between the simulated and actual frequency, which makes it the most
successful component in this project. The High Gain Amplifier is designed in ADS and fabricated
on a Roger’s Duroid 5880. The amplifier did not perform well at its desired frequency, but it
73
amplified signals at lower frequencies; the best gain occurred at 3 GHz and had an amplitude of 8
dB. The power divider had about a 1 dB difference between the simulated result and measured
result. The mixer is designed and fabricated, but it is not tested because it needed to be paired
with a low pass filter, which was not fabricated. Another component that is designed but not
fabricated is the low noise amplifier.
Future work for this project will be to remodel the maximum gain amplifier, remodel the
antenna, construct a LNA, and construct a low pass filter. These components are to be tested, as
well as the mixer. Aside from the future work for this project, questions that arose are how a
transistor should be properly secured to ground and what the best bias configuration is in order to
stabilize a transistor.
74
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