Master`s Thesis Automated FPGA

Master’s Thesis
Automated FPGA-based generation and
measurement of bursty IP network traffic
Background:
Software-Defined Networking (SDN) is a hot research
topic which enables automated and programmable
network control. By spatially separating the control
plane from the data plane of the network devices (e.g.
switches, routers) and placing it in a centralized
software controller, network management complexity
can be significantly reduced. At our institute we
explore SDN extensions which allow efficient utilization of processing resources in scenarios
where network traffic is bursty and hence processing demands change rapidly.
Goals:
To quantify resource demands and to evaluate the benefit of our SDN extensions, we need a
network tester which is able to generate and measure bursty IP traffic at line-rates up to 10
Gbps. The goal of this Master’s Thesis is two-fold:
1. Existing FPGA implementations (e.g. Open Source Network Tester) should be explored
to determine if they are suitable to generate and measure the bursty traffic patterns.
If required, an appropriate extension should be implemented.
2. To automate the tests, our testbed should be made configurable (setup of the cloud
computing platform OpenStack) to provision the setup for our required tests. The generation
and evaluation of the test traffic should be integrated in this platform.
Required/Beneficial Skills:
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General knowledge of the OSI model of communication networks
Basic knowledge of hardware description languages such as VHDL and ideally first
hands-on FPGA experience
Proficiency using Linux, Python programming skills
Self-motivated and structured work style, ability to work independently
Contact:
Andreas Oeldemann, M.Sc.
Institute for Integrated Systems
Technische Universität München
Room N2137
Tel.: +49 (0) 89 289 22962
E-Mail: [email protected]