Three-Phase Power Meter Hardware Design Reference Manual Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.
Document Number: DRM146
Rev. 0, 03/2014
Design Reference Manual
Three-Phase Power Meter Hardware Design
Reference Manual
by: Albert Chen and Shawn Shi
Contents
1 Overview
Freescale three-phase power meter reference
design is structured in accordance with the
standard by China state grid corporation
Q/GDW 354–2012 (functional specification for
smart electricity meters), Q/GDW 356–2012
(the type specification for smart poly-phase
electricity meters).
1
Overview ..........................................................1
2
Introduction ......................................................2
3
Demo board content..........................................4
4
Demo board hardware features .........................6
5
Three-phase power meter demo board..............6
The reference design aims at shortening time to
market for power meter customers and partners,
and it can be tailored to customer’s unique need
in powering system.
5.1
System power ...........................................6
5.2
Clock.........................................................7
5.3
Debug interface.........................................8
5.4
Voltage sampling ......................................9
5.5
Current sampling ....................................10
5.6
Frequency measuring ..............................11
5.7
External memory ....................................11
5.8
Tamper protection...................................12
5.9
Pulse output ............................................13
5.10
RS485 interface ..................................14
5.11
LCM display .......................................15
5.12
Backlight control ................................15
5.13
Jumper table ........................................16
6
Conclusions ....................................................16
7
References ......................................................16
8
Revision history ..............................................16
© 2014 Freescale Semiconductor, Inc.
___________________________________________________________________
2 Introduction
The three-phase power meter reference design is uses the Freescale ARM® Cortex®-M0+ core 44PIN
KM14 as the metering IC and ARM Cortex-M0+ KL36 core 100PIN KL36 as the IC controller.
The reference design primarily consists of a power board, main control board, and LCM board. Figure 1,
Figure 2, and Figure 3 represent the block diagram of power board, control board, and LCM board
respectively.
Figure 1. Power board block diagram
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Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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Figure 2. Control board block diagram
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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Figure 3. LCM board block diagram
3 Demo board content
Figure 4. Power board top side content
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Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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Figure 5. Control board top side content
Figure 6. LCM board top side content
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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4 Demo board hardware features
The Freescale three-phase power meter includes the following hardware features:
• ARM Cortex-M0+ core MKM14Z64CHH5, 44 LGA (5 mm x 5 mm), 50 MHz, 64 KB Program
flash memory, and 16 KB SRAM.
• ARM Cortex-M0+ core MKL36Z256VLL4, 100 LQFP (14 mm x 14 mm), 48 MHz, 256 KB
Program flash memory, and 32 KB SRAM.
• 3×220/380 V voltage input to generate two isolated 5 V DC output, one is used for the system while
the other is used for 485 communication.
• Current sampling: using 0.05% accuracy CT, 25ppm shunt, and 24-bit SD ADC.
• Voltage sampling: using 25ppm resistor divider, 16-bit SAR ADC.
• KM14 internal ACMP module used for zero cross point detection.
• 5PPM RTC achieved using external 0.5C resolution temporary sensor, external 32.768 Hz crystal,
and internal RTC module.
• Two isolated RS485 output in half duplex mode, ISL3152EIBZ used.
• Infrared circuit use AT205B as transmitter and TSOP4838 as receiver.
• External 512 KB I2C EEPROM 24LC512, 64 MB SPI Flash MX25L6406EM2I-12G used as
memory extension.
• 3× isolated electrical pulse output, 3× light pulse output used for meter calibration/indication/test.
2
• Tamper protection: Temper input pin detection for box opening, I C based magnetic sensor for
activity detection.
• Display: I2C port based LCD drive chip HT16C23 and JIYA 8*32 LCD display module used with
backlight control.
5 Three-phase power meter demo board
5.1 System power
The demo board is powered by 220 V AC, the power board will transfer the grid AC voltage into two
isolated linear 5 V DC outputs. One 5 V DC output is used to power the MCU system while the other is
used for isolated RS485 communication.
In power line off mode, the system will use 6 V lithium battery as backup power. Also, there is one 3.6
V battery which powers the RTC alone and should work for the duration of the meter’s life.
Because the MCU system requires 3.3 V DC input, it must use LDO to transfer the 5 V input to 3.3 V
output in system. This LDO needs to be low in quiescent current and low in noise.
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Figure 7. DC power supply
Figure 8. External VREF supply option
5.2 Clock
The KM14 system is uses an external 32.768 KHz crystal, while the KL36 system uses an 8 MHz
external crystal.
For the Km14 system, a Citizen +/-20ppm 32.768 KHz crystal is used. This crystal can be used for RTC
clock generation, which requires high consistency in production.
For the Kl36 system, an Abracon +/-20ppm 8 MHz crystal is used. The customer can use an internal RC
clock as an alternate.
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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Figure 9. Oscillator circuit
5.3 Debug interface
Both the KM14 and KL36 system use a SWD debug port. The customer can use Jlink and Multilink
tools to develop and debug the code.
The software uses an IAR tool chain and only needs to configure the IDE to run the selected hardware
debugger.
Figure 10. KL debug port
Figure 11. KM debug port
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5.4 Voltage sampling
Power line voltage sampling is uses a 16-bit SAR ADC, 220 V AC transfer to around 0.17V AC using a
resistor divider, then the circuit adds 0.6 V DC offset to this AC signal before putting into SAR ADC for
sampling.
The 0.6 V DC offset is generated using the KM14 internal 1.2 V VREF output and external amplifier
divider circuit by default.
There is an option for using external 1.2 V VREF for the system which also requires software switch
configuration.
Figure 12. Voltage sampling circuit
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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5.5 Current sampling
Current sampling is uses AFE 24-bit ΣΔ ADC module, load current is through the original side of
CT(5/60A current, 0.05% accuracy, 2000 ratio). The second side current will pass through the 4.7R
shunt resistor to generate differential voltage to ΣΔ ADC.
Figure 13. Current sampling circuit
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Freescale Semiconductor, Inc.
5.6 Frequency measuring
Grid AC frequency is monitored using a Photon internal ACMP module. The ACMP module has two
inputs. One of the ACMP inputs is the AC voltage after resistor divider and adding offset while the other
ACMP input is 0.6 V offset.
Figure 14. Frequency measuring circuit option
5.7 External memory
The system uses 512 KB EEPROM which is based on the I2C port and 64 MB SPI flash for memory
extension.
The choice of memory type and size is quite application-dependent, so those memories are reserved for
customer application usage; only low level read/write logic is implemented in the software.
Figure 15. External SPI based flash
2
Figure 16. External I C based EEPROM
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5.8 Tamper protection
There are various types of tamper protection available in the system, few of them are as follows:
• Tamper detection pin: It monitors the box open action.
• Magnetic sensor: It detects the activity in the system.
• Voltage missing mode: The system can enter into low-power mode and periodically sample the
current to prevent tampering.
Figure 17. Tamper input circuit
Figure 18. Magnetic sensor
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5.9 Pulse output
The power meter has an isolated electrical output and light pulse output, which is used for accuracy
test/calibration, RTC test/calibration, and status indication.
Figure 19. Isolated pulse output circuit
Figure 20. Light pulse output circuit
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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5.10 RS485 interface
The power meter system has two isolated RS485 port. Those ports are in half-duplex mode and could be
used for multiple purposes by end users.
Figure 21. Isolated RS485I circuit
Figure 22. Isolated RS485II circuit
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5.11 LCM display
The power meter system has the LCM display which uses the HT16C23 LCD drive IC and 8*32
segment LCD display.
In application, the KL36 will send data periodically to HT16C23 to update the content displayed on
segment LCD.
Figure 23. LCM display
5.12 Backlight control
The LCM module uses 2*15 mA diodes as backlight. The system could switch it on/off according to the
application.
Figure 24. LCD backlight control circuit
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
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5.13 Jumper table
Table 1. System jumper table option
Jumper
Option
Setting
Description
J2
RTC power supply
1-2
RTC power supply on
J3
System 3.3V power supply
1-2
System power supply on
J38
External VREF power supply
off
Internal VREF is used by default
J30
ACMP pin function multiplexed with
debugging port
on
Switch SWD_IO_KM/CMP0_P2 pin as
ACMP function during demo
J31
ADC pin function multiplexed with
debugging port
on
Switch SWD_CLK_KM/AD6 pin as ADC
function during demo
6 Conclusions
This design reference manual describes hardware design points with the three-phase power meter demo
boards. For technical details about the board design and solution implemented, see the documentation
section on freescale.com.
7 References
Following references are available on freescale.com:
• Kinetis M Series MCUs
• Kinetis L Series MCUs
8 Revision history
Table 2. Revision history
16
Revision number
Date
Substantial changes
0
03/2014
Initial release
Three-Phase Power Meter Hardware Design Reference Manual, Rev. 0, 03/2014
Freescale Semiconductor, Inc.
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© 2014 Freescale Semiconductor, Inc.
Document Number: DRM146
Rev. 0
03/2014