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FPGA Forum 2015
Nikolay Rognlien and Per-Arne Kristiansen
Altera – More than 30 Years leadership innovation community
February 11th and 12th 2015
Nikolay Rognlien - FAE
– “Lidenskapelig” interesse for
FPGA løsninger
– 15+ års erfaring med kunde &
prosjekt support
– Vil holde våre tekniske
presentasjoner
– Vise & demonstrere på stand
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Per-Arne Kristiansen – Teknisk Salg
– Jobbet med Altera løsninger
siden 1986
– Sett markedet vokse fra
“ingenting” til “allemanns eie”
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Altera representatives
– David Clarke, Channel Manager, Northern Europe
– Pat Mead – FAE Manager, Altera Europe
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A Powerful New Altera Brand
P
OW E R I N G
CPLDs
Lowest Cost,
Lowest Power
Y
I
O U R
FPGAs
FPGAs
Cost/Power Balance Mid-range FPGAs
SoC & Transceivers SoC & Transceivers
N N OVAT I O N
FPGAs
Optimized for
High Bandwidth
PowerSoCs
High-efficiency
Power Management
RESOURCES
Embedded Soft and
Hard Processors
Design
Software
Development
Kits
Intellectual
Property (IP)
 Industrial
 Computing
 Enterprise
Enpirion Leadership in Integrated Power Conversion
High Power Density + Low Noise
– Up to 97% efficiency
with low ripple
– Lower system power
Increased System Reliability
– Fully simulated, characterized
and validated power system
– Fewer components
Ease-of-Use; Faster Time-to-Market
– Simple design flow with fewer iterations
– Lower development costs
Smallest Footprint
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Picture Speaks 1000 words
Enpirion
 Only 2-3 external components
 Very small foot print
 All Caps low cost X5R Ceramic
 No Noisy signals on PC Board
 Full schematic and Board layout review
ENABLE
VIN
VSENSE
PVIN
CIN
VS0
VS1
10 uF
EN5322 POK
VS2
PGND
AVIN
VOUT
VOUT
COUT
47 uF
PGND
AGND
1 uF
Layout Example:
EN5364QI
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Proprietary and Confidential
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Presentations by Nikolay Rognlien
– Powering FPGAs efficiently and easy
– Modern FPGAs has become more complex in their power supply demands to
facilitate high performance. Altera’s Enpirion product range is designed to solve
these challenges. Learn about the products and how to use the power estimator
to get suggestions on suitable power tree structures and dimensioning.
– (11/2 track B, kl.14:15)
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Presentations by Nikolay Rognlien
– “BluePrint – Find valid pinout for multiple complex IPs in minutes”
– (12/2 track A, kl.11:15)
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Pat Mead, Altera
– Closing Keynote day 1:
(11/2, kl.16:20)
– How convergence is re-writing the FPGA
industries development landscape
– The emergence of next generation silicon technologies are driving the
convergence of high performance processors and programmable FPGA fabric
resulting in unprecedented levels of capability and flexibility. Coupled with
high-level tool flow methodologies such as OpenCL and system level design
tools, the industry’s development landscape is evolving with never seen before
levels of productivity and the enablement of non-traditional hardware design
resource.
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