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Migrating Consumer Electronics
to the Automotive World with
Calibre PERC
Matthew Hogan, Mentor Graphics
Migrating Consumer Electronics to the Automotive World with Calibre PERC
Automotive consumers are demanding more than just transportation from their vehicles, in the form of connected
cars [1] and increasingly elaborate infotainment systems, all of which must be developed and supported by
integrated circuit (IC) manufacturers [2]. These demands present a great opportunity for new entrants into this
market, but only if they can meet the reliability challenges necessary for automotive electronics applications.
When it comes to safety-related automotive electronics, ISO 26262 [3] provides a framework for robust and reliable
design and verification practices. Compliance is an obligation for competitive products in this market. But what of
the reliability obligations for non-safety related systems? In-vehicle infotainment (IVI) and connected car systems
need high-reliability IC designs for marketability and brand perception, but out-of-specification performance for
these ICs results primarily in customer dissatisfaction. While failure may lead to a significant negative market
reaction, it does not create the concern and accountability incurred if a safety-critical IC fails [4]. New entrants into
the automotive IC ecosystem must prove themselves as consistent suppliers of reliable parts. Competing against
incumbents in the automotive industry that have a successful track record for years can be a long and uphill battle
[5].
This attractive, high growth market does have standards, like those established by the Automotive Electronics
Council (AEC) [6], but understanding how to appropriately apply and comply with these standards in a competitive
marketplace may be challenging to those without experience. The harsh environment present in automotive
electronics operation [7] combined with the high reliability requirements for verification of these ICs [8] provides
design and verification challenges that are not commonly encountered when designing and developing ICs
intended for less-demanding settings. While questions like which electrostatic discharge (ESD) or electrical
overstress (EOS) compliance standards need to be met (and at what level) are often answered in industry standards
documents [6], what’s less obvious are the challenges, design trade-offs, and best practices used to achieve
compliance with these standards.
CHALLENGES WITH EXISTING IP REUSE
Leveraging existing IP for use in high-reliability applications poses a number of challenges. One of the most
obvious is that of correct functional operation over the wide temperature ranges encountered in automotive
applications. Altera defines five temperature grades for its products [9]:
■■ Commercial: 0°C to 85°C
■■ Industrial: −40°C to 100°C
■■ Automotive: −40°C to 125°C
■■ E xtended: −40°C to 125°C
■■ Military: −55°C to 125°C
The AEC-Q100-Rev-G Base Document [6] specifies part operating grades at the following levels:
■■ Grade 0: -40°C to +150°C ambient operating temperature range
■■ Grade 1: -40°C to +125°C ambient operating temperature range
■■ Grade 2: -40°C to +105°C ambient operating temperature range
■■ Grade 3: -40°C to +85°C ambient operating temperature range
■■ Grade 4: 0°C to +70°C ambient operating temperature range
When re-targeting an IC design for automotive applications, understanding which grade you want to achieve can
impact the product’s viability in the marketplace and, ultimately, its reliability. How much re-design is required to
attain reliable operation at one grade vs. another? How will your grade choice impact overall sales and
performance of the design?
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Migrating Consumer Electronics to the Automotive World with Calibre PERC
The AEC electrical component qualification requirements laid out in the Q100 documents [6] provide testing and
compliance requirements for a statistically significant number of parts in several functional areas:
■■ ESD protection: All products
■■ Latch-up (LU) prevention: All products
■■ E lectrical Distribution: The supplier must demonstrate, over the operating temperature grade, voltage, and
frequency ranges, that the device is capable of meeting the parametric limits of the device specification. This
data must be taken from at least three lots, or one matrixed (skewed) process lot, and must represent enough
samples to be statistically valid, see Q100-009. It is strongly recommended that the final test limits be
established using AEC-Q001 Guidelines for Part Average Testing.
■■ O
ther Tests: A user may require other tests in lieu of generic data based on experience with a particular
supplier.
As with all standards, it is important to evaluate the relevance and applicability to your design and technology. Are
the ESD tests they call for appropriate for your application? If you are designing with an SOI technology, are the
latch-up rules (necessary for bulk technologies) relevant or appropriate to your design?
The AEC electrical component qualification requirements also identify wearout reliability tests, which specify the
testing of several failure mechanisms.
■■ Electromigration
■■ T ime-Dependent Dielectric Breakdown (or Gate Oxide Integrity Test)—for all MOS technologies
■■ Hot Carrier Injection—for all MOS technologies below 1 micron
■■ Negative Bias Temperature Instability
■■ Stress Migration
Verification against these failure modes during the design process provides assurance for the actual device
performance.
AUTOMATING RELIABILITY VERIFICATION
Finding a verification environment capable of these diverse failure modes can be a daunting task. Fortunately, a
new class of IC reliability verification tool, such as Calibre® PERC™, can consider these problem domains in a single
cohesive environment. Created out of the need to improve the coverage of IC reliability verification in a circuitaware context, Calibre PERC allows designers to perform a focused analysis of circuit implementation from both a
circuit topology and layout perspective. As part of this analysis, external constraints can be leveraged to direct the
intent of checks and help determine which circuits are out of compliance. A reliability verification tool that can
understand and assess those constraints is essential to identifying reliability issues and ensuring compliance with
reliability requirements and industry standards.
One common example is protection and verification against time-dependent dielectric breakdown (TDDB) in
interconnects (often called voltage-aware DRC [10]), where reliability verification in electrical overstress (EOS)
environments plays a critical role. Figure 1 shows a voltage-aware DRC reliability verification flow using the Calibre®
PERC™ tool. The flow occurs entirely within the Calibre PERC environment. Both TDDB and EOS require larger
design areas to avoid failure, but both are critical to mitigate in high- reliability IC designs.
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Migrating Consumer Electronics to the Automotive World with Calibre PERC
Figure 1: Voltage-aware DRC flow
with Calibre PERC
Much of the additional reliability verification performed on designs is to ensure robust operation over an extended
operating period. To what levels you must go for the extra validation of design robustness is a measure of how
critical correct device operation over time is to your market. Are point-to-point resistance, current density [11], and
electromigration simulations [12] on your “must do” list? What about device orientation matching [11]? These and
other reliability checks (Figure 2) are important for the long-term reliability of your designs.
Figure 2: Reliability checks help
identify and solve design issues
that can affect long-term
performance.
SUMMARY
This is a time of incredible change and growth in the electronic systems used in automotive vehicles. New
expectations of how cars are designed, built, and driven provide burgeoning opportunities for semiconductor
vendors to develop new chips for this market. Leveraging EDA tools like Calibre PERC to ensure accurate reliability
verification while achieving compliance with industry standards can provide IC vendors with new and expanded
market channels, and their customers with valuable new and enhanced products, as well as quality and operational
confidence.
To learn more about Calibre PERC’s full range of capabilities, visit our website at:
http://www.mentor.com/perc
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REFERENCES
[1] How To Build A Secure Connected Car,
http://www.forbes.com/sites/ibm/2014/11/10/how-to-build-a-secure-connected-car/
[2] Toshiba infotainment companion chip supports cameras, high-resolution multimedia connectivity,
http://theconnectedautomobile.com/
toshiba-infotainment-companion-chip-supports-cameras-high-resolution-multimedia-connectivity/
[3] “Road vehicles – Functional safety”, ISO 26262-1, 2001, http://www.iso.org, 2013
[4] “9 Notorious Automotive Electronics Recalls,” http://www.eetimes.com/document.asp?doc_id=1323631
[5] Intel Chases Sales on Silicon Road to Driverless Cars,
http://www.bloomberg.com/news/2014-06-30/intel-chases-sales-on-silicon-road-to-driverless-cars.html
[6] Automotive Electronics Council, http://www.aecouncil.com/AECDocuments.html
[7] The Changing Automotive Environment: High-temperature Electronics,
http://electroiq.com/blog/2004/05/the-changing-automotive-environment-high-temperature-electronics/
[8] Circuit Reliability for the Auto Industry, http://www.eetimes.com/author.asp?section_id=36&doc_id=1322554
[9] Temperature Grades and Associated Temperature Ranges,
http://www.altera.com/devices/common/ind/ind-temp.html#table1
[10] Using Static Voltage Analysis and Voltage-Aware DRC to Identify EOS and Oxide Breakdown Reliability Issues,
2013 EOS/ESD Symposium, Matthew Hogan, Sridhar Srinivasan, Dina Medhat, Ziyang Lu, Mark Hofmann,
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6635948&tag=1
[11] P. Gibson, et al., “A Framework for Logic-Aware Layout Analysis”, ISQED 2010, pp171-175
[12] Patrick Gibson, Matthew Hogan, Valeriy Sukharev, “Electromigration Analysis of Full-Chip Integrated Circuits
with Hydrostatic Stress”, IRPS 2014
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MGC 11-14
TECH12480
Thanks for reading.
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