ISTANBUL AYDIN UNIVERSITY Name, Surname Number Course Code Course Name Exam Date : : : SEN361 : Computer Organization : :14.01.2015  Final Midterm Please make sure to write your name and student number on each paper that you have used Question Number 1 2 3 4 5 6 7 8 9 10 Total Mark Note: Exam duration is 90 (ninety ) minutes only. Eigth out of ten must be answerred. QUESTIONS 1. What is the difference between failover and failback? The function of switching an applications and data resources over from a failed system to an alternative system in the cluster is referred to as failover. A related function is the restoration of applications and data resources to the original system once it has been fixed; this is referred to as failback. 2. Represent the following multicore organization alternatives using block diagrams. Based on these, what are the key differences between them? a. Dedicated L1 cache b. Dedicated L2 cache c. Shared L2 cache d. Shared L3 cache 3. Identify the write-read, write-write, and read-write dependencies in the following instruction sequence: I1: R1 = 100 I2: R1 = R2 + R4 I3: R2 = R4 – 25 I4: R4 = R1 + R3 I5: R1 = R1 + 30 write-read L2 – L4 L2 – L5 L1 – L4 L1 – L5 write-write L1 – L2 L2 – L5 L1 – L5 read-write L2 – L3 L2 – L4 L3 – L4 L4 – L5 4. List the characteristics of an RISC organisation. (1) a limited instruction set with a fixed format, (2) a large number of registers or the use of a compiler that optimizes register usage, and (3) an emphasis on optimizing the instruction pipeline. 5. Explain user-visible registers and control/status registers User-visible registers: These enable the machine- or assembly language programmer to minimize mainmemory references by optimizing use of registers. Control and status registers: These are used by the control unit to control the operation of the CPU and by privileged, operating system programs to control the execution of programs. 6. An address field in an instruction contains decimal value 14. Where is the corresponding operand located for a. immediate addressing? b. direct addressing? c. indirect addressing? d. register addressing? e. register indirect addressing? a. the address field b. memory location 14 c. the memory location whose address is in memory location 14 d. register 14 e. the memory location whose address is in register 14 7. What is the difference between an arithmetic shift and a logical shift? With a logical shift, the bits of a word are shifted left or right. On one end, the bit shifted out is lost. On the other end, a 0 is shifted in. The arithmetic shift operation treats the data as a signed integer and does not shift the sign bit. On a right arithmetic shift, the sign bit is replicated into the bit position to its right. On a left arithmetic shift, a logical left shift is performed on all bits but the sign bit, which is retained. 8. Many instruction sets contain the instruction NOOP, meaning no operation, which has no effect on the processor state other than incrementing the program counter. Suggest some uses of this instruction. 1. A NOOP can be useful for debugging. When it is desired to interrupt a program at a particular point, the NOOP is replaced with a jump to a debug routine. When temporarily patching or altering a program, instructions may be replaced with NOOPs. 2. A NOOP introduces known delay into a program, equal to the instruction cycle time for the NOOP. This can be used for measuring time or introducing time delays. 3. NOOPs can be used to pad out portions of a program to align instructions on word boundaries or subroutines on page boundaries. 4. NOOPs are useful in RISC pipelining 9. In virtually all systems that include DMA modules, DMA access to main memory is given higher priority than CPU access to main memory.Why? If a processor is held up in attempting to read or write memory, usually no damage occurs except a slight loss of time. However, a DMA transfer may be to or from a device that is receiving or sending data in a stream (e.g., disk or tape), and cannot be stopped. Thus, if the DMA module is held up (denied continuing access to main memory), data will be lost. 10. Consider a 4-drive, 200GB-per-drive RAID array.What is the available data storage capacity for each of the RAID levels, 0, 1, 3, 4, 5, and 6? RAID 0: 800 GB RAID 1: 400 GB RAID 3: 600 GB RAID 4: 600 GB RAID 5: 600 GB RAID 6: 400 GB