1. No category

IRFS9N60A, SiHFS9N60A
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg results in Simple Drive
Requirement
600
RDS(on) (Ω)
VGS = 10 V
0.75
Qg (Max.) (nC)
49
Qgs (nC)
13
Qgd (nC)
20
Configuration
Available
• Improved Gate, Avalanche and Dynamic dV/dt RoHS*
COMPLIANT
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
• Lead (Pb)-free Available
Single
D
APPLICATIONS
D2PAK (TO-263)
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High Speed Power Switching
G
APPLICABLE OFF LINE SMPS TOPOLOGIES
G D
• Active Clamped Forward
S
S
• Main Switch
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
D2PAK (TO-263)
D2PAK (TO-263)
D2PAK (TO-263)
IRFS9N60APbF
IRFS9N60ATRRPbFa
IRFS9N60ATRLPbFa
SiHFS9N60A-E3
SiHFS9N60ATR-E3a
SiHFS9N60ATL-E3a
IRFS9N60A
IRFS9N60ATRRa
IRFS9N60ATRLa
SiHFS9N60A
SiHFS9N60ATRa
SiHFS9N60ATLa
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 30
ID
9.2
5.8
IDM
37
1.3
W/°C
Single Pulse Avalanche Energyb
EAS
290
mJ
Repetitive Avalanche Currenta
IAR
9.2
A
Repetitive Avalanche Energya
EAR
17
mJ
VGS at 10 V
Continuous Drain Current
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
Linear Derating Factor
TC = 25 °C
Maximum Power Dissipation
Operating Junction and Storage Temperature Range
V
A
PD
170
W
dV/dt
5.0
V/ns
TJ, Tstg
- 55 to + 150
Peak Diode Recovery dV/dtc
Soldering Recommendations (Peak Temperature)
UNIT
for 10 s
300d
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 6.8 mH, RG = 25 Ω, IAS = 9.2 A (see fig. 12).
c. ISD ≤ 9.2 A, dI/dt ≤ 50 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
WORK-IN-PROGRESS
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IRFS9N60A, SiHFS9N60A
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
40
Maximum Junction-to-Case (Drain)
RthJC
-
0.75
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 µA
600
-
-
V
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.66
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
nA
IGSS
IDSS
RDS(on)
gfs
VGS = ± 30 V
-
-
± 100
VDS = 600 V, VGS = 0 V
-
-
25
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
250
-
-
0.75
Ω
5.5
-
-
S
-
1400
-
ID = 5.5 Ab
VGS = 10 V
VDS = 25 V, ID = 3.1 A
µA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Effective Output Capacitance
Coss
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 0 V
Coss eff.
-
180
-
-
7.1
-
VDS = 1.0 V, f = 1.0 MHz
-
1957
-
VDS = 480 V, f = 1.0 MHz
-
49
-
-
96
-
-
-
49
VDS = 0 V to 480
Vc
pF
Total Gate Charge
Qg
Gate-Source Charge
Qgs
-
-
13
Gate-Drain Charge
Qgd
-
-
20
Turn-On Delay Time
td(on)
-
13
-
-
25
-
-
30
-
-
22
-
-
-
9.2
-
-
37
-
-
1.5
-
530
800
ns
-
3.0
4.4
µC
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
VGS = 10 V
ID = 9.2 A, VDS = 400 V
see fig. 6 and 13b
VDD = 300 V, ID = 9.2 A
RG = 9.1 Ω, RD = 35.5 Ω,
see fig. 10b
tf
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 9.2 A, VGS = 0 Vb
TJ = 25 °C, IF = 9.2 A, dI/dt = 100 A/µsb
V
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
I D , Drain-to-Source Current (A)
10
1
4.7V
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
100
1
10
TJ = 150 ° C
TJ = 25 ° C
1
100
V DS = 50V
20µs PULSE WIDTH
5.0
6.0
7.0
8.0
9.0
VDS , Drain-to-Source Voltage (V)
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
3.0
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.7V
TOP
I D , Drain-to-Source Current (A)
10
0.1
4.0
10
4.7V
20µs PULSE WIDTH
TJ = 150 ° C
1
1
10
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
100
r DS(on), Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TOP
10.0
ID = 9.2A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFS9N60A, SiHFS9N60A
Vishay Siliconix
2400
ISD , Reverse Drain Current (A)
2000
C, Capacitance (pF)
100
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
iss
1600
oss
1200
800
rss
400
0
A
1
10
100
1000
10
TJ = 150 ° C
1
TJ = 25 ° C
V GS = 0 V
0.1
0.2
0.5
ID = 9.2A
1.2
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
VDS = 480V
VDS = 300V
VDS = 120V
16
100
ID , Drain Current (A)
VGS , Gate-to-Source Voltage (V)
20
1.0
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
0.7
12
8
10us
10
100us
1ms
1
4
10ms
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
20
30
40
50
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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0.1
TC = 25 ° C
TJ = 150 ° C
Single Pulse
10
100
1000
10000
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
RD
VDS
10.0
VGS
ID , Drain Current (A)
D.U.T.
RG
8.0
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
6.0
Fig. 10a - Switching Time Test Circuit
4.0
VDS
90 %
2.0
0.0
25
50
75
100
125
10 %
VGS
150
TC , Case Temperature ( ° C)
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
PDM
0.05
t1
0.02
t2
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.01
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
15 V
tp
L
VDS
D.U.T
RG
IAS
20 V
tp
Driver
+
A
- VDD
IAS
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
Fig. 12b - Unclamped Inductive Waveforms
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IRFS9N60A, SiHFS9N60A
EAS , Single Pulse Avalanche Energy (mJ)
Vishay Siliconix
600
TOP
500
BOTTOM
ID
4.1A
5.8A
9.2A
400
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
IRFS9N60A, SiHFS9N60A
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode
VDD
forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91287.
Document Number: 91287
S-Pending-Rev. A, 22-Jul-08
www.vishay.com
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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