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IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Dynamic dV/dt Rating
- 200
RDS(on) (Ω)
VGS = - 10 V
3.0
• Repetitive Avalanche Rated
Available
Qg (Max.) (nC)
8.9
• Surface Mount (IRFR9210/SiHFR9210)
Qgs (nC)
2.1
• Straight Lead (IRFU9210/SiHFU9210)
3.9
• Available in Tape and Reel
Qgd (nC)
Configuration
Single
RoHS*
COMPLIANT
• P-Channel
• Fast Switching
S
• Lead (Pb)-free Available
DPAK
(TO-252)
IPAK
(TO-251)
DESCRIPTION
G
D
P-Channel MOSFET
The Power MOSFETs technology is the key to Vishay’s
advanced line of Power MOSFET transistors. The efficient
geometry and unique processing of the Power MOSFET
design achieve very low on-state resistance combined with
high transconductance and extreme device ruggedness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU/SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surface mount applications.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
DPAK (TO-252)
IRFR9210PbF
SiHFR9210-E3
IRFR9210
SiHFR9210
DPAK (TO-252)
IRFR9210TRPbFa
SiHFR9210T-E3a
IRFR9210TRa
SiHFR9210Ta
DPAK (TO-252)
IRFR9210TRLa
SiHFR9210TLa
IPAK (TO-251)
IRFU9210PbF
SiHFU9210-E3
IRFU9210
SiHFU9210
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
SYMBOL
VDS
VGS
VGS at - 10 V
TC = 25 °C
TC = 100 °C
Currenta
ID
IDM
Pulsed Drain
Linear Derating Factor
Linear Derating Factor (PCB Mount)e
EAS
Single Pulse Avalanche Energyb
IAR
Repetitive Avalanche Currenta
EAR
Repetitive Avalanche Energya
Maximum Power Dissipation
TC = 25 °C
PD
TA = 25 °C
Maximum Power Dissipation (PCB Mount)e
c
dV/dt
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range
TJ, Tstg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = - 50 V, starting TJ = 25 °C, L = 124 mH, RG = 25 Ω, IAS = - 1.9 A (see fig. 12).
c. ISD ≤ - 1.9 A, dI/dt ≤ 70 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
WORK-IN-PROGRESS
LIMIT
- 200
± 20
- 1.9
- 1.2
- 7.6
0.20
0.020
300
- 1.9
2.5
25
2.5
- 5.0
- 55 to + 150
260d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
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IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
-
110
Maximum Junction-to-Ambient
(PCB Mount)a
RthJA
-
-
50
Maximum Junction-to-Case (Drain)
RthJC
-
-
5.0
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = - 250 µA
- 200
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = - 1 mA
-
- 0.23
-
V/°C
VGS(th)
VDS = VGS, ID = - 250 µA
- 2.0
-
- 4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = - 200 V, VGS = 0 V
-
-
- 100
VDS = - 160 V, VGS = 0 V, TJ = 125 °C
-
-
- 500
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
ID = - 1.1 Ab
VGS = - 10 V
VDS = - 50 V, ID = - 1.1 A
µA
-
-
3.0
Ω
0.98
-
-
S
-
170
-
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
VGS = 0 V,
VDS = - 25 V,
f = 1.0 MHz, see fig. 5
-
54
-
-
16
-
pF
-
-
8.9
-
-
2.1
Qgd
-
-
3.9
td(on)
-
8.0
-
tr
-
12
-
-
11
-
-
13
-
-
4.5
-
-
7.5
-
-
-
- 1.9
-
-
- 7.6
-
-
- 5.8
V
-
110
220
ns
-
0.56
1.1
µC
td(off)
VGS = - 10 V
ID = - 1.3 A, VDS = - 160 V,
see fig. 6 and 13b
VDD = - 100 V, ID = - 2.3 A,
RG = 24 Ω, RD = 41 Ω, see fig. 10b
tf
LD
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
nC
ns
D
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = - 1.9 A, VGS = 0
S
Vb
TJ = 25 °C, IF = - 2.3 A, dI/dt = 100 A/µsb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
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IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
RD
VDS
VGS
D.U.T.
RG
+VDD
- 10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
td(on)
tr
td(off) tf
VGS
10 %
90 %
VDS
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
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IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
L
Vary tp to obtain
required IAS
IAS
VDS
VDS
D.U.T.
RG
+ V DD
VDD
IAS
tp
- 10 V
0.01 Ω
tp
VDS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
- 10 V
12 V
0.2 µF
0.3 µF
QGS
-
QGD
D.U.T.
VG
+ VDS
VGS
- 3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
IRFR9210, IRFU9210, SiHFR9210, SiHFU9210
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
+
• dV/dt controlled by RG
• ISD controlled by duty factor "D"
• D.U.T. - device under test
+
- VDD
Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = - 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
*
ISD
VGS = - 5 V for logic level and - 3 V drive devices
Fig. 14 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91281.
Document Number: 91281
S-Pending-Rev. A, 21-Jul-08
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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