VISHAY IRFL0 datasheet

IRFL014, SiHFL014
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
60
RDS(on) (Ω)
VGS = 10 V
0.20
Qg (Max.) (nC)
11
Qgs (nC)
3.1
Qgd (nC)
5.8
Configuration
Single
D
• Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Fast Switching
• Ease of Paralleling
• Simple Drive Requirements
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
SOT-223
D
G
G
D
S
S
N-Channel MOSFET
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The SOT-223 package is designed for surface-mounting
using vapor phase, infrared, or wave soldering techniques.
Its unique package design allows for easy automatic
pick-and-place as with other SOT or SOIC packages but
has the added advantage of improved thermal performace
due to an enlarged tab for heatsinking. Power dissipation of
greater than 1.25 W is possible in a typical surface mount
application.
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
SnPb
SOT-223
SiHFL014-GE3
IRFL014PbF
SiHFL014-E3
IRFL014
SiHFL014
SOT-223
SiHFL014TR-GE3a
IRFL014TRPbFa
SiHFL014T-E3a
IRFL014TRa
SiHFL014Ta
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
SYMBOL
VDS
VGS
VGS at 10 V
TC = 25 °C
TC = 100 °C
Currenta
ID
IDM
Pulsed Drain
Linear Derating Factor
Linear Derating Factor (PCB Mount)e
EAS
Single Pulse Avalanche Energyb
Maximum Power Dissipation
TC = 25 °C
PD
TA = 25 °C
Maximum Power Dissipation (PCB Mount)e
c
dV/dt
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range
TJ, Tstg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 16 mH, Rg = 25 Ω, IAS = 2.7 A (see fig. 12).
c. ISD ≤ 10 A, dI/dt ≤ 90 A/μs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
LIMIT
60
± 20
2.7
1.7
22
0.025
0.017
100
3.1
2.0
4.5
- 55 to + 150
300d
UNIT
V
A
W/°C
mJ
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91191
S10-1257-Rev. C, 31-May-10
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IRFL014, SiHFL014
Vishay Siliconix
THERMAL RESISTANCE RATINGS
SYMBOL
MIN.
TYP.
MAX.
Maximum Junction-to-Ambient
(PCB Mount)a
PARAMETER
RthJA
-
-
60
Maximum Junction-to-Case (Drain)
RthJC
-
-
40
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 μA
60
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.068
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
VGS = ± 20 V
-
-
± 100
VDS = 60 V, VGS = 0 V
-
-
25
VDS = 48 V, VGS = 0 V, TJ = 125 °C
-
-
250
IGSS
IDSS
RDS(on)
gfs
ID = 1.6 Ab
VGS = 10 V
VDS = 25 V, ID = 1.6 A
μA
-
-
0.20
Ω
1.9
-
-
S
-
300
-
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 10 V
ID = 10 A, VDS = 48 V,
see fig. 6 and 13b
-
160
-
-
29
-
-
-
11
-
-
3.1
Gate-Drain Charge
Qgd
-
-
5.8
Turn-On Delay Time
td(on)
-
10
-
-
50
-
-
13
-
-
19
-
-
4.0
-
-
6.0
-
-
-
2.7
-
-
22
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
tr
td(off)
VDD = 30 V, ID = 10 A,
Rg = 24 Ω, RD = 2.7 Ω, see fig. 10b
tf
LD
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
pF
nC
ns
D
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 2.7 A, VGS = 0 Vb
TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μsb
-
-
1.6
V
-
70
140
ns
-
0.20
0.40
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %.
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Document Number: 91191
S10-1257-Rev. C, 31-May-10
IRFL014, SiHFL014
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91191
S10-1257-Rev. C, 31-May-10
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IRFL014, SiHFL014
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
Document Number: 91191
S10-1257-Rev. C, 31-May-10
IRFL014, SiHFL014
Vishay Siliconix
VDS
VGS
RD
D.U.T.
Rg
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
tr
td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91191
S10-1257-Rev. C, 31-May-10
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IRFL014, SiHFL014
Vishay Siliconix
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T.
Rg
+
-
I AS
V DD
VDS
10 V
0.01 Ω
tp
Fig. 12a - Unclamped Inductive Test Circuit
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91191
S10-1257-Rev. C, 31-May-10
IRFL014, SiHFL014
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91191.
Document Number: 91191
S10-1257-Rev. C, 31-May-10
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Package Information
Vishay Siliconix
SOT-223 (HIGH VOLTAGE)
B
D
A
3
0.08 (0.003)
B1
C
0.10 (0.004) M C B M
A
4
3
H
E
0.20 (0.008) M C A M
L1
1
2
3
4xL
3xB
e
θ
0.10 (0.004) M C B M
e1
4xC
MILLIMETERS
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
A
1.55
1.80
0.061
0.071
0.033
B
0.65
0.85
0.026
B1
2.95
3.15
0.116
0.124
C
0.25
0.35
0.010
0.014
D
6.30
6.70
0.248
0.264
E
3.30
3.70
0.130
e
2.30 BSC
e1
4.60 BSC
0.181 BSC
H
6.71
7.29
0.264
L
0.91
-
0.036
L1
θ
0.061 BSC
-
0.146
0.0905 BSC
0.287
0.0024 BSC
10'
-
10'
ECN: S-82109-Rev. A, 15-Sep-08
DWG: 5969
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension do not include mold flash.
4. Outline conforms to JEDEC outline TO-261AA.
Document Number: 91363
Revision: 15-Sep-08
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Document Number: 91000
Revision: 11-Mar-11
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